IRMCF311TY [INFINEON]
Dual Channel Sensorless Motor Control IC for Appliances; 双通道无传感器电机控制IC，适用于家电
| 型号： | IRMCF311TY |
| 厂家： | 
Infineon |
| 描述： | Dual Channel Sensorless Motor Control IC for Appliances |
| 文件： | 总33页 (文件大小：647K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD60312
IRMCF311
Dual Channel Sensorless Motor Control IC
for Appliances
Features
Product Summary
MCETM (Motion Control Engine) - Hardware based
computation engine for high efficiency sinusoidal
sensorless control of permanent magnet AC motor
Integrated Power Factor Correction control
Supports both interior and surface permanent
magnet motors
Maximum crystal frequency
60 MHz
Maximum internal clock (SYSCLK) frequency 128 MHz
Sensorless control computation time
MCETM computation data range
11 μsec typ
16 bit signed
Program RAM loaded from external EEPROM 48K bytes
Built-in hardware peripheral for single shunt
current feedback reconstruction
Data RAM
8K bytes
2 μsec
GateKill latency (digital filtered)
PWM carrier frequency counter
A/D input channels
No external current or voltage sensing operational
amplifier required
16 bits/ SYSCLK
6
Dual channel three/two-phase Space Vector PWM
Two-channel analog output (PWM)
Embedded 8-bit high speed microcontroller (8051)
for flexible I/O and man-machine control
JTAG programming port for emulation/debugger
Two serial communication interface (UART)
I2C/SPI serial interface
Watchdog timer with independent analog clock
Three general purpose timers
Two special timers: periodic timer, capture timer
A/D converter resolution
A/D converter conversion speed
8051 instruction execution speed
Analog output (PWM) resolution
UART baud rate (typ)
12 bits
2 μsec
2 SYSCLK
8 bits
57.6K bps
14
Number of I/O (max)
Package (lead-free)
QFP64
External EEPROM and internal RAM facilitate
debugging and code development
Pin compatible with IRMCK311, OTP-ROM version
1.8V/3.3V CMOS
Description
IRMCF311 is a high performance RAM based motion control IC designed primarily for appliance applications. IRMCF311 is
designed to achieve low cost and high performance control solutions for advanced inverterized appliance motor control.
IRMCF311 contains two computation engines. One is Motion Control Engine (MCETM) for sensorless control of permanent
magnet motors; the other is an 8-bit high-speed microcontroller (8051). Both computation engines are integrated into one
monolithic chip. The MCETM contains a collection of control elements such as Proportional plus Integral, Vector rotator, Angle
estimator, Multiply/Divide, Low loss SVPWM, Single Shunt IFB. The user can program a motion control algorithm by
connecting these control elements using a graphic compiler. Key components of the sensorless control algorithms, such as the
Angle Estimator, are provided as complete pre-defined control blocks implemented in hardware. A unique analog/digital circuit
and algorithm to fully support single shunt current reconstruction is also provided. The 8051 microcontroller performs 2-cycle
instruction execution (60MIPS at 120MHz). The MCE and 8051 microcontroller are connected via dual port RAM to process
signal monitoring and command input. An advanced graphic compiler for the MCETM is seamlessly integrated into the
MATLAB/Simulink environment, while third party JTAG based emulator tools are supported for 8051 developments. IRMCF311
comes with a small QFP64 pin lead-free package.
Rev 1.1
IRMCF311
TABLE OF CONTENTS
1
2
3
4
Overview...................................................................................................................................... 4
IRMCF311 Block Diagram and Main Functions ........................................................................ 5
Pinout........................................................................................................................................... 7
Input/Output of IRMCF311......................................................................................................... 8
4.1 8051 Peripheral Interface Group........................................................................................... 8
4.2 Motion Peripheral Interface Group....................................................................................... 9
4.3 Analog Interface Group ...................................................................................................... 10
4.4 Power Interface Group........................................................................................................ 11
4.5 Test Interface Group ........................................................................................................... 11
Application Connections ........................................................................................................... 12
DC Characteristics..................................................................................................................... 13
6.1 Absolute Maximum Ratings ............................................................................................... 13
6.2 System Clock Frequency and Power Consumption............................................................ 13
6.3 Digital I/O DC Characteristics............................................................................................ 14
6.4 PLL and Oscillator DC Characteristics............................................................................... 15
6.5 Analog I/O DC Characteristics ........................................................................................... 15
6.6 Analog I/O DC Characteristics ........................................................................................... 16
6.7 Under Voltage Lockout DC Characteristics ....................................................................... 17
6.8 CMEXT and AREF Characteristics.................................................................................... 17
AC Characteristics..................................................................................................................... 18
7.1 PLL AC Characteristics ...................................................................................................... 18
7.2 Analog to Digital Converter AC Characteristics ................................................................ 19
7.3 Op amp AC Characteristics................................................................................................. 20
7.4 Op Amp AC Characteristics ............................................................................................... 20
7.5 SYNC to SVPWM and A/D Conversion AC Timing......................................................... 21
7.6 GATEKILL to SVPWM AC Timing.................................................................................. 22
7.7 Interrupt AC Timing ........................................................................................................... 22
7.8 I2C AC Timing.................................................................................................................... 23
7.9 SPI AC Timing.................................................................................................................... 24
7.9.1 SPI Write AC timing .................................................................................................... 24
7.9.2 SPI Read AC Timing.................................................................................................... 25
5
6
7
7.10
7.11
7.12
UART AC Timing ........................................................................................................... 26
CAPTURE Input AC Timing .......................................................................................... 27
JTAG AC Timing ............................................................................................................ 28
8
9
10
Pin List....................................................................................................................................... 29
Package Dimensions.................................................................................................................. 32
Part Marking Information....................................................................................................... 33
2
IRMCF311
TABLE OF FIGURES
Figure 1. Typical Application Block Diagram Using IRMCF311.................................................. 4
Figure 2. IRMCF311 Internal Block Diagram................................................................................ 5
Figure 3. IRMCF311 Pin Configuration ......................................................................................... 7
Figure 4. Input/Output of IRMCF311............................................................................................. 8
Figure 5. Application Connection of IRMCF311 ......................................................................... 12
Figure 6. Clock Frequency vs. Power Consumption..................................................................... 13
TABLE OF TABLES
Table 1. Absolute Maximum Ratings............................................................................................ 13
Table 2. System Clock Frequency................................................................................................. 13
Table 3. Digital I/O DC Characteristics........................................................................................ 14
Table 4. PLL DC Characteristics .................................................................................................. 15
Table 5. Analog I/O DC Characteristics ....................................................................................... 15
Table 6. Analog I/O DC Characteristics ....................................................................................... 16
Table 7. UVcc DC Characteristics ................................................................................................ 17
Table 8. CMEXT and AREF DC Characteristics.......................................................................... 17
Table 9. PLL AC Characteristics .................................................................................................. 18
Table 10. A/D Converter AC Characteristics................................................................................ 19
Table 11. Current Sensing OP Amp AC Characteristics............................................................... 20
Table 12. Voltage sensing OP Amp AC Characteristics............................................................... 20
Table 13. SYNC AC Characteristics............................................................................................. 21
Table 14. GATEKILL to SVPWM AC Timing............................................................................ 22
Table 15. Interrupt AC Timing...................................................................................................... 22
Table 16. I2C AC Timing .............................................................................................................. 23
Table 17. SPI Write AC Timing.................................................................................................... 24
Table 18. SPI Read AC Timing..................................................................................................... 25
Table 19. UART AC Timing......................................................................................................... 26
Table 20. CAPTURE AC Timing ................................................................................................. 27
Table 21. JTAG AC Timing.......................................................................................................... 28
Table 22. Pin List .......................................................................................................................... 31
3
IRMCF311
1 Overview
IRMCF311 is a new International Rectifier integrated circuit device primarily designed as a one-
chip solution for complete inverter controlled air conditioner motor control applications. Unlike a
traditional microcontroller or DSP, the IRMCF311 provides a built-in closed loop sensorless
control algorithm using the unique Motion Control Engine (MCETM) for permanent magnet
motors. The MCETM consists of a collection of control elements, motion peripherals, a dedicated
motion control sequencer and dual port RAM to map internal signal nodes. IRMCF311 also
employs a unique single shunt current reconstruction circuit to eliminate additional analog/digital
circuitry and enables a direct shunt resistor interface to the IC. Motion control programming is
achieved using a dedicated graphical compiler integrated into the MATLAB/SimulinkTM
development environment. Sequencing, user interface, host communication, and upper layer
control tasks can be implemented in the 8051 high-speed 8-bit microcontroller. The 8051
microcontroller is equipped with a JTAG port to facilitate emulation and debugging tools. Figure 1
shows a typical application schematics using IRMCF311.
IRMCF311 is intended for development purpose and contains 48K bytes of RAM, which can be
loaded from external EEPROM for 8051 program execution. For high volume production,
IRMCK311 contains OTP ROM in place of program RAM to reduce the cost. Both IRMCF311
and IRMCK311 come in the same 64-pin QFP package with identical pin configuration to
facilitate PC board layout and transition to mass production
RS232C
Serial Comm
Field
Service
Communication
to indoor unit
IGBT inverter
DC bus
Galvanic
Isolation
Galvanic
Isolation
Compressor
Motor
Motor PWM +
PFC+GF
7
AC input Passive
IRS2630D
IPM
Fault
(100-
EMI
230V)
Filter
IRMCF311
2
User Parameter
Storage
EEPROM
EEPROM
User Program
Storage
60-100W
Fan Motor
1
Analog input
Temperature feedback
Analog actuators
Temp sense
2
3
Analog output
Digital I/O
SPM
6
Motor PWM
Fault
Relay, Valves, Switches
IRS2631D
Multple
Power
supply
15V
3.3V
1.8V
FREDFET inveter
Figure 1. Typical Application Block Diagram Using IRMCF311
4
IRMCF311
2 IRMCF311 Block Diagram and Main Functions
IRMCF311 block diagram is shown in Figure 2.
Figure 2. IRMCF311 Internal Block Diagram
IRMCF311 contains the following functions for sensorless AC motor control applications:
• Motion Control Engine (MCETM)
o Proportional plus Integral block
o Low pass filter
o Differentiator and lag (high pass filter)
o Ramp
o Limit
o Angle estimate (sensorless control)
o Inverse Clark transformation
o Vector rotator
o Bit latch
5
IRMCF311
o Peak detect
o Transition
o Multiply-divide (signed and unsigned)
o Divide (signed and unsigned)
o Adder
o Subtractor
o Comparator
o Counter
o Accumulator
o Switch
o Shift
o ATAN (arc tangent)
o Function block (any curve fitting, nonlinear function)
o 16-bit wide Logic operations (AND, OR, XOR, NOT, NEGATE)
o MCETM program and data memory (6K byte). Note 1
o MCETM control sequencer
• 8051 microcontroller
o Three 16-bit timer
o 16-bit periodic timer
o 16-bit analog watchdog timer
o 16-bit capture timer
o Up to 14 discrete I/Os
o Six-channel 12-bit A/D
Four buffered channels (0 – 1.2V input)
Two unbuffered channels (0 – 1.2V input)
o JTAG port (4 pins)
o Up to two channels of analog output (8-bit PWM)
o Two UART
o I2C/SPI port
o 48K byte program RAM loaded from external EEPROM
o 2K byte data RAM. Note 1
Note 1: Total size of RAM is 8K byte including MCE program, MCE data, and
8051 data. Different sizes can be allocated depending on applications.
6
IRMCF311
3 Pinout
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
XTAL0
XTAL1
P3.0/INT2/CS1
CPWMUH
CPWMUL
CPWMVH
CPWMVL
CPWMWH
CPWMWL
CGATEKILL
VDD1
1
2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
P1.1/RXD
P1.2/TXD
P1.3/SYNC/SCK
P1.4/CAP
VDD2
3
4
5
6
7
VSS
8
VDD1
9
FGATEKILL
FPWMWL
FPWMWH
FPWMVL
FPWMVH
FPWMUL
FPWMUH
VSS
10
11
12
13
14
15
16
(Top View)
IPFC-
IPFC+
IPFCO
VACO
VAC-
VAC+
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 3. IRMCF311 Pin Configuration
7
IRMCF311
4 Input/Output of IRMCF311
All I/O signals of IRMCF311 are shown in Figure 4. All I/O pins are 3.3V logic interface except
A/D interface pins.
Figure 4. Input/Output of IRMCF311
4.1 8051 Peripheral Interface Group
UART Interface
P1.1/RXD
P1.2/TXD
P3.6/RXD1
P3.7/TXD1
Input, Receive data to IRMCF311
Output, Transmit data from IRMCF311
Input, 2nd channel Receive data to IRMCF311
Output, 2nd channel Transmit data from IRMCF311
8
IRMCF311
Discrete I/O Interface
P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock,
needs to be pulled up to VDD1 in order to boot from I2C EEPROM
P1.4/CAP
Input/output port 1.4, can be configured as Capture Timer input
P3.0/INT2/CS1 Input/output port 3.0, can be configured as external interrupt 2 or SPI
chip select 1
P3.2/INT0
Input/output port 3.2, can be configured as external interrupt 0
Analog output Interface
P2.6/AOPWM0 Output, PWM output 0, 8-bit resolution, configurable carrier frequency
P2.7/AOPWM1 Output, PWM output 1, 8-bit resolution, configurable carrier frequency
Crystal Interface
XTAL0
XTAL1
Input, connected to crystal
Output, connected to crystal
Reset Interface
RESET
Inout, system reset, needs to be pulled up to VDD1 but doesn’t require
external RC time constant
I2C/SPI Interface
SCL/SO-SI
Output, I2C clock output or SPI data
SDA/CS0
Input/output, I2C data line or SPI chip select 0
P3.0/INT2/CS1 Input/output, INT2 or SPI chip select 1
P1.3/SYNC/SCK Input/output, SYNC output or SPI clock, needs to be pulled up to VDD1
in order boot from I2C EEPROM
4.2 Motion Peripheral Interface Group
PWM
CPWMUH
CPWMUL
CPWMVH
CPWMVL
CPWMWH
CPWMWL
FPWMUH
FPWMUL
FPWMVH
Output, motor 1 PWM phase U high side gate signal
Output, motor 1 PWM phase U low side gate signal
Output, motor 1 PWM phase V high side gate signal
Output, motor 1 PWM phase V low side gate signal
Output, motor 1 PWM phase W high side gate signal
Output, motor 1 PWM phase W low side gate signal
Output, motor 2 PWM phase U high side gate signal
Output, motor 2 PWM phase U low side gate signal
Output, motor 2 PWM phase V high side gate signal
9
IRMCF311
FPWMVL
FPWMWH
FPWMWL
PFCPWM
Output, motor 2 PWM phase V low side gate signal
Output, motor 2 PWM phase W high side gate signal
Output, motor 2 PWM phase W low side gate signal
Output, PFC PWM
Fault
CGATEKILL
Input, upon assertion, this negates all six PWM signals for motor 1,
programmable logic sense
P5.0/PFCGKILL Input, upon assertion, this negates PFCPWM signal, programmable logic
sense, can be configured as discrete I/O in which case CGATEKILL
negates PFCPWM
FGATEKILL
Input, upon assertion, this negates all six PWM signals for motor 2,
programmable logic sense
4.3 Analog Interface Group
AVDD
AVSS
Analog power (1.8V)
Analog power return
AREF
Buffered 0.6V output
CMEXT
Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be
connected.
IFBC+
IFBC-
IFBCO
IFBF+
IFBF-
Input, Operational amplifier positive input for shunt resistor current
sensing of motor 1
Input, Operational amplifier negative input for shunt resistor current
sensing of motor 1
Output, Operational amplifier output for shunt resistor current sensing of
motor 1
Input, Operational amplifier positive input for shunt resistor current
sensing of motor 2
Input, Operational amplifier negative input for shunt resistor current
sensing of motor 2
IFBFO
Output, Operational amplifier output for shunt resistor current sensing of
motor 2
IPFC+
IPFC-
IPFO
VAC+
VAC-
VACO
AIN0
Input, Operational amplifier positive input for PFC current sensing
Input, Operational amplifier negative input for PFC current sensing
Output, Operational amplifier output for PFC current sensing
Input, Operational amplifier positive input for PFC AC voltage sensing
Input, Operational amplifier negative input for PFC AC voltage sensing
Output, Operational amplifier output for PFC AC voltage sensing
Input, Analog input channel 0 (0 - 1.2V), typically configured for DC bus
voltage input
AIN1
Input, Analog input channel 1 (0 - 1.2V), needs to be pulled down to
AVSS if unused
10
IRMCF311
4.4 Power Interface Group
VDD1
Digital power for I/O (3.3V)
VDD2
VSS
Digital power for core logic (1.8V)
Digital common
PLLVDD
PLLVSS
PLL power (1.8V)
PLL ground return
4.5 Test Interface Group
TSTMOD
P5.3/TDI
P5.1/TMS
TCK
Must be tied to VSS, used only for factory testing.
Input, JTAG test data input, or programmable discrete I/O
Input, JTAG test mode select, or programmable discrete I/O
Input, JTAG test clock
P5.2/TDO
Output, JTAG test data output, or programmable discrete I/O
11
IRMCF311
5 Application Connections
Typical application connection is shown Figure 5. All components necessary to implement a
complete sensorless drive control algorithm are shown connected to IRMCF311.
CPWMUH
XTAL0
XTAL1
CPWMUL
CPWMVH
CPWMVL
CPWMWH
CPWMWL
System
Clock
4 MHz
Crystal
Low Loss
Space
Vector
PWM
PLL
Logic
PLLVDD(1.8V)
PLLVSS
System
clock
Motion
Control
Modules
CGATEKILL
FPWMUH
FPWMUL
FPWMVH
FPWMVL
FPWMWH
FPWMWL
FGATEKILL
P1.2/TXD
P1.1/RXD
To indoor unit
Microcontroller (UART)
UART0
UART1
I2C
Low Loss
Space
Vector
PWM
Dual
Port
Memory
(512B)
&
MCE
Memory
(5.5KB)
P3.7/TXD1
P3.6/RXD1
To other Host (UART)
SDA/CS0
Other communication
(I2C)
SCL/SO-SI
Motion
Control
Sequencer
PFCPWM
PFCGKILL
PFC
PWM
P1.3/SYNC/SCK
P1.4/CAP
0.6V
IFBC+
PORT1
PORT3
Digital I/O
Control
Compressor
DC bus shunt
resistor
IFBC-
IFBCO
IFBF+
S/H
P3.0/INT2/CS1
0.6V
FAN motor
DC bus shunt
resistor
IFBF-
IFBFO
IPFC+
S/H
S/H
Timer
RESET
0.6V
RESET
System
Reset
PFC
DC bus shunt
resistor
Watchdog
Timer
IPFC-
TSTMOD
IPFCO
Test
Mode
Test Mode
Circuit
VAC+
Local
RAM
(2KB)
AC line
voltage
12bit
A/D
&
VAC-
P2.6/AOPWM0
P2.7/AOPWM1
TCK
VACO
PWM0
PWM1
DC bus
voltage
MUX
AIN0
Analog Output
Program
RAM
(48KB)
AIN1
AREF
Other analog input (0-1.2V)
Optional External Voltage
Reference (0.6V)
CMEXT
P5.3/TDI
P5.1/TMS
JTAG
JTAG
Interface
Control
P5.2/TDO
AVDD(1.8V)
AVSS
8051
CPU
VDD1(3.3V)
VDD2(1.8V)
VSS
Figure 5. Application Connection of IRMCF311
12
IRMCF311
6 DC Characteristics
6.1 Absolute Maximum Ratings
Symbol
VDD1
VDD2
VIA
Parameter
Supply Voltage
Supply Voltage
Analog Input Voltage
Digital Input Voltage
Ambient Temperature
Storage Temperature
Min
Typ
Max
3.6 V
1.98 V
1.98 V
3.65 V
85 ˚C
Condition
-0.3 V
-0.3 V
-0.3 V
-0.3 V
-40 ˚C
-65 ˚C
-
-
-
-
-
-
Respect to VSS
Respect to VSS
Respect to AVSS
Respect to VSS
VID
TA
TS
150 ˚C
Table 1. Absolute Maximum Ratings
Caution: Stresses beyond those listed in “Absolute Maximum Ratings” may cause permanent
damage to the device. These are stress ratings only and function of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications are not implied.
6.2 System Clock Frequency and Power Consumption
Symbol
Parameter
Min
Typ
Max
Unit
SYSCLK
System Clock
32
-
128
MHz
Table 2. System Clock Frequency
240
200
160
120
80
VDD2 (1.8V)
40
0
VDD1 (3.3V)
Total
0
50
100
150
Clock Frequency (MHz)
Figure 6. Clock Frequency vs. Power Consumption
13
IRMCF311
6.3 Digital I/O DC Characteristics
Condition
Symbol
VDD1
Parameter
Supply Voltage
Supply Voltage
Input Low Voltage
Input High Voltage
Input capacitance
Input leakage current
Low level output
current
High level output
current
Low level output
current
Min
3.0 V
1.62 V
-0.3 V
2.0 V
-
Typ
3.3 V
1.8 V
-
Max
3.6 V
1.98 V
0.8 V
3.6 V
-
Recommended
Recommended
Recommended
VDD2
VIL
VIH
CIN
IL
Recommended
(1)
3.6 pF
±10 nA
13.2 mA
±1 μA
VO = 3.3 V or 0 V
15.2 mA VOL = 0.4 V
(2)
IOL1
8.9 mA
12.4 mA
17.9 mA
24.6 mA
(1)
(2)
IOH1
24.8 mA
26.3 mA
49.5 mA
38 mA
33.4 mA VOL = 0.4 V
VOH = 2.4 V
(1)
(3)
IOL2
(1)
(3)
IOH2
High level output
current
81 mA
VOH = 2.4 V
(1)
Table 3. Digital I/O DC Characteristics
Note:
(1) Data guaranteed by design.
(2) Applied to SCL/SO-SI, SDA/CS0 pins.
(3) Applied to P1.1/RXD, P1.2/TXD, P1.3/SYNC/SCK, P1.4/CAP, P2.6/AOPWM0,
P2.7/AOPWM1, P3.0/INT2/CS1, P3.2/INT0, P3.6/RXD1, P3.7/TXD1, P5.0/PFCGKILL,
P5.1/TMS, P5.2/TDO, P5.3/TDI, CGATEKILL, FGATEKILL, CPWMUL, CPWMUH,
CPWMVL, CPWMVH, CPWMWL, CPWMWH, FPWMUL, FPWMUH, FPWMVL,
FPWMVH, FPWMWL, FPWMWH, and PFCPWM pins.
14
IRMCF311
6.4 PLL and Oscillator DC Characteristics
Condition
Recommended
VPLLVDD = 1.8 V
Symbol
VPLLVDD
VIL OSC
Parameter
Supply Voltage
Oscillator Input Low
Voltage
Min
1.62 V
VPLLVSS
Typ
1.8 V
-
Max
1.92 V
0.2*
(1)
VPLLVDD
VIH OSC
Oscillator Input High
Voltage
0.8*
VPLLVDD
VPLLVDD VPLLVDD = 1.8 V
(1)
Table 4. PLL DC Characteristics
Note:
(1) Data guaranteed by design.
6.5 Analog I/O DC Characteristics
- OP amps for current sensing (IFBC+, IFBC-, IFBCO, IFBF+, IFBF-, IFBFO, IPFC+, IPFC-,
IPFCO)
CAREF = 1nF, CMEXT= 100nF. Unless specified, Ta = 25˚C.
Condition
Recommended
VAVDD = 1.8 V
Recommended
Symbol
VAVDD
VOFFSET
VI
Parameter
Supply Voltage
Input Offset Voltage
Input Voltage Range
OP amp output
operating range
Input capacitance
OP amp feedback
resistor
Min
1.71 V
-
Typ
1.8 V
-
Max
1.89 V
26 mV
1.2 V
0 V
VOUTSW
50 mV
-
1.2 V
VAVDD = 1.8 V
(1)
(1)
CIN
RFDBK
-
3.6 pF
-
-
Requested
between op amp
output and
5 kΩ
20 kΩ
negative input
(1)
OP GAINCL
CMRR
ISRC
Operating Close loop
Gain
Common Mode
Rejection Ratio
Op amp output source
current
80 db
-
-
-
-
-
(1)
-
-
-
80 db
1 mA
100 μA
VOUT = 0.6 V
(1)
ISNK
Op amp output sink
current
VOUT = 0.6 V
(1)
Table 5. Analog I/O DC Characteristics
Note:
(1) Data guaranteed by design.
15
IRMCF311
6.6 Analog I/O DC Characteristics
- OP amp for voltage sensing (VAC+,VAC-,VACO)
CAREF = 1nF, CMEXT= 100nF. Unless specified, Ta = 25˚C.
Condition
Symbol
VAVDD
VOFFSET
VI
Parameter
Supply Voltage
Input Offset Voltage
Input Voltage Range
OP amp output
operating range
Input capacitance
Operating Close loop
Gain
Common Mode
Rejection Ratio
Op amp output source
current
Min
1.71 V
-
Typ
1.8 V
-
Max
1.89 V
26 mV
1.2 V
VAVDD = 1.8 V
VAVDD = 1.8 V
0 V
VOUTSW
50 mV
-
1.2 V
(1)
(1)
(1)
CIN
OP GAINCL
-
3.6 pF
-
-
-
80 db
(1)
CMRR
ISRC
-
-
-
80 db
5 mA
-
-
-
VOUT = 0.6 V
(1)
ISNK
Op amp output sink
current
500 μA
VOUT = 0.6 V
(1)
Table 6. Analog I/O DC Characteristics
Note:
(1) Data guaranteed by design.
16
IRMCF311
6.7 Under Voltage Lockout DC Characteristics
- Based on AVDD (1.8V)
Unless specified, Ta = 25˚C.
Condition
VDD1 = 3.3 V
Symbol
UVCC+
Parameter
UVcc positive going
Threshold
Min
1.53 V
Typ
1.66 V
Max
1.71 V
UVCC-
UVcc negative going
Threshold
UVcc Hysteresys
1.52 V
-
1.62 V
40 mV
1.71 V
-
VDD1 = 3.3 V
UVCCH
Table 7. UVcc DC Characteristics
6.8 CMEXT and AREF Characteristics
CAREF = 1nF, CMEXT= 100nF. Unless specified, Ta = 25˚C.
Condition
VAVDD = 1.8 V
VAVDD = 1.8 V
Symbol
VCM
VAREF
ΔVo
Parameter
CMEXT voltage
Buffer Output Voltage
Load regulation (VDC-
0.6)
Min
495 mV
495 mV
-
Typ
Max
700 mV
700 mV
-
600 mV
600 mV
1 mV
(1)
(1)
PSRR
Power Supply Rejection
Ratio
-
75 db
-
Table 8. CMEXT and AREF DC Characteristics
Note:
(1) Data guaranteed by design.
17
IRMCF311
7 AC Characteristics
7.1 PLL AC Characteristics
Symbol
FCLKIN
Parameter
Crystal input
frequency
Internal clock
frequency
Sleep mode output FCLKIN ÷ 256
frequency
Short time jitter
Duty cycle
Min
3.2 MHz
Typ
4 MHz
Max
60 MHz
Condition
(1)
(see figure below)
(1)
FPLL
32 MHz
50 MHz
-
128 MHz
-
(1)
FLWPW
(1)
(1)
(1)
JS
D
TLOCK
-
-
-
200 psec
50 %
-
-
-
PLL lock time
500 μsec
Table 9. PLL AC Characteristics
Note:
(1) Data guaranteed by design.
R1=1M
R2=10
Xtal
C1=30PF
C2=30PF
18
IRMCF311
7.2 Analog to Digital Converter AC Characteristics
Unless specified, Ta = 25˚C.
Symbol
TCONV
THOLD
Parameter
Conversion time
Sample/Hold
Min
-
-
Typ
-
-
Max
2.05 μsec
10 μsec
Condition
(1)
Voltage droop ≤
15 LSB
maximum hold time
(see figure below)
Table 10. A/D Converter AC Characteristics
Note:
(1) Data guaranteed by design.
Input Voltage
Voltage droop
S/H Voltage
tSAMPLE
THOLD
19
IRMCF311
7.3 Op amp AC Characteristics
- OP amps for current sensing (IFBC+, IFBC-, IFBCO, IFBF+, IFBF-, IFBFO, IPFC+, IPFC-,
IPFCO)
Unless specified, Ta = 25˚C.
Symbol
OPSR
Parameter
OP amp slew rate
Min
-
Typ
10 V/μsec
Max
-
Condition
VAVDD = 1.8 V,
CL = 33 pF (1)
(1)
OPIMP
TSET
OP input impedance
Settling time
-
-
108 Ω
400 ns
-
-
VAVDD = 1.8 V,
CL = 33 pF (1)
Table 11. Current Sensing OP Amp AC Characteristics
Note:
(1) Data guaranteed by design.
7.4 Op Amp AC Characteristics
- OP amp for voltage sensing (VAC+,VAC-,VACO)
Unless specified, Ta = 25˚C.
Symbol
OPSR
Parameter
OP amp slew rate
Min
Typ
2.5 V/μsec
Max
-
Condition
VAVDD = 1.8 V,
CL = 33 pF (1)
(1)
OPIMP
TSET
OP input impedance
Settling time
-
108 Ω
650 ns
-
VAVDD = 1.8 V,
CL = 33 pF (1)
Table 12. Voltage sensing OP Amp AC Characteristics
Note:
(1) Data guaranteed by design.
20
IRMCF311
7.5 SYNC to SVPWM and A/D Conversion AC Timing
twSYNC
SYNC
tdSYNC1
IU,IV,IW
tdSYNC2
AINx
tdSYNC3
PWMUx,PWMVx,PWMWx
Unless specified, Ta = 25˚C.
Symbol
twSYNC
Parameter
SYNC pulse width
SYNC to current
feedback conversion
time
SYNC to AIN0-6
analog input
conversion time
SYNC to PWM output
delay time
Min
-
-
Typ
32
-
Max
-
100
Unit
SYSCLK
SYSCLK
tdSYNC1
tdSYNC2
tdSYNC3
-
-
-
-
200
2
SYSCLK
(1)
SYSCLK
Table 13. SYNC AC Characteristics
Note:
(1) AIN1 through AIN6 channels are converted once every 6 SYNC events
21
IRMCF311
7.6 GATEKILL to SVPWM AC Timing
Unless specified, Ta = 25˚C.
Symbol
twGK
Parameter
GATEKILL pulse
width
Min
32
Typ
-
Max
-
Unit
SYSCLK
tdGK
GATEKILL to PWM
output delay
-
-
100
SYSCLK
Table 14. GATEKILL to SVPWM AC Timing
7.7 Interrupt AC Timing
Unless specified, Ta = 25˚C.
Symbol
Parameter
Min
Typ
Max
Unit
twINT
INT0, INT1 Interrupt
Assertion Time
4
-
-
SYSCLK
tdINT
INT0, INT1 latency
-
-
4
SYSCLK
Table 15. Interrupt AC Timing
22
IRMCF311
7.8 I2C AC Timing
TI2CLK
TI2CLK
SCL
tI2WSETUP
tI2WHOLD
tI2RSETUP
tI2RHOLD
tI2EN1
tI2ST1
tI2ST2
tI2EN2
SDA
Unless specified, Ta = 25˚C.
Symbol
TI2CLK
tI2ST1
Parameter
Min
10
0.25
0.25
0.25
0.25
Typ
Max
8192
Unit
SYSCLK
TI2CLK
TI2CLK
TI2CLK
TI2CLK
SYSCLK
SYSCLK
I2C clock period
-
-
-
-
-
-
-
I2C SDA start time
I2C SCL start time
I2C write setup time
I2C write hold time
I2C read setup time
I2C read hold time
-
-
-
-
-
-
tI2ST2
tI2WSETUP
tI2WHOLD
tI2RSETUP
tI2RHOLD
I2C filter time(1)
1
Table 16. I2C AC Timing
Note:
(1) I2C read setup time is determined by the programmable filter time applied to I2C
communication.
23
IRMCF311
7.9 SPI AC Timing
7.9.1 SPI Write AC timing
Unless specified, Ta = 25˚C.
Symbol
TSPICLK
tSPICLKHT
tSPICLKLT
tCSDELAY
tWRDELAY
Parameter
SPI clock period
SPI clock high time
SPI clock low time
CS to data delay time
CLK falling edge to data
delay time
Min
4
-
-
-
Typ
-
1/2
1/2
-
Max
-
-
-
10
10
Unit
SYSCLK
TSPICLK
TSPICLK
nsec
-
-
nsec
tCSHIGH
tCSHOLD
CS high time between two
consecutive byte transfer
CS hold time
1
-
-
-
-
TSPICLK
TSPICLK
1
Table 17. SPI Write AC Timing
24
IRMCF311
7.9.2 SPI Read AC Timing
Unless specified, Ta = 25˚C.
Symbol
TSPICLK
tSPICLKHT
tSPICLKLT
tCSRD
tRDSU
tRDHOLD
tCSHIGH
Parameter
SPI clock period
Min
4
-
-
-
10
10
1
Typ
Max
-
-
-
10
-
Unit
-
1/2
1/2
-
-
-
SYSCLK
TSPICLK
TSPICLK
nsec
nsec
nsec
TSPICLK
SPI clock high time
SPI clock low time
CS to data delay time
SPI read data setup time
SPI read data hold time
CS high time between two
consecutive byte transfer
CS hold time
-
-
-
tCSHOLD
-
1
-
TSPICLK
Table 18. SPI Read AC Timing
25
IRMCF311
7.10 UART AC Timing
TBAUD
TXD
Data and Parity Bit
Stop Bit
Start Bit
RXD
TUARTFIL
Unless specified, Ta = 25˚C.
Symbol
TBAUD
TUARTFIL
Parameter
Baud Rate Period
UART sampling filter
period (1)
Min
-
-
Typ
57600
1/16
Max
-
-
Unit
bit/sec
TBAUD
Table 19. UART AC Timing
Note:
(1) Each bit including start and stop bit is sampled three times at center of a bit at an interval of
1/16 TBAUD. If three sampled values do not agree, then UART noise error is generated.
26
IRMCF311
7.11 CAPTURE Input AC Timing
Unless specified, Ta = 25˚C.
Symbol
TCAPCLK
Parameter
CAPTURE input
period
Min
8
Typ
-
Max
-
Unit
SYSCLK
tCAPHIGH
tCAPLOW
tCRDELAY
CAPTURE input high
time
CAPTURE input low
time
CAPTURE falling edge
to capture register latch
time
4
4
-
-
-
-
-
-
SYSCLK
SYSCLK
SYSCLK
4
tCLDELAY
CAPTURE rising edge
to capture register latch
time
CAPTURE input
interrupt latency time
-
-
-
-
4
4
SYSCLK
SYSCLK
tINTDELAY
Table 20. CAPTURE AC Timing
27
IRMCF311
7.12 JTAG AC Timing
TJCLK
tJLOW
tJHIGH
TCK
tCO
TDO
tJSETUP
tJHOLD
TDI/TMS
Unless specified, Ta = 25˚C.
Symbol
TJCLK
tJHIGH
tJLOW
tCO
Parameter
TCK Period
TCK High Period
TCK Low Period
TCK to TDO propagation
delay time
Min
-
10
10
0
Typ
Max
50
-
-
5
Unit
MHz
nsec
nsec
nsec
-
-
-
-
tJSETUP
tJHOLD
TDI/TMS setup time
TDI/TMS hold time
4
0
-
-
-
-
nsec
nsec
Table 21. JTAG AC Timing
28
IRMCF311
8 Pin List
Pin
Number
Internal IC
Pull-up
/Pull-down
Pin
Type
Pin Name
XTAL0
Description
1
I
Crystal input
Crystal output
Discrete programmable I/O or UART receive input
Discrete programmable I/O or UART transmit
output
2
3
4
XTAL1
P1.1/RXD
P1.2/TXD
O
I/O
I/O
5
P1.3/SYNC/
SCK
I/O
Discrete programmable I/O or SYNC output or SPI
clock, needs to be pulled up to VDD1 in order to
boot from I2C EEPROM
6
7
P1.4/CAP
VDD2
I/O
P
Discrete programmable I/O or Capture Timer input
1.8V digital power
8
VSS
P
Digital common
9
VDD1
P
3.3V digital power
10
FGATEKILL
I
Fan PWM shutdown input, 2-μsec digital filter,
configurable either high or low true.
Fan PWM gate drive for phase W low side,
configurable either high or low true
Fan PWM gate drive for phase W high side,
configurable either high or low true
Fan PWM gate drive for phase V low side,
configurable either high or low true
Fan PWM gate drive for phase V high side,
configurable either high or low true
Fan PWM gate drive for phase U low side,
configurable either high or low true
Fan PWM gate drive for phase U high side,
configurable either high or low true
Discrete programmable I/O or analog output 0
(PWM)
11
12
13
14
15
16
17
18
FPWMWL
FPWMWH
FPWMVL
FPWMVH
FPWMUL
FPWMUH
70 kΩ Pull
up
70 kΩ Pull
up
70 kΩ Pull
up
70 kΩ Pull
up
70 kΩ Pull
up
70 kΩ Pull
up
O
O
O
O
O
O
P2.6/
AOPWM0
P2.7/
AOPWM1
VDD2
VSS
I/O
Discrete programmable I/O or analog output 1
(PWM)
19
20
21
22
23
24
P
P
I
I
O
I
1.8V digital power
Digital common
IFBF-
Fan single shunt current sensing OP amp input (-)
Fan single shunt current sensing OP amp input (+)
Fan single shunt current sensing OP amp output
Analog input channel 0, 0-1.2V range, needs to be
pulled down to AVSS if unused
IFBF+
IFBFO
AIN0
25
AVDD
P
1.8V analog power
29
IRMCF311
Pin
Number
Internal IC
Pull-up
/Pull-down
Pin
Type
Pin Name
AVSS
Description
26
27
P
I
Analog common
Analog input channel 1, 0-1.2V range, needs to be
pulled down to AVSS if unused
AIN1
28
29
30
AREF
CMEXT
IFBC-
O
O
I
Analog reference voltage output (0.6V)
Unbuffered analog reference voltage output (0.6V)
Compressor single shunt current sensing OP amp
input (-)
31
32
IFBC+
IFBCO
I
Compressor single shunt current sensing OP amp
input (+)
Compressor single shunt current sensing OP amp
output
O
33
34
35
36
37
38
39
40
41
VAC-
I
I
O
O
I
AC input voltage sensing OP amp input (-)
AC input voltage sensing OP amp input (+)
AC input voltage sensing OP amp output
PFC shunt current sensing OP amp output
PFC shunt current sensing OP amp input (+)
PFC shunt current sensing OP amp input (-)
Digital common
VAC+
VACO
IPFCO
IPFC+
IPFC-
VSS
VDD1
CGATEKILL
I
P
P
I
3.3V digital power
Compressor PWM shutdown input, 2-μsec digital
filter, configurable either high or low true.
Compressor PWM gate drive for phase W low side,
configurable either high or low true
Compressor PWM gate drive for phase W high side,
configurable either high or low true
Compressor PWM gate drive for phase V low side,
configurable either high or low true
Compressor PWM gate drive for phase V high side,
configurable either high or low true
Compressor PWM gate drive for phase U low side,
configurable either high or low true
Compressor PWM gate drive for phase U high side,
configurable either high or low true
Discrete programmable I/O or INT2 digital input
Discrete programmable I/O or PFC PWM shutdown
input, 2-μsec digital filter, configurable either high
or low true.
42
43
44
45
46
47
CPWMWL
CPWMWH
CPWMVL
CPWMVH
CPWMUL
CPWMUH
70 kΩ Pull
up
70 kΩ Pull
up
70 kΩ Pull
up
70 kΩ Pull
up
70 kΩ Pull
up
70 kΩ Pull
up
O
O
O
O
O
O
48
49
P3.0/INT2
P5.0/
PFCGKILL
I/O
I
50
51
PFCPWM
P3.2/INT0
70 kΩ Pull
O
PFC PWM gate drive, configurable either high or
low true
up
I/O
Discrete programmable I/O or INT0 input
30
IRMCF311
Pin
Number
Internal IC
Pull-up
/Pull-down
Pin
Type
Pin Name
P3.6/RXD1
P3.7/TXD1
Description
52
53
I/O
I/O
Discrete programmable I/O or 2nd UART receive
input
Discrete programmable I/O or 2nd UART transmit
output
54
55
56
57
VSS
P
Digital common
SCL/SO-SI
SDA/CS0
P5.1/TMS
I/O
I/O
I/O
I2C clock output or SPI data
I2C data or SPI chip select 0
Discrete programmable I/O or JTAG test mode
select
58
P5.2/TDO
I/O
Discrete programmable I/O or JTAG port test data
output
59
60
61
P5.3/TDI
TCK
TSTMOD
I/O
I
I
Discrete programmable I/O or JTAG test data input
JTAG test clock
Test mode. Must be tied to VSS. Factory use only
58 kΩ pull
down
62
63
64
RESET
PLLVDD
PLLVSS
I/O
P
P
Reset , low true, Schmitt trigger input
1.8 V PLL power
PLL ground
Table 22. Pin List
31
IRMCF311
9 Package Dimensions
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
IRMCF311
10 Part Marking Information
Part Number
IRMCF311
YWWP
IR Logo
Date Code
Production Lot
XXXXXX
Pin 1
Indentifier
Order Information
Lead-Free Part in 64-lead QFP
Moisture sensitivity rating – MSL3
Part number
IRMCF311TR
IRMCF311TY
Order quantities
1500 parts on tape and reel in dry pack
1600 parts on trays (160 parts per tray) in dry pack
The LQFP-64 is MSL3 qualified
This product has been designed and qualified for the industrial level
Qualification standards can be found at www.irf.com <http://www.irf.com>
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105
Data and specifications subject to change without notice. 12/05/2006
www.irf.com
33
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