IRS2005M [INFINEON]

200 V 高边和低边驱动器 IC,具有典型的 0.29 A 拉电流和 0.6 A 灌电流,采用 MLPQ 4x4 14L 封装,适用于 IGBT 和 MOSFET。也有 8 引脚 SOIC 封装可选。;
IRS2005M
型号: IRS2005M
厂家: Infineon    Infineon
描述:

200 V 高边和低边驱动器 IC,具有典型的 0.29 A 拉电流和 0.6 A 灌电流,采用 MLPQ 4x4 14L 封装,适用于 IGBT 和 MOSFET。也有 8 引脚 SOIC 封装可选。

驱动 双极性晶体管 驱动器
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IRS2005(S,M)PBF  
High and Low Side Driver  
Features  
Product Summary  
Gate drive supplies up to 20V per channel  
VOFFSET  
≤ 200V  
10 V – 20V  
290mA & 600mA  
160ns & 150ns  
50ns  
Undervoltage lockout for VCC, VBS  
3.3 V, 5V , 15V input logic compatible  
Tolerant to negative transient voltage  
Designed for use with bootstrap power supplies  
Matched propagation delays  
Output in phase with the Inputs  
-40°C to 125°C operating range  
RoHS compliant  
VOUT  
Io+ & I o- (typ.)  
tON & tOFF (typ.)  
Delay matching (max.)  
Description  
Package Options  
The IRS2005 is a high voltage, high speed power MOSFET  
and IGBT driver with independent high and low side  
referenced output channels. Proprietary HVIC and latch  
immune CMOS technologies enable ruggedized monolithic  
construction. The logic input is compatible with standard  
CMOS or LSTTL output, down to 3.3V logic. The output  
drivers feature a high pulse current buffer stage designed  
for minimum driver cross-conduction. The floating channel  
can be used to drive an N-channel power MOSFET or IGBT  
in the high side configuration which operates up to 200 V.  
Propagation delays are matched to simplify the HVIC’s use  
in high frequency applications.  
16-Lead MLPQ 4x4  
(without 2 leads)  
8-Lead SOIC  
Typical Applications  
Appliance motor drives  
Servo drives  
Micro inverter drives  
General purpose three phase inverters  
Standard Pack  
Base Part Number  
Package Type  
Orderable Part Number  
Form  
Quantity  
Tube/Bulk  
95  
IRS2005SPBF  
IRS2005SPBF  
IRS2005MPBF  
8-Lead SOIC  
Tape and Reel  
Tape and Reel  
2500  
3000  
IRS2005STRPBF  
14-Lead MLPQ 4x4  
IRS2005MTRPBF  
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February 6, 2023  
IRS2005(S,M)PBF  
Typical Connection Diagram  
(Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connections only. Please refer tour  
Application Notes & DesignTips for proper circuit board layout.  
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IRS2005(S,M)PBF  
Absolute Maximum Ratings  
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters  
are absolute voltages referenced to COM unless otherwise stated in the table. The thermal resistance and power dissipation  
ratings are measured under board mounted and still air conditions.  
Symbol  
Definition  
Low side supply voltage  
Min.  
-0.3  
Max.  
25†  
Units  
VCC  
VIN  
VB  
Logic input voltage  
COM - 0.3  
VCC + 0.3  
225  
High-side floating well supply voltage  
High-side floating well supply return voltage  
Floating gate drive output voltage  
Low-side output voltage  
-0.3  
VB- 25  
VS - 0.3  
COM - 0.3  
VCC - 25  
VS  
VB + 0.3  
VB + 0.3  
VCC + 0.3  
VCC + 0.3  
50  
V
VHO  
VLO  
COM  
dVS/dt  
Power ground  
Allowable VS offset supply transient relative to COM  
V/ns  
W
8-Lead SOIC  
0.625  
2.08  
Package power dissipation @ TA  
+25ºC  
PD  
14-Lead MLPQ 4x4  
8-Lead SOIC  
200  
Thermal resistance, junction to  
ambient  
RthJA  
ºC/W  
ºC  
14-Lead MLPQ 4x4  
36  
TJ  
TS  
TL  
Junction temperature  
Storage temperature  
150  
-55  
150  
Lead temperature (soldering, 10 seconds)  
All supplies are tested at 25V.  
300  
Recommended Operating Conditions  
For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute  
voltages referenced to COM unless otherwise stated in the table. The offset rating is tested with supplies of (VCC - COM) = (VB  
- VS) = 15V.  
Symbol  
Definition  
Low-side supply voltage  
Min  
10  
Max  
20  
Units  
V
VCC  
VIN  
VB  
Logic input voltage  
0
VS + 10  
COM - 8†  
Vs  
VCC  
VS + 20  
200  
High-side floating well supply voltage  
High-side floating well supply offset voltage†  
Floating gate drive output voltage  
Low-side output voltage  
VS  
VHO  
VLO  
TA  
VB  
COM  
-40  
VCC  
Ambient temperature  
125  
ºC  
Logic operation for VS of –8 V to 200 V. Logic state held for VS of –8 V to –VBS. Please refer to Design Tip DT97-3  
for more details.  
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IRS2005(S,M)PBF  
Static Electrical Characteristics  
(VCC - COM) = (VB - VS) = 15V. TA = 25°C unless otherwise specified. The VIN and IIN parameters are referenced to COM. The  
VO and IO parameters are referenced to respective VS and COM and are applicable to the respective output leads HO or LO.  
The VCCUV parameters are referenced to COM. The VBSUV parameters are referenced to VS.  
Symbol Definition  
Min.  
Typ.  
Max. Units Test Conditions  
VBSUV  
VBS supply undervoltage positive going threshold  
VBS supply undervoltage negative going threshold  
VBS supply undervoltage hysteresis  
+
8.0  
8.9  
9.8  
VBSUV  
-
7.4  
8.2  
0.7  
8.9  
8.2  
0.7  
9
VBSUVHY  
VCCUV  
V
VCC supply undervoltage positive going threshold  
VCC supply undervoltage negative going threshold  
VCC supply undervoltage hysteresis  
+
8.0  
7.4  
9.8  
VCCUV  
-
9
VCCUVHY  
ILK  
High-side floating well offset supply leakage  
Quiescent VBS supply current  
50  
75  
VB = VS = 200V  
IQBS  
45  
µA  
V
All inputs are in the  
off state  
IQCC  
VOH  
Quiescent VCC supply current  
300  
0.05  
0.02  
520  
0.2  
0.1  
High level output voltage drop, VBIAS-VO  
Low level output voltage drop, VO  
IO = 2 mA  
VOL  
VO = 0V, VIN = 0V  
PW ≤ 10µs  
VO = 15V, VIN = 5V  
PW ≤ 10µs  
Io+  
Io-  
Output high short circuit pulsed current  
Output low short circuit pulsed current  
200  
420  
290  
600  
mA  
VIH  
VIL  
IIN+  
IIN-  
Logic “1” input voltage  
2.5  
3
0.8  
10  
5
V
Logic “0” input voltage  
Input bias current (HO = High)  
Input bias current (HO = Low)  
VIN = 5V  
VIN = 0V  
µA  
Dynamic Electrical Characteristics  
VCC = VB = 15V, VS = COM, TA = 25oC, and CL = 1000pF unless otherwise specified.  
Symbol Definition  
Min.  
Typ.  
160  
Max. Units Test Conditions  
tON  
tOFF  
tR  
Turn-on propagation delay  
220  
VS = 0V or 200V  
220  
Turn-off propagation delay  
Turn-on rise time  
150  
70  
170  
ns  
VS = 0V  
tF  
Turn-off fall time  
30  
90  
50  
tFIL  
MT  
Minimum pulse input filter time  
300  
Delay matching time (tON, tOFF  
)
4
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IRS2005(S,M)PBF  
Functional Block Diagram  
VB  
UV DETECT  
R
R
S
Q
HV LEVEL  
SHIFTER  
PULSE  
FILTER  
HO  
HIN  
PULSE  
GENERATOR  
VS  
UV DETECT  
VCC  
LO  
LIN  
COM  
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IRS2005(S,M)PBF  
Lead Definitions  
Symbol  
Description  
VCC  
VB  
Low-side and logic supply voltage  
High-side gate drive floating supply  
High voltage floating supply return  
VS  
HIN  
LIN  
HO  
Logic inputs for high-side gate driver output (HO), in phase  
Logic inputs for low-side gate driver output (LO), in phase  
High-side driver output  
LO  
Low-side driver output  
COM  
Low-side gate drive return  
Lead Assignments  
16  
14  
13  
NC  
HIN  
1
2
3
4
12 HO  
17  
11  
VS  
LIN  
9
COM  
NC  
6
7
8
5
8-Lead SOIC  
IRS2005S  
16-Lead MLPQ 4x4  
IRS2005M  
Central exposed pad (17) is internally connected to ground. It is recommended to connect the central exposed  
pad to COM externally for better electrical performance.  
6
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February 6, 2023  
IRS2005(S,M)PBF  
Application Information and Additional Details  
Figure 1. Input/Output Timing Diagram  
Figure 2. Switching Time Waveform Definitions  
Figure 3. Delay Matching Waveform Definitions  
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IRS2005(S,M)PBF  
Figure 4A. Turn-On Delay Time vs. Temperature  
Figure 4C. Turn-On Delay Time vs. Input Voltage  
Figure 5B. Turn-Off Delay Time vs. Supply Voltage  
Figure 4B. Turn-On Delay Time vs. Supply Voltage  
Figure 5A. Turn-Off Delay Time vs. Temperature  
Figure 5C. Turn-Off Time vs. Input Voltage  
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IRS2005(S,M)PBF  
Figure 6A. Turn-On Rise Time vs. Temperature  
Figure 6B. Turn-On Rise Time vs. Voltage  
Figure 7A. Turn-Off Fall Time vs. Temperature  
Figure 7B. Turn-Off Fall Time vs. Voltage  
Figure 8A. Logic “1” Input Voltage vs.  
Temperature  
Figure 8B. Logic “1” Input Voltage vs. Voltage  
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IRS2005(S,M)PBF  
Figure 9A. Logic “0” Input Voltage vs.  
Temperature  
Figure 9B. Logic “0” Input Voltage vs. Supply  
Voltage  
Figure 10A. High Level Output Voltage vs.  
Temperature  
Figure 10B. High Level Output vs. Supply Voltage  
Figure 11A. Low Level Output Voltage vs.  
Temperature  
Figure 11B. Low Level Output vs. Supply Voltage  
10  
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IRS2005(S,M)PBF  
Figure 12A. Offset Supply Current vs. Temperature  
Figure 12B. Offset Supply Current vs. Voltage  
Figure 13A. VBS Supply Current vs. Temperature  
Figure 13B. VBS Supply Current vs. Voltage  
Figure 14A. VCC Supply Current vs. Temperature  
Figure 14B. VCC Supply Current vs. Voltage  
11  
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February 6, 2023  
IRS2005(S,M)PBF  
Figure 15A. Logic “1” Input Current vs.  
Temperature  
Figure 15B. Logic “1” Input Current vs. Voltage  
Figure 16A. Logic “0” Input Bias Current  
Figure 16B. Logic “0” Input Bias Current  
Figure 17A. VCC\VBS Undervoltage Threshold(+) vs.  
Temperature  
Figure 17B. VCC\VBS Undervoltage Threshold(-) vs.  
Temperature  
12  
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IRS2005(S,M)PBF  
Figure 18A. Output Source Current vs.  
Temperature  
Figure 18B. Output Source Current vs. Supply  
Current  
Figure 19A. Output Sink Current vs. Temperature  
Figure 19B. Output Sink Current vs. Supply Voltage  
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February 6, 2023  
IRS2005(S,M)PBF  
Package Details: 8-Lead SOIC  
14  
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IRS2005(S,M)PBF  
Tape and Reel Details: 8-Lead SOIC  
LOADED TAPE FEED DIRECTION  
A
B
H
D
F
C
NOTE : CONTROLLING  
DIMENSION IN MM  
E
G
CARRIER TAPE DIMENSION FOR 8SOICN  
Metric Imperial  
Code  
A
B
C
D
E
F
G
H
Min  
7.90  
3.90  
11.70  
5.45  
6.30  
5.10  
1.50  
1.50  
Max  
8.10  
4.10  
12.30  
5.55  
6.50  
5.30  
n/a  
Min  
Max  
0.318  
0.161  
0.484  
0.218  
0.255  
0.208  
n/a  
0.311  
0.153  
0.46  
0.214  
0.248  
0.200  
0.059  
0.059  
1.60  
0.062  
F
D
B
C
A
E
G
H
REEL DIMENSIONS FOR 8SOICN  
Metric  
Imperial  
Code  
A
B
C
D
E
F
G
H
Min  
329.60  
20.95  
12.80  
1.95  
98.00  
n/a  
14.50  
12.40  
Max  
330.25  
21.45  
13.20  
2.45  
102.00  
18.40  
17.10  
14.40  
Min  
12.976  
0.824  
0.503  
0.767  
3.858  
n/a  
Max  
13.001  
0.844  
0.519  
0.096  
4.015  
0.724  
0.673  
0.566  
0.570  
0.488  
15  
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February 6, 2023  
IRS2005(S,M)PBF  
Package Details: 14-Lead MLPQ 4x4  
16  
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February 6, 2023  
IRS2005(S,M)PBF  
Tape and Reel Details: 14-Lead MLPQ 4x4  
17  
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February 6, 2023  
IRS2005(S,M)PBF  
Part Marking Information  
8-Lead SOIC8  
IRS2005SPBF  
14-Lead MLPQ 4x4  
IRS2005MPBF  
18  
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February 6, 2023  
IRS2005(S,M)PBF  
Qualification Information  
Industrial††  
Comments: This family of ICs has passed JEDEC’s Industrial  
qualification. IR’s Consumer qualification level is granted by  
extension of the higher Industrial level.  
Qualification Level  
8 Lead SOIC  
MSL2†††, 260C  
(per IPC/JEDEC J-STD-020)  
Moisture Sensitivity Level  
14-Lead MLPQ 4x4  
Class 2  
Human Body Model  
Machine Model  
(per JEDEC standard JESD22-A114)  
ESD  
Class A  
(per EIA/JEDEC standard EIA/JESD22-A115)  
Class I  
(per JESD78)  
Yes  
IC Latch-Up Test  
RoHS Compliant  
††  
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/  
Higher qualification ratings may be available should the user have such requirements. Please contact your  
International Rectifier sales representative for further information.  
†††  
Higher MSL ratings may be available for the specific package types listed here. Please contact your International  
Rectifier sales representative for further information.  
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February 6, 2023  

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