IRS2183 [INFINEON]
HALF-BRIDGE DRIVER; 半桥驱动器
| 型号： | IRS2183 |
| 厂家： | 
Infineon |
| 描述： | HALF-BRIDGE DRIVER |
| 文件： | 总24页 (文件大小：486K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD60265
IRS2183/IRS21834(S)PbF
HALF-BRIDGE DRIVER
Packages
Features
Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt
•
•
8-Lead PDIP
IRS2183
•
immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V and 5 V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/- 5 V offset
Lower di/dt gate driver for better noise immunity
Output source/sink current capability 1.4 A/1.8 A
•
14-Lead PDIP
IRS21834
•
•
•
•
14-Lead SOIC
IRS21834S
•
•
8-Lead SOIC
IRS2183S
Description
The IRS2183/IRS21834 are high voltage,
high speed power MOSFET and IGBT
Feature Comparison
drivers with dependent high and low
side referenced output channels. Pro-
prietary HVIC and latch immune CMOS
technologies enable ruggedized mono-
lithic construction. The logic input is
compatible with standard CMOS or
LSTTL output, down to 3.3 V logic. The
output drivers feature a high pulse cur-
rent buffer stage designed for minimum
Cross-
Input
logic
conduction
prevention
logic
Deadtime
(ns)
Ton/Toff
(ns)
Part
Ground Pins
COM
2181
21814
2183
21834
2184
HIN/LIN
HIN/LIN
IN/SD
no
none
180/220
180/220
680/270
VSS/COM
COM
Internal 5000
Program 400-5000
Internal 5000
yes
yes
V
SS/COM
COM
21844
Program 400-5000
VSS/COM
driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT
in the high side configuration which operates up to 600 V.
Typical Connection
up to 600 V
VCC
VCC
VB
HO
VS
HIN
LIN
HIN
LIN
TO
LOAD
COM
LO
up to 600 V
IRS2183
IRS21834
HO
VB
VCC
HIN
LIN
DT
VCC
HIN
LIN
VS
TO
LOAD
(Refer to Lead Assignment for correct pin
configuration) These diagrams show electrical
connections only. Please refer to our Application
VSS
COM
LO
VSS
RDT
Notes and DesignTips for proper circuit board layout.
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1
IRS2183/IRS21834(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Min.
Max.
Units
V
V
-0.3
620 (Note 1)
B
V
B
- 20
V
+ 0.3
+ 0.3
S
B
V
HO
V
- 0.3
V
B
S
V
Low side and logic fixed supply voltage
Low side output voltage
-0.3
-0.3
20 (Note 1)
CC
V
V
LO
V
+ 0.3
+ 0.3
+ 0.3
+ 0.3
CC
V
DT
Programmable deadtime pin voltage (IR21834 only)
Logic input voltage (HIN & LIN)
- 0.3
V
SS
CC
CC
CC
V
V
- 0.3
- 20
V
V
IN
SS
V
SS
Logic ground (IR21834 only)
V
CC
dV /dt
Allowable offset supply voltage transient
—
50
V/ns
W
S
(8-lead PDIP)
—
—
—
—
—
—
—
—
—
-50
—
1.0
0.625
1.6
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
(8-lead PDIP)
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
P
D
Package power dissipation @ T ≤ +25 °C
A
1.0
125
200
75
Rth
Thermal resistance, junction to ambient
JA
°C/W
°C
120
150
150
300
T
J
Junction temperature
T
Storage temperature
S
T
L
Lead temperature (soldering, 10 seconds)
Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V and V offset rating are tested with all supplies biased at 15 V differential.
S
SS
Symbol
Definition
Min.
Max.
Units
V
B
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
V
+ 10
V + 20
S
S
V
S
Note 2
600
V
HO
V
S
V
B
V
CC
10
0
20
V
V
LO
V
CC
LIN)
Logic input voltage (HIN &
V
V
CC
V
IN
SS
DT
Programmable deadtime pin voltage (IR21834 only)
Logic ground (IR21834 only)
V
CC
V
SS
V
SS
-5
-40
5
T
A
Ambient temperature
125
°C
Note 2: Logic operational for V of -5 V to +600 V. Logic state held for V of -5 V to -V . (Please refer to the Design Tip
S
S
BS
DT97-3 for more details).
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2
IRS2183/IRS21834(S)PbF
Dynamic Electrical Characteristics
V
(V , V ) = 15 V, V = COM, C = 1000 pF, T = 25 °C, DT = V unless otherwise specified.
BIAS CC BS
L
A
SS
SS
Symbol
Definition
Turn-on propagation delay
Turn-off propagation delay
Min. Typ. Max. Units Test Conditions
t
—
—
—
—
—
280
4
180
220
0
270
330
35
V = 0V
S
on
off
t
V
= 0V or 600V
S
MT
Delay matching
t
- t
| on off |
ns
t
t
Turn-on rise time
40
20
400
5
60
r
V
= 0 V
S
Turn-off fall time
35
f
DT
Deadtime: LO turn-off to HO turn-on(DT
520
6
R
DT
= 0 Ω
LO-HO) &
HO turn-off to LO turn-on (DT
µs
R
= 200 kΩ (IR21834)
HO-LO)
DT
—
—
0
50
R
=0 Ω
DT
ns
MDT
Deadtime matching = |DTLO-HO - DTHO-LO
|
0
600
R
DT
= 200kΩ (IR21834)
Static Electrical Characteristics
V
(V , V ) = 15 V, V = COM, DT= V
and T = 25 °C unless otherwise specified. The V , V and I
SS A IL IH, IN
BIAS CC BS
SS
parameters are referenced to V /COM and are applicable to the respective input leads: HIN and LIN. The V , I and
SS
O O,
Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
Logic “1” input voltage for HIN & logic “0” for
LIN
2.5
—
—
IH
V
= 10 V to 20 V
CC
V
IL
Logic “0” input voltage for HIN & logic “1” for
LIN
—
—
—
—
20
0.4
—
—
—
—
0.8
1.2
0.2
50
V
V
OH
High level output voltage, V
- V
O
I
O
= 0 A
BIAS
V
OL
Low level output voltage, V
—
I
= 20 mA
O
O
I
LK
Offset supply leakage current
Quiescent V supply current
—
V = V = 600 V
B S
µA
I
60
1.0
25
—
150
1.6
60
QBS
BS
V
= 0 V or 5 V
IN
I
Quiescent V supply current
CC
mA
QCC
I
Logic “1” input bias current
Logic “0” input bias current
HIN = 5 V, LIN = 0 V
LIN
= 5 V
IN+
µA
I
IN-
1.0
HIN = 0 V,
V
V
and V supply undervoltage positive going
CC BS
CCUV+
8.0
7.4
0.3
8.9
8.2
0.7
9.8
9.0
—
V
threshold
V and V supply undervoltage negative going
CC
BSUV+
V
CCUV-
BS
V
V
threshold
BSUV-
V
CCUVH
Hysteresis
V
BSUVH
V
= 0 V,
O
I
Output high short circuit pulsed current
Output low short circuit pulsed current
1.4
1.8
1.9
2.3
—
—
O+
PW ≤ 10 µs
= 15 V,
A
V
O
I
O-
PW ≤ 10 µs
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3
IRS2183/IRS21834(S)PbF
Functional Block Diagrams
VB
UV
DETECT
2183
HO
R
R
S
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFT
VS
HIN
PULSE
GENERATOR
DT
DEADTIME &
SHOOT-THROUGH
PREVENTION
VCC
LO
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
LIN
COM
VSS
VB
UV
21834
DETECT
HO
R
R
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
S
VSS/COM
LEVEL
SHIFT
HIN
DT
VS
PULSE
GENERATOR
DEADTIME &
SHOOT-THROUGH
PREVENTION
VCC
LO
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
LIN
COM
VSS
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4
IRS2183/IRS21834(S)PbF
Lead Definitions
Symbol Description
Logic input for high side gate driver output (HO), in phase (referenced to COM for IRS2183
and VSS for IRS21834)
HIN
ꢀꢁꢂ
Logic input for low side gate driver output (LO), out of phase (referenced to COM for IRS2183
and VSS for IRS21834)
DT
Programmable deadtime lead, referenced to VSS. (IRS21834 only)
Logic ground (IRS21834 only)
VSS
V
B
High side floating supply
HO
High side gate driver output
V
S
High side floating supply return
V
CC
Low side and logic fixed supply
LO
Low side gate driver output
COM
Low side return
Lead Assignments
V
V
B
1
2
3
4
HIN
LIN
B
8
7
1
2
3
4
HIN
LIN
8
7
HO
HO
V
S
V
S
COM
LO
6
5
COM
LO
6
5
V
V
CC
CC
8-Lead PDIP
8-Lead SOIC
IRS2183PbF
IRS2183SPbF
14
13
12
11
10
9
14
13
12
11
10
9
1
2
3
4
5
6
7
HIN
1
2
3
4
5
6
7
HIN
LIN
V
V
LIN
B
B
HO
HO
VSS
DT
VSS
DT
V
S
V
S
COM
LO
COM
LO
8
8
V
V
CC
CC
14-Lead PDIP
14-Lead SOIC
IRS21834PbF
IRS21834SPbF
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5
IRS2183/IRS21834(S)PbF
ꢀꢁꢂ
ꢃꢁꢂ
ꢅꢆꢇ
ꢅꢆꢇ
ꢀꢁꢂ
ꢐ
ꢐ
ꢐ
ꢔ
ꢐ
ꢑ
ꢒꢓ
ꢒꢔꢔ
ꢈꢆꢇ
ꢈꢆꢇ
ꢃꢄ
ꢉꢆꢇ
ꢉꢆꢇ
ꢀꢄ
ꢀꢄ
Figure 1. Input/Output Timing Diagram
ꢅꢆꢇ
ꢅꢆꢇ
ꢃꢁꢂ
ꢐ
ꢐ
ꢐ
ꢔ
ꢐ
ꢒꢓ
ꢒꢔꢔ
ꢈꢆꢇ
ꢑ
ꢈꢆꢇ
ꢉꢆꢇ
ꢉꢆꢇ
ꢃꢄ
Figure 2. Switching Time Waveform Definitions
ꢅꢆꢇ
ꢅꢆꢇ
ꢃꢁꢂ
ꢀꢁꢂ
ꢈꢆꢇ
ꢊꢋ
ꢉꢆꢇ
ꢃꢄ
ꢀꢄ
ꢀꢄꢌꢃꢄ
ꢊꢋ
ꢃꢄꢌꢀꢄ
ꢈꢆꢇ
ꢉꢆꢇ
ꢍꢊꢋꢎ
ꢊꢋ
ꢌꢏꢏꢊꢋ
ꢀꢄꢌꢃꢄ
ꢃꢄꢌꢀꢄ
Figure 3. Deadtime Waveform Definitions
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6
IRS2183/IRS21834(S)PbF
500
400
500
400
300
200
100
0
Max.
300
Max.
Typ.
Typ.
200
100
0
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 4A. Turn-On Propagation Delay
Figure 4B. Turn-On Propagation Delay
vs. Temperature
vs. Supply Voltage
600
500
600
500
400
300
200
100
400 Max.
300
Typ.
Max.
Typ.
200
100
0
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 5B. Turn-Off Propagation Delay
Figure 5A. Turn-Off Propagation Delay
vs. Supply Voltage
vs. Temperature
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7
IRS2183/IRS21834(S)PbF
120
100
120
100
80
60
40
20
0
Max.
80
60
Typ.
Max.
Typ.
40
20
0
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 6A. Turn-On Rise Time vs. Temperature
Figure 6B. Turn-On Rise Time vs. Supply Voltage
80
80
60
60
40
20
0
Max.
40
Max.
Typ
Typ.
20
0
-50
-25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 7A. Turn-Off Fall Time vs. Temperature
Figure 7B. Turn-Off Fall Time vs. Supply Voltage
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8
IRS2183/IRS21834(S)PbF
1100
900
1100
900
700
500
300
100
700
Max.
Max.
Typ.
500
Typ.
Min.
Min.
300
100
-50 -25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 8A. Deadtime vs. Temperature
Figure 8B. Deadtime vs. Supply Voltage
7
6
5
4
3
2
1
6
5
4
3
2
1
0
Max.
Typ.
Min.
Min.
0
0
50
100
(k
150
200
-50
-25
0
25
50
75
100 125
Temperature (oC)
R
)
Ω
DT
Figure 8C. Deadtime vs. R
Figure 9A. Logic "1" Input Voltage
vs. Temperature
DT
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9
IRS2183/IRS21834(S)PbF
6
5
4
3
2
6
5
4
3
2
1
0
Min.
Max.
1
0
-50
-25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
V
BAIS Supply Voltage (V)
Figure 9B. Logic "1" Input oltage
vs. Supply Voltage
Figure 10A. Logic "0" Input Voltage
vs. Temperature
5
4
3
2
1
0
6
5
4
3
2
1
0
Max.
Max.
-50
-25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 11A. High Level Output vs. Temperature
Figure 10B. Logic "0" Input Voltage
vs. Supply Voltage
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10
IRS2183/IRS21834(S)PbF
0.5
0.4
0.3
5
4
3
2
1
0
0.2
Max.
0.1
0.0
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 11B. High Level Output vs. Supply Voltage
Figure 12A. Low Level Output vs. Temperature
0.5
0.4
0.3
500
400
300
200
Max.
0.2
0.1
0.0
100
Max.
0
10
12
14
16
18
20
-50 -25
0
25
50
75
100 125
Temperature (oC)
Supply Voltage (V)
Figure 13A. Offset Supply Leakage Current
vs. Temperature
Figure 12B. Low Level Output vs. Supply Voltage
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11
IRS2183/IRS21834(S)PbF
500
400
300
200
100
0
250
200
Max.
150
Typ.
100
Max.
50
Min.
0
100
200
300
400
500
600
-50
-25
0
25
50
75
100 125
VB Boost Voltage (V)
Temperature (oC)
Figure 13B. Offset Supply Leakage Current
vs. VB Boost Voltage
Figure 14A. VBS Supply Current
vs. Temperature
250
5
4
3
2
1
0
200
150
100
50
Max.
Max.
Typ.
Min.
Typ.
Min.
0
-50 -25
0
25
50
75 100 125
10
12
14
16
18
20
Temperature (oC)
VBS Floating Supply Voltage (V)
Figure 14B. VBS Supply Current
vs. VBS Floating Supply Voltage
Figure 15A. VCC Supply Current
vs. Temperature
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12
IRS2183/IRS21834(S)PbF
5
4
3
2
1
0
120
100
80
60
Max.
40
Typ.
20
0
10
12
14
16
18
20
-50 -25
0
25
50
75
100 125
V
CC Supply Voltage (V)
Temperature (oC)
Figure 16A. Logic "1" Input Bias Current
vs. Temperature
Figure 15B. VCC Supply Current
vs. VCC Supply Voltage
5
4
3
2
1
0
120
100
80
60
40
20
0
Max.
Max.
Typ.
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 16B. Logic "1" Input Bias Current
vs. Supply Voltage
Figure 17A. Logic "0" Input Bias Current
vs. Temperature
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13
IRS2183/IRS21834(S)PbF
12
11
5
4
3
2
1
0
Max.
10
Typ.
9
Min.
8
Max.
7
6
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 17B. Logic "0" Input Bias Current
vs. Supply Voltage
Figure 18. VCC and VBS Undervoltage Threshold (+)
vs. Temperature
12
11
10
9
5
4
3
2
1
0
Max.
Typ.
Min.
Typ.
Min.
8
7
6
-50
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Temperature (oC)
Temperature (oC)
Figure 20A. Output Source Current
vs. Temperature
Figure 19. VCC and VBS Undervoltage Threshold (-)
vs. Temperature
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IRS2183/IRS21834(S)PbF
5.0
4.0
5
4
3
2
1
0
3.0
Typ.
Typ.
Min.
2.0
Min.
1.0
-50
-25
0
25
50
75
100 125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 21A. Output Sink Current
vs. Temperature
Figure 20B. Output Source Current
vs. Supply Voltage
140
120
100
80
5
4
3
2
1
0
140 V
70 V
0 V
Typ.
Min.
60
40
20
10
12
14
16
18
20
1
10
100
1000
Supply Voltage (V)
Frequency (kHz)
Figure 21B. Output Sink Current
vs. Supply Voltage
Figure 22. IR2S183 vs. Frequency (IRFBC20),
Rgate=33 , VCC=15 V
Ω
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15
IRS2183/IRS21834(S)PbF
140
120
100
80
140
120
100
140 V
140 V
80
70 V
70 V
0 V
0 V
60
60
40
40
20
20
1
10
Frequency (kHz)
Figure 24. IRS2183 vs. Frequency (IRFBC40),
Rgate=15 , VCC=15 V
100
1000
1
10
100
1000
Frequency(kHz)
Figure 23. IRS2183 vs. Frequency (IRFBC30),
Rgate=22 , VCC=15 V
Ω
Ω
140 V
70 V
140
120
100
80
140
120
100
80
0 V
60
60
140 V
70 V
0 V
40
40
20
20
1
10
Frequency (kHz)
Figure 26. IRS21834 vs. Frequency (IRFBC20),
Rgate=33 , VCC=15 V
100
1000
1
10
100
1000
Frequency (kHz)
Figure 25. IRS2183 vs. Frequency (IRFPE50),
Rgate=10 , VCC=15 V
Ω
Ω
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16
IRS2183/IRS21834(S)PbF
140
120
100
80
140
120
100
140 V
80
70 V
140 V
70 V
0 V
60
40
20
0 V
60
40
20
1
10
Frequency (kHz)
Figure 28. IRS21834 vs. Frequency (IRFBC40),
100
1000
1
10
Frequency (kHz)
Figure 27. IRS21834 vs. Frequency (IRFBC30),
Rgate=22 , VCC=15 V
100
1000
Rgate=15 , VCC=15 V
Ω
Ω
140 V
140
120
100
80
140
120
100
80
70 V
0 V
140 V
70 V
0 V
60
60
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (kHz)
Frequency (kHz)
Figure 30. IRS2183S vs. Frequency (IRFBC20),
Rgate=33 , VCC=15 V
Figure 29. IRS21834 vs. Frequency (IRFPE50),
Rgate=10 , VCC=15 V
Ω
Ω
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17
IRS2183/IRS21834(S)PbF
140V 70 V
140
140
120
100
80
120
140 V
70 v
0 V
0 V
100
80
60
40
20
60
40
20
1
10
Frequency (kHz)
Figure 32. IRS2183S vs. Frequency (IRFBC40),
Rgate=15 , VCC=15 V
100
1000
1
10
Frequency (kHz)
Figure 31. IRS2183S vs. Frequency (IRFBC30),
Rgate=22 , VCC=15 V
100
1000
Ω
Ω
140V 70V 0 V
140
120
100
80
140
120
100
80
60
60
140 V
70 V
0 V
40
40
20
20
1
10
100
1000
1
10
Frequency (kHz)
Figure 34. IRS21834S vs. Frequency (IRFBC20),
Rgate=33 , VCC=15 V
100
1000
Frequency (kHz)
Figure 33. IRS2183S vs. Frequency (IRFPE50),
Rgate=10 , VCC=15 V
Ω
Ω
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18
IRS2183/IRS21834(S)PbF
140
120
100
80
140
120
100
140 V
70 V
80
140 V
0 V
70 V
0 V
60
60
40
40
20
20
1
10
Frequency (kHz)
Figure 36. IRS21834S vs. Frequency (IRFBC40),
Rgate=15 , VCC=15 V
100
1000
1
10
100
1000
Frequency(kHz)
Figure 35. IRS21834S vs. Frequency (IRFBC30),
Rgate=22 , VCC=15 V
Ω
Ω
140V 70 V
0 V
140
120
100
80
60
40
20
1
10
100
1000
Frequency (kHz)
Figure 37. IRS21834S vs. Frequency (IRFPE50),
Rgate=10 , VCC=15 V
Ω
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19
IRS2183/IRS21834(S)PbF
Case outlines
01-6014
8-Lead PDIP
01-3003 01 (MS-001AB)
IN C H E S
MILLIMETERS
DIM
A
D
B
MIN
MAX
.0688
.0098
.020
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
FOOTPRINT
8X 0.72 [.028]
5
.0532
A
A1 .0040
b
c
.013
.0075
.189
.0098
.1968
.1574
8
1
7
2
6
3
5
6
D
E
e
H
E
.1497
0.25 [.010]
A
.050 BASIC
1.27 BASIC
6.46 [.255]
4
e 1 .025 BASIC
0.635 BASIC
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
3X 1.27 [.050]
e
6X
8X 1.78 [.070]
K x 45°
e1
A
C
y
0.10 [.004]
8X c
8X L
A1
B
8X b
7
0.25 [.010]
C A
5
6
7
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
8-Lead SOIC
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20
IRS2183/IRS21834(S)PbF
01-6010
01-3002 03 (MS-001AC)
14-Lead PDIP
01-6019
01-3063 00 (MS-012AB)
14-Lead SOIC (narrow body)
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21
IRS2183/IRS21834(S)PbF
Tape & Reel
8-lead SOIC
LOADED TA PE FEED DIRECTION
A
B
H
D
F
C
N OTE : CONTROLLING
D IMENSION IN MM
E
G
CA R RIE R TA P E D IM E NS IO N FO R 8 S O ICN
M etr ic
Im p erial
Co d e
M in
7 .9 0
3 .9 0
11 .7 0
5 .4 5
6 .3 0
5 .1 0
1 .5 0
1 .5 0
M ax
8.1 0
4.1 0
1 2. 30
5.5 5
6.5 0
5.3 0
n/a
M in
M ax
0 .3 18
0 .1 61
0 .4 84
0 .2 18
0 .2 55
0 .2 08
n/a
A
B
C
D
E
F
0.31 1
0.15 3
0 .4 6
0.21 4
0.24 8
0.20 0
0.05 9
0.05 9
G
H
1.6 0
0 .0 62
F
D
B
C
A
E
G
H
RE E L D IM E NS IO N S FO R 8 S O IC N
M etr ic
Im p erial
Co d e
M in
32 9.60
20 .9 5
12 .8 0
1 .9 5
98 .0 0
n /a
14 .5 0
12 .4 0
M ax
3 30 .2 5
2 1. 45
1 3. 20
2.4 5
1 02 .0 0
1 8. 40
1 7. 10
1 4. 40
M in
1 2 .9 76
0.82 4
0.50 3
0.76 7
3.85 8
n /a
M ax
13 .0 0 1
0 .8 44
0 .5 19
0 .0 96
4 .0 15
0 .7 24
0 .6 73
0 .5 66
A
B
C
D
E
F
G
H
0.57 0
0.48 8
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22
IRS2183/IRS21834(S)PbF
Tape & Reel
14-lead SOIC
LOADED TA PE FEED DIRECTION
A
B
H
D
F
C
N OTE : CONTROLLING
D IMENSION IN MM
E
G
CA R RIE R TA P E D IM E NS IO N FO R 1 4 S O IC N
M etr ic
Im p erial
Co d e
M in
7 .9 0
3 .9 0
15 .7 0
7 .4 0
6 .4 0
9 .4 0
1 .5 0
1 .5 0
M ax
8.1 0
4.1 0
1 6. 30
7.6 0
6.6 0
9.6 0
n/a
M in
M ax
0 .3 18
0 .1 61
0 .6 41
0 .2 99
0 .2 60
0 .3 78
n/a
A
B
C
D
E
F
0.31 1
0.15 3
0.61 8
0.29 1
0.25 2
0.37 0
0.05 9
0.05 9
G
H
1.6 0
0 .0 62
F
D
B
C
A
E
G
H
RE E L D IM E NS IO N S FO R 1 4 SO IC N
M etr ic
Im p erial
Co d e
M in
32 9.60
20 .9 5
12 .8 0
1 .9 5
98 .0 0
n /a
18 .5 0
16 .4 0
M ax
3 30 .2 5
2 1. 45
1 3. 20
2.4 5
1 02 .0 0
2 2. 40
2 1. 10
1 8. 40
M in
1 2 .9 76
0.82 4
0.50 3
0.76 7
3.85 8
n /a
M ax
13 .0 0 1
0 .8 44
0 .5 19
0 .0 96
4 .0 15
0 .8 81
0 .8 30
0 .7 24
A
B
C
D
E
F
G
H
0.72 8
0.64 5
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23
IRS2183/IRS21834(S)PbF
LEADFREE PART MARKING INFORMATION
Part number
Date code
IRSxxxxx
IR logo
YWW?
?XXXX
Pin 1
Identifier
Lot Code
(Prod mode - 4 digit SPN code)
?
MARKING CODE
P
Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS2183PbF
8-Lead SOIC IRS2183SPbF
8-Lead SOIC Tape & Reel IRS2183STRPbF
14-Lead PDIP IRS21834PbF
14-Lead SOIC IRS21834SPbF
14-Lead SOIC Tape & Reel IRS21834STRPbF
The SOIC-8 is MSL2 qualified.
The SOIC-14 is MSL3 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com <http://www.irf.com/>
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 6/19/2006
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24
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