IRSM836-084MA_技术文档

IRSM836-084MA

7A, 250V

Integrated Power Module for

Small Appliance Motor Drive Applications

Description

IRSM836-084MA is a 7A, 250V Integrated Power Module (IPM) designed for advanced appliance motor

drive applications such as energy efficient fans and pumps. IR's technology offers an extremely compact, high

performance AC motor-driver in an isolated package. This advanced IPM offers a combination of IR's low R_DS(on)

Trench MOSFET technology and the industry benchmark 3-phase high voltage, rugged driver in a small PQFN

package. At only 12x12mm and featuring integrated bootstrap functionality, the compact footprint of this surface-

mount package makes it suitable for applications that are space-constrained. Integrated over-current protection,

fault reporting and under-voltage lockout functions deliver a high level of protection and fail-safe operation.

IRSM836-084MA functions without a heat sink.

Features



Integrated gate drivers and bootstrap functionality

Open-source for leg-shunt current sensing

Protection shutdown pin

Low R_DS(on)Trench MOSFET

IRSM836-084MA

Under-voltage lockout for all channels

Matched propagation delay for all channels

Optimized dV/dt for loss and EMI trade offs

3.3V Schmitt-triggered active high input logic

Cross-conduction prevention logic

Motor power range up to ~150W, without heat sink

Isolation 1500VRMS min

Standard Pack

Base Part Number

Package Type

Orderable Part Number

Form

Quantity

2000

Tape and Reel

Tray

IRSM836-084MATR

IRSM836-084MA

36L

IRSM836-084MA

PQFN 12 x 12 mm

800

All part numbers are PbF

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February 9, 2016

IRSM836-084MA

Internal Electrical Schematic

VB1 VB2 VB3

IRSM836-084MA

V+

VCC

HIN1

HIN2

HIN3

LIN1

U, VS1

V, VS2

W, VS3

600V

3-Phase

Driver

HVIC

LIN2

LIN3

FAULT

ITRIP

EN

RCIN

COM

VRU

VRV

VRW

VSS

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the module may occur. These are not tested at

manufacturing. All voltage parameters are absolute voltages referenced to VSS unless otherwise stated in the table.

Symbol

Description

Min

---

Max

250

Unit

BV_DSS

MOSFET Blocking Voltage

V

I_O@ T=25°C

DC Output Current per MOSFET

Pulsed Output Current (Note 1)

Maximum Power Dissipation per MOSFET

Isolation Voltage (1min) (Note 2)

Operating Junction Temperature

Lead Temperature (Soldering, 30 seconds)

Storage Temperature

---

7

A

I_OP

---

27

P_d@ T_C=25°C

---

40

W

V_RMS

°C

V

V_ISO

T_J

---

1500

150

-40

T_L

---

260

T_S

-40

150

V_S1,2,3

V_B1,2,3

V_CC

V_IN

High Side Floating Supply Offset Voltage

High Side Floating Supply Voltage

Low Side and Logic Supply voltage

Input Voltage of LIN, HIN, I_TRIP, EN, RCIN, FLT

V_B1,2,3- 20

-0.3

V_SS-0.3

V_B1,2,3+0.3

250

V

20

V

V_CC+0.3

V

Note 1: Pulse Width = 100µs, TC =25°C, Duty=1%.

Note 2: Characterized, not tested at manufacturing

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February 9, 2016

IRSM836-084MA

Recommended Operating Conditions

Symbol

Description

Min

---

Max

200

V_S+20

18.5

5

Unit

V

V+

Positive DC Bus Input Voltage

High Side Floating Supply Offset Voltage

High Side Floating Supply Voltage

Low Side and Logic Supply Voltage

Input Voltage of LIN, HIN, I_TRIP, EN, FLT

PWM Carrier Frequency

V_S1,2,3

V_B1,2,3

V_CC

(Note 3)

V_S+10

11.5

0

V

V_IN

V

F_p

---

20

kHz

The Input/Output logic diagram is shown in Figure 1. For proper operation the module should be used within the

recommended conditions. All voltages are absolute referenced to COM. The V_Soffset is tested with all supplies biased at 15V

differential.

Note 3: Logic operational for V_sfrom COM-5V to COM+250V. Logic state held for V_sfrom COM-5V to COM-V_BS

.

Static Electrical Characteristics

(V_CC-COM) = (V_B-V_S) = 15 V. T_A= 25^oC unless otherwise specified. The V_INand I_INparameters are referenced to V_SSand are

applicable to all six channels. The

parameters are referenced to V_SS. The

parameters are referenced to V_S.

V_CCUV

V_BSUV

Symbol

Description

Min

Typ

Max

Units

Conditions

BV_DSS

Drain-to-Source Breakdown Voltage

250

---

V

T_J=25°C, I_LK=250µA

Leakage Current of High Side FET’s in

Parallel

I_LKH

0.5

1.5

µA

T_J=25°C, V_DS=250V

Leakage Current of Low Side FET’s in

Parallel Plus Gate Drive IC

I_LKL

R_DS(ON)

V_SD

T_J=25°C, V_CC=15V,

I_D=2A

T_J=25°C, V_CC=15V,

I_D=2A

Drain to Source ON Resistance

---

0.31

0.8

0.45

---

Ω

Mosfet Body Diode Forward Voltage

V

V_IN,th+

V_IN,th-

Positive Going Input Threshold

Negative Going Input Threshold

2.5

---

V

0.8

V_CCUV+,

V_BSUV+

V_CCand V_BSSupply Under-Voltage,

Positive Going Threshold

8

8.9

8.2

0.7

9.8

9

V

V_CCUV-,

V_BSUV-

V_CCand V_BSsupply Under-Voltage,

Negative Going Threshold

7.4

---

V_CCUVH,

V_BSUVH

V_CCand V_BSSupply Under-Voltage

Lock-Out Hysteresis

---

I_QBS

Quiescent V_BSSupply Current V_IN=0V

Quiescent V_CCSupply Current V_IN=0V

Input Bias Current V_IN=4V

---

125

3.35

180

1

µA

mA

µA

V

I_QCC

I_IN+

---

100

--

I_IN-

Input Bias Current V_IN=0V

---

I_TRIP+

I_TRIP-

V_{IT, TH+}

I_TRIPBias Current V_ITRIP=4V

I_TRIPBias Current V_ITRIP=0V

I_TRIPThreshold Voltage

---

5

40

---

--

1

0.37

0.46

0.55

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February 9, 2016

IRSM836-084MA

V_{IT, TH-}

V_{IT, HYS}

I_TRIPThreshold Voltage

I_TRIPInput Hysteresis

---

0.4

---

V

0.06

Internal Bootstrap Equivalent Resistor

Value

R_BR

---

200

---

Ω

T_J=25°C

V_RCIN,TH

R_ON,FLT

RCIN Positive Going Threshold

FLT Open-Drain Resistance

---

8

---

V

50

100

Ω

Dynamic Electrical Characteristics

(V_CC-COM) = (V_B-V_S) = 15 V. T_A= 25^oC unless otherwise specified.

Symbol

Description

Min

Typ

Max

Units

Conditions

Input to Output Propagation Turn-On

Delay Time

T_ON

---

0.7

1.5

µs

I_D=1mA, V+=50V

See Fig.2

Input to Output Propagation Turn-Off

Delay Time

T_OFF

---

0.7

1.5

T_FIL,IN

Input Filter Time (HIN, LIN)

Input Filter Time (EN)

200

100

---

330

200

330

600

700

---

ns

V_IN=0 & V_IN=4V

T_FIL,EN

V_IN=0 & V_IN=4V

T_BLT-ITRIPI_TRIPBlanking Time

V_IN=0 & V_IN=4V, V_I/Trip=5V

V_IN=0 & V_IN=4V

T_FLT

T_EN

Itrip to Fault

1000

EN Falling to Switch Turn-Off

V_IN=0 & V_IN=4V

I_TRIPto Switch Turn-Off Propagation

Delay

T_ITRIP

---

950

1300

ns

I_D=1A, V+=50V, See Fig. 3

MOSFET Avalanche Characteristics

Symbol

Description

Min

Typ

Max

Units

Conditions

EAS

Single Pulse Avalanche Energy

---

139

---

mJ

Note 4

Note 4: From characterization of TO-220 packaged devices. Starting T_J=25°C, L=3mH, V_DD=75V, I_AS=10A

Thermal and Mechanical Characteristics

Symbol

Description

Min

Typ

Max

Units

Conditions

Total Thermal Resistance Junction to

Case Top

R_th(J-CT)

---

21

---

°C/W

One device

Total Thermal Resistance Junction to

Case Bottom

R_th(J-CB)

---

2.9

---

°C/W

One device

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February 9, 2016

IRSM836-084MA

Qualification Information†

Industrial^††

(per JEDEC JESD 47E)

Qualification Level

MSL3^†††

(per IPC/JEDEC J-STD-020C)

Moisture Sensitivity Level

Class B

Machine Model

ESD

(per JEDEC standard JESD22-A115)

Class 2

Human Body Model

(per standard ESDA/JEDEC JS-001-2012)

RoHS Compliant

Yes

†

Qualification standards can be found at International Rectifier’s web site http://www.irf.com/

††

Higher qualification ratings may be available should the user have such requirements. Please contact

your International Rectifier sales representative for further information.

††† Higher MSL ratings may be available for the specific package types listed here. Please contact your

International Rectifier sales representative for further information.

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February 9, 2016

IRSM836-084MA

Input/Output Pin Equivalent Circuit Diagrams

V_B

ESD

Diode

20 V

Clamp

HO

V_S

ESD

Diode

V_CC

ESD

600 V

Diode

V_CC

HIN,

LIN,

20 V

Clamp

or EN

ESD

Diode

33k

Diode

25 V

Clamp

V_SS

LO

ESD

Diode

COM

V_CC

ESD

Diode

RCIN or

FAULT

ITRIP

V_SS

ESD

Diode

ESD

Diode

1M

V_SS

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February 9, 2016

IRSM836-084MA

Input-Output Logic Level Table

V+

Ho

Lo

Hin1,2,3

Lin1,2,3

Gate

Driver

IC

U, V, W

EN

1

Itrip

0

Hin1,2,3 Lin1,2,3 U,V,W

1

0

X

0

1

0

X

V+

0

1

0

1

0

off

1

0

X

HIN1,2,3

LIN1,2,3

I_TRIP

U,V,W

Figure 1: Input/Output Logic Diagram

7

February 9, 2016

IRSM836-084MA

V

I_D

V

DS

90% I_D

50%

_IN/L_IN

90% I_D

H /L

H

50%

_IN/L_IN

IN IN

V

H

DS

H /L

IN IN

50%

V

CE

10% I_D

t_f

t_r

T_ON

T_OFF

Figure 2a: Input to Output propagation turn-on

Figure 2b: Input to Output propagation turn-off

delay time.

I_F

V_DS

H_IN/L_IN

I_rr

t_rr

Figure 2c: Diode Reverse Recovery.

Figure 2: Switching Parameter Definitions

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February 9, 2016

IRSM836-084MA

HIN1,2,3

LIN1,2,3

50%

I_TRIP

U,V,W

50%

T_ITRIP

T_FLT-CLR

Figure 3: I_TRIPTiming Waveform

9

February 9, 2016

IRSM836-084MA

Module Pin-Out Description

Name

Description

1

HIN3

Logic Input for High Side Gate Driver - Phase 3

Logic Input for Low Side Gate Driver - Phase 1

Logic Input for Low Side Gate Driver - Phase 2

Logic Input for Low Side Gate Driver - Phase 3

Fault Output Pin

2

LIN1

LIN2

LIN3

/FLT

3

4

5

6

Itrip

Over-Current Protection Pin

7

EN

Enable Pin

8

RCin

VSS, COM

Reset Programming Pin

9, 39

Ground for Gate Drive IC and Low Side Gate Drive Return

10, 11,30,

37

U, VS1

Output 1, High Side Floating Supply Offset Voltage

12, 13

14, 15

VR1

VR2

Phase 1 Low Side FET Source

Phase 2 Low Side FET Source

16, 17, 38 V, VS2

Output 2, High Side Floating Supply Offset Voltage

Output 3, High Side Floating Supply Offset Voltage

Phase 3 Low Side FET Source

18, 19

20, 21

22-29

31

W, VS3

VR3

V+

DC Bus Voltage Positive

VB1

High Side Floating Supply Voltage 1

High Side Floating Supply Voltage 2

High Side Floating Supply Voltage 3

15V Supply

32

VB2

33

VB3

34

VCC

HIN1

HIN2

35

Logic Input for High Side Gate Driver - Phase 1

Logic Input for High Side Gate Driver - Phase 2b

36

26

25

24

23

22

21

20

27

28

29

Note

Top View

19

18

Pads 37 and 38 can be omitted

from the PCB footprint and hence

do not need to be soldered

38

All pins with the same name are

internally connected. For example,

pins 10, 11, 30 and 37 are

internally connected.

30

31

37

17

16

32

33

39

15

14

13

34

35

36

12

1 2 3 4 5 6 7 8 9

10

11

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February 9, 2016

IRSM836-084MA

Fault Reporting and Programmable Fault Clear Timer

The IRSM836-084MA provides an integrated fault reporting output and an adjustable fault clear timer.

There are two situations that would cause the IRSM836-084MA to report a fault via the FLT pin. The first is an

under-voltage condition of VCC and the second is when the ITRIP pin recognizes a fault.

The fault clear timer provides a means of automatically re-enabling the module operation a preset amount

of time after the fault condition has disappeared. When a fault condition occurs, the fault diagnostic output (FLT)

stays in the low state until the fault condition has been removed and the fault clear timer expires; once the fault

clear timer expires, the voltage on the FLT pin will return to the logic-high voltage. Figure 4a is a block-level

diagram that focuses on the fault diagnostic and fault clear timer functionality of the driver chip within the module.

The fault clear timer is defined with a simple resistor-capacitor (RC) network on the RCin pin, as shown in Figure

4b.

Figure 5 is a timing diagram showing the states of the FLT and RCin pins during both normal operation and

under a fault condition. Under normal operation, both FLT and RCin are in high impedance (open drain) states.

C_RCINis fully-charged, and FLT is pulled up high. When a fault condition occurs, RCin and FLT are pulled low to

VSS – C_RCINis discharged; once the fault condition has been removed, RCin returns to a high impedance state

and the fault clear timer begins – that is, C_RCINstarts charging via R_RCIN. t_FLTCLRseconds later – when the RCin

voltage crosses a datasheet-defined threshold of V_RCIN,TH, FLT returns to a high impedance state and the module

is operational again. t_FLTCLRis determined by a simple RC network, shown in Figure 6 - R_RCINand C_RCINdetermine

how long the voltage at the RCin pin takes to reach the V_RCIN,THfixed threshold.

V

cc

HIN (x3)

LIN (x3)

VB (x3)

IRSM836-084MA

EN

V (x3)

S

FLT

R

RCIN

ITRIP

C

RCIN

VRx

SS

V

I

-

Figure 4a: Block diagram showing internal

Figure 4b: Programming the fault clear timer

functioning of fault diagnostic and fault clear timer

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February 9, 2016

IRSM836-084MA

ITRIP

V_RCIN

t_FLTCLR

V_CC

V_RCIN,TH

Time

V_SS

V_FAULT

High

Impedance State

V_SS

Figure 5: RCIN and FLT pin waveforms

The design guidelines for this network are shown in Table 1. C_RCINneeds to be small enough so that the

discharge of the capacitor occurs before the fault condition disappears. If the fault condition disappears before the

C_RCINcapacitor is sufficiently discharged, the module will be stuck in fault mode. To achieve sufficiently high fault

clear time, it is thus recommend R_RCINbe increased while C_RCINbe kept small.

≤1 nF

C_RCIN

Ceramic

0.5 MΩ to 2 MΩ

R_RCIN

>> R_ON,RCIN

Table 1: Design guidelines

The length of the fault clear time period can be determined by using the formula below.



V_{RCIN ,TH}







t_FLTCLR 



R_RCINC_RCIN



ln 1



V_CC





If the fault clear timer functionality is not needed, it is sufficient to pull the RCin pin up to VCC with R_RCIN≥ 10kΩ.

In this case, C_RCINis not needed.

12

February 9, 2016

IRSM836-084MA

Typical Application Connection IRSM836-084MA

VB2

IRSM836-084MA

VB1

VB3

VBUS

2M

VCC

HVIC

HIN1

XTAL0

PWMUH

PWMVH

HIN2

HIN3

LIN1

LIN2

U, VS1

PWMWH

XTAL1

AIN2

V, VS2

W, VS3

PWMUL

PWMVL

SPD-REF

PWMWL

GATEKILL

LIN3

FAULT

IRMCK171

IT RIP

EN

AIN1

IF B+

IF B-

6.04k

Power

Supply

VDD

RCIN

VSS

COM

2M

VDDCAP

VSS

IF BO

1nF

7.68k

4.87k

0.5

1. Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible to reduce

ringing and EMI problems. Additional high frequency ceramic capacitor mounted close to the module pins

will further improve performance.

2. In order to provide good decoupling between VCC-VSS and VB1,2,3-VS1,2,3 terminals, the capacitors

shown connected between these terminals should be located very close to the module pins. Additional

high frequency capacitors, typically 0.1µF, are recommended.

3. Value of the boot-strap capacitors depends upon the switching frequency. Their selection should be made

based on IR application note AN-1084.

4. PWM generator must be disabled within Fault duration to guarantee shutdown of the system. Over-

current condition must be cleared before resuming operation.

13

February 9, 2016

IRSM836-084MA

Current Capability in a Typical Application

Figure 6 shows the current capability for this module at specified conditions. The current capability of the

module is affected by application conditions including the PCB layout, ambient temperature, maximum PCB

temperature, modulation scheme, PCB copper thickness and so on. The curves below were obtained from

measurements carried out on the IRMCS1471_R4 reference design board which includes the IRSM836-084MA

and IR’s IRMCF171 digital control IC.

150V, ∆Tca = 70

1200

1000

800

600

1oz, 3P

1oz, 2P

400

200

0

6

8

10

12

14

16

18

20

Carrier Frequency (kHz)

150V, ∆Tca = 40

1000

900

800

700

600

500

400

300

200

100

0

1oz, 3P

1oz, 2P

6

8

10

12

14

16

18

20

Carrier Frequency (kHz)

Figure 6: Maximum Sinusoidal Phase Current vs. PWM Switching Frequency

Sinusoidal Modulation, V⁺=150V, PF=0.98

14

February 9, 2016

IRSM836-084MA

PCB Example

Figure 7 below shows an example layout for the application PCB. The effective area of the V+ top-layer

copper plane is ~3cm² in this example. For an FR4 PCB with 1oz copper, R_th(J-A)is about 40°C/W. A lower R_th(J-A)

can be achieved using thicker copper and/or additional layers.

Module

Figure 7: PCB layout example and corresponding thermal image (6kHz, 2P, 2oz, ∆Tca=70°C, V+ = 150V, Iu = 870mArms, Po

= 148W)

At the module’s typical operating conditions, dV/dt of the phase node voltage is influenced by the load

capacitance which includes parasitic capacitance of the PCB, MOSFET output capacitance and motor winding

capacitance. To turn off the MOSFET, the load capacitance needs to be charged by the phase current. For the

IRMCS1171 reference design, turn-off dV/dt ranges from 2 to 5 V/ns depending on the phase current magnitude.

Turn-on dV/dt is influenced by PCB parasitic capacitance and motor winding capacitance and typically ranges

from 4 to 6 V/ns. The MOSFET turn-on loss combined with the complimentary body diode reverse recovery loss

comprises the majority of the total switching losses. Two-phase modulation can be used to reduce switching

losses and run the module at higher phase currents.

15

February 9, 2016

IRSM836-084MA

36L Package Outline IRSM836-084MA (Bottom View)

Dimensions in mm

16

February 9, 2016

IRSM836-084MA

36L Package Outline IRSM836-084MA (Bottom View)

Dimensions in mm

17

February 9, 2016

IRSM836-084MA

36L Package Outline IRSM836-084MA (Top and Side View)

18

February 9, 2016

IRSM836-084MA

Top Marking

1.1 Site Code (H or C)

1.2 Last 4 characters of the production order prior to “.n” (n = 1 or 2 digit split indicator)

1.3 Lead Free Released: P

Lead Free Samples: W

Engineering / DOE: Y

1.4 Date Code: YWW (Y = last digit of the production calendar year. WW is week number in the

calendar year)

1.5 Part Number: IRSM836-084MA

1.6 IR Logo

19

February 9, 2016

IRSM836-084MA

Revision History

Published by

Infineon Technologies AG

81726 München, Germany

IMPORTANT NOTICE

The information given in this document shall in no event be regarded as a guarantee of conditions or

characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated

herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims

any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of

intellectual property rights of any third party.

In addition, any information given in this document is subject to customer’s compliance with its obligations stated

in this document and any applicable legal requirements, norms and standards concerning customer’s products

and any use of the product of Infineon Technologies in customer’s applications.

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of

customer’s technical departments to evaluate the suitability of the product for the intended application and the

completeness of the product information given in this document with respect to such application.

For further information on the product, technology, delivery terms and conditions and prices please contact your

nearest Infineon Technologies office (www.infineon.com).

WARNINGS

Due to technical requirements products may contain dangerous substances. For information on the types in

question please contact your nearest Infineon Technologies office.

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized

representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications

where a failure of the product or any consequences of the use thereof can reasonably be expected to result in

personal injury.

20

February 9, 2016


型号：	IRSM836-084MA
厂家：	Infineon
描述：	CIPOS™ Nano 250 V, 0.45 Ω three-phase intelligent power module
文件：	总20页 (文件大小：731K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IRSM836-084MA [INFINEON]

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