IRU3039CHTR_技术文档

Data Sheet No. PD94649

IRU3039

SYNCHRONOUS PWM CONTROLLER

WITH OVER CURRENT PROTECTION

FEATURES

DESCRIPTION

The IRU3039 controller IC is designed to provide a syn-

chronous Buck regulator and is targeted for applications

where the cost and size is critical. The IRU3039 oper-

Current Limit using Lower MOSFET Sensing

Using the 6V internal regulator for charge pump

circuit allows single supply operation up to 18V

Programmable Switching Frequency up to 400KHz ates with a single input supply up to 18V. The output

Soft-Start Function

voltage can be programmed as low as 0.8V for low volt-

age applications. Selectable current limit is provided to

tailor to external MOSFET’s on-resistance for optimum

cost and performance. The IRU3039 features an uncom-

mitted error amplifier for tracking output voltage and is

capable of sourcing or sinking current for applications

such as DDR bus termination.

0.8V Precision Reference Voltage Available

Uncommitted Error Amplifier Available for DDR

Voltage Tracking Applications

Stable with Ceramic Capacitor

APPLICATIONS

DDR Memory VDDQ/VTT Applications

Graphic Card

This device features a programmable switching frequency

set from 200KHz to 400KHz, under-voltage lockout for

both Vcc and Vc supplies, an external programmable

soft-start function as well as output under-voltage detec-

tion that latches off the device when an output short is

detected.

Hard Disk Drive

Netcom on-board DC to DC regulator application

Output voltage as low as 0.8V

Low Cost On-Board DC to DC

TYPICAL APPLICATION

18V

D1

L1

C3

1uF

C9

1uF

1uH

C2

3x 15uF

25V

C1

15uF

C4

1uF

C5

0.1uF

VOUT2

Vcc

Vc

SS / SD

Q1

IRF7466

C7

0.1uF

U1

IRU3039

HDrv

D2

L2

4.7uH

R2

3.3V @ 8A

OCSet

VP

5.76K

V

REF

C6

2x 330uF

40mΩ

Q2

IRF7458

Rt

Comp

LDrv

R3

3.16K

C8

5600pF

C11

Optional

Fb

Gnd

PGnd

R4

1K

R1

14K

Figure 1 - Typical application of IRU3039.

PACKAGE ORDER INFORMATION

TA (°C)

0 To 70

DEVICE

IRU3039CH

PACKAGE

20-Pin MLPQ 5x5 (H)

Rev. 1.0

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IRU3039

ABSOLUTE MAXIMUM RATINGS

Vcc Supply Voltage .................................................. -0.5V To 25V

Vc Supply Voltage .................................................... -0.5V To 25V

Storage Temperature Range ...................................... -65°C To 150°C

Operating Junction Temperature Range .....................

0°C To 125°C

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device.

PACKAGE INFORMATION

20-Pin MLPQ 5x5 (H)

*θJA=378C/W

θJC=2.38C/W

20 19

18 17

16

V

REF

1

15 VOUT2

14 NC

13 NC

12 Rt

NC 2

*Exposed pad on

underside is con-

nected to a typical 1"

square copper pad

through vias for 4-

layer PCB board

design.

Pad

3

4

NC

Vcc

11

NC 5

NC

6

7

8

10

9

ELECTRICAL SPECIFICATIONS

Unless otherwise specified, specifications apply over Vcc=5V, Vc=12V and TA=0-70°C. Typical values refer to 258C.

Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temp.

PARAMETER

SYM

TEST CONDITION

MIN

TYP

MAX UNITS

Feedback Voltage

Fb Voltage Initial Accuracy

Fb Voltage Line Regulation

Reference Voltage

Ref Voltage Initial Accuracy

Drive Current

VFB

0.784 0.800 0.816

0.3

V

%

LREG

4.75V<Vcc<20V

VREF

IREF

0.784

0.8

2

0.816

V

µA

Note 1

UVLO

UVLO Threshold - Vcc

UVLO Hysteresis - Vcc

UVLO Threshold - Vc

UVLO Hysteresis - Vc

UVLO Threshold - Fb

Supply Current

UVLO VCC Supply Ramping Up

UVLO VC Supply Ramping Up

UVLO Fb Fb Ramping Down

4.4

0.26

3.47

0.20

0.4

V

0.3

0.5

Vcc Dynamic Supply Current

Vc Dynamic Supply Current

Vcc Static Supply Current

Vc Static Supply Current

Dyn ICC

Dyn IC

ICCQ

Freq=200KHz, CL=1500pF

SS=0V

7

5

3

15

9

mA

9

4

ICQ

SS=0V

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IRU3039

PARAMETER

SYM

TEST CONDITION

SS=3V

MIN

TYP

MAX UNITS

Error Amp

Fb Voltage Input Bias Current

Transconductance

VP Voltage Range

Soft-Start Section

Charge Current

Oscillator Section

Frequency

Ramp Amplitude

Output Drivers

IFB1

IFB2

-1

+0.08

55

700

+1

70

µA

SS=0V

30

µmho

V

VP

Note 1

0.8

14

1.5

35

SS IB

Freq

SS=0V

Rt=Open

Rt=Gnd

Note 1

22

µA

200

400

1.25

KHz

VRAMP

VPP

Tr(LO)

Tr(HI)

Tf(LO)

Tf(HI)

TDB

Lo Drive Rise Time

Hi Drive Rise Time

Lo Drive Fall Time

Hi Drive Fall Time

Dead Band Time

Max Duty Cycle

CLOAD=1500pF, VCC=12V

CLOAD=1500pF

40

100

ns

%

CLOAD=1500pF

40

100

88

HDrv going Hi or Low

Fb=0.6V, Freq=200KHz

Fb=1.0V

DMAX

DMIN

Min Duty Cycle

0

%

Internal Regulator

Output Voltage

VOUT2

IOUT2

Vcc=12V

5.7

40

6

6.3

V

Drive Current

65

mA

Current Limit

OC Threshold Set Current

OC Comp Off-Set Voltage

IOCSET

21

-2

28

35

5

µA

VOC(OFFSET)

1.5

mV

Note 1: Guaranteed by design but not tested for production.

PIN DESCRIPTIONS

PIN#

PIN SYMBOL

PIN DESCRIPTION

1

4

VREF

Vcc

Reference Voltage. This pin can source current about 2µA.

This pin provides biasing for the internal blocks of the IC as well as power for the low side

FET driver. A minimum of 1µF, high frequency capacitor must be connected from this pin

to ground to provide peak drive current capability.

6

7

LDrv

PGnd

Output driver for the synchronous power MOSFET.

This pin serves as the separate ground for MOSFET's driver and should be connected to

system's ground plane.

8

9

Gnd

This pin serves as analog ground for internal reference and control circuitry. A high fre-

quency capacitor must be connected from Vcc pin to this pin for noise free operation.

Output driver for the high side power MOSFET. This pin should not go negative (below

ground), this may cause problem for the gate drive circuit. It can happen when the inductor

current goes negative (Source/Sink), soft-start at no load and for the fast load transient

from full load to no load. To prevent negative voltage at gate drive, a low forward voltage

drop diode might be connected between this pin and ground.

HDrv

10

12

Vc

Rt

This pin is connected to a voltage that must be at least 4V higher than the bus voltage of

the switcher (assuming 5V threshold MOSFET) and powers the high side output driver. A

minimum of 1µF, high frequency capacitor must be connected from this pin to ground to

provide peak drive current capability.

The switching frequency can be Programmed between 200KHz and 400KHz by connect-

ing a resistor between Rt and Gnd. By floating the pin, the switching frequency will be

200KHz and by grounding the pin, the switching frequency will be 400KHz.

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IRU3039

PIN DESCRIPTIONS

PIN#

PIN SYMBOL

PIN DESCRIPTION

15

VOUT2

Output of internal regulator. The output is protected for short circuit. A high frequency

capacitor is recommended to be connected from this pin to ground.

This pin is connected to the Drain of the lower MOSFET via an external resister and it

provides the positive sensing for the internal current sensing circuitry. The external resis-

tor programs the current limit threshold depending on the RDS(ON) of the power MOSFET.

An external capacitor can be placed in parallel with the programming resistor to provide

high frequency noise filtering.

16

OCSet

This pin provides soft-start for the switching regulator. An internal current source charges

an external capacitor that is connected from this pin to ground which ramps up the output

of the switching regulator, preventing it from overshooting as well as limiting the input

current. The converter can be shutdown by pulling this pin down below 0.4V.

Compensation pin of the error amplifier. An external resistor and capacitor network is

typically connected from this pin to ground to provide loop compensation.

This pin is connected directly to the output of the switching regulator via resistor divider to

provide feedback to the Error amplifier.

17

SS / SD

18

19

Comp

Fb

20

VP

Non-inverting input of error amplifier.

2,3,5,

11,13,14

NC

No connection.

BLOCK DIAGRAM

Vcc 4

Regulator

6V

15 VOUT2

0.8V

VREF

1

1.25V

3V

Bias

Generator

1.25V

0.2V

POR

4V

Vc

3V

12 Rt

22uA

3.5V

10

9

Vc

SS / SD 17

POR

64uAMax

Rt

Ct

Oscillator

HDrv

Enbl

S

R

Q

Error Comp

Vcc

Error Amp

25K

VP 20

Reset Dom

Fb 19

6 LDrv

Comp 18

FbLo Comp

PGnd

7

0.4V

3V

28uA

OC Comp

POR

8 Gnd

OCSet 16

Figure 2 - Simplified block diagram of the IRU3039.

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IRU3039

THEORY OF OPERATION

Introduction

3V

20uA

The IRU3039 is a fixed frequency, voltage mode syn-

chronous controller and consists of a precision refer-

ence voltage, an uncommitted error amplifier, an internal

oscillator, a PWM comparator, an internal regulator, a

comparator for current limit, gate drivers, soft-start and

shutdown circuits (see Block Diagram).

SS/SD

Comp

64uA

HDrv

Max

P O R

Error Amp

LDrv

25K

0.8V

The output voltage of the synchronous converter is set

and controlled by the output of the error amplifier; this is

the amplified error signal from the sensed output voltage

and the voltage on non-inverting input of error amplifier(VP).

This voltage is compared to a fixed frequency linear

sawtooth ramp and generates fixed frequency pulses of

variable duty-cycle, which drives the two N-channel ex-

ternal MOSFETs.

Fb

0.4V

64uA×25K=1.6V

P O R

When SS=0

Feeback

UVLO Comp

The timing of the IC is provided through an internal oscil-

lator circuit which uses on-chip capacitor. The oscilla-

tion frequency is programmable between 200KHz to

Figure 3 - Soft-start circuit for IRU3039.

400KHz by using an external resistor. Figure 14 shows The magnitude of this current is inversely proportional to

switching frequency vs. external resistor (Rt).

the voltage at soft-start pin.

Soft-Start

The 20µA current source starts to charge up the exter-

The IRU3039 has a programmable soft-start to control nal capacitor. In the mean time, the soft-start voltage

the output voltage rise and limit the current surge at the ramps up, the current flowing into Fb pin starts to de-

start-up. To ensure correct start-up, the soft-start se- crease linearly and so does the voltage at the positive

quence initiates when the Vc and Vcc rise above their pin of feedback UVLO comparator and the voltage nega-

threshold (3.4V and 4.4V respectively) and generates tive input of E/A.

the Power On Reset (POR) signal. Soft-start function

operates by sourcing an internal current to charge an When the soft-start capacitor is around 1V, the current

external capacitor to about 3V. Initially, the soft-start func- flowing into the Fb pin is approximately 32µA. The volt-

tion clamps the E/A’s output of the PWM converter and age at the positive input of the E/A is approximately:

disables the short circuit protection. During the power

32µA×25K = 0.8V

up, the output starts at zero and voltage at Fb is below

0.4V. The feedback UVLO is disabled during this time The E/A will start to operate and the output voltage starts

by injecting a current (64µA) into the Fb. This generates to increase. As the soft-start capacitor voltage contin-

a voltage about 1.6V (64µA×25K) across the negative ues to go up, the current flowing into the Fb pin will keep

input of E/A and positive input of the feedback UVLO decreasing. Because the voltage at pin of E/A is regu-

comparator (see Figure 3).

lated to reference voltage 0.8V, the voltage at the Fb is:

VFB = 0.8-25K×(Injected Current)

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IRU3039

The feedback voltage increases linearly as the injecting Shutdown

current goes down. The injecting current drops to zero The converter can be shutdown by pulling the soft-start

when soft-start voltage is around 2V and the output volt- pin below 0.4V. The control MOSFET turns off and the

age goes into steady state.

synchronous MOSFET turns on during shutdown.

As shown in Figure 4, the positive pin of feedback UVLO Over-Current Protection

comparator is always higher than 0.4V, therefore, feed- Over-current protection is achieved with a cycle by cycle

back UVLO is not functional during soft-start.

scheme and it is performed by sensing current through

the RDS(ON) of low side MOSFET. As shown in Figure 5,

an external resistor (RSET) is connected between OCSet

pin and the drain of low side MOSFET (Q2) and sets the

current limit set point. The internal current source devel-

ops a voltage across RSET. When the low side switch is

turned on, the inductor current flows through the Q2 and

results a voltage which is given by:

Output of UVLO

POR

3V

@2V

@1V

Soft-Start

Voltage

0V

64uA

Current flowing

into Fb pin

VOCSET = IOCSET×RSET-RDS(ON)×iL

---(1)

0uA

@1.6V

Voltage at negative input

of Error Amp and Feedback

UVLO comparator

IOCSET

0.8V

IRU3039

Q1

Q2

L1

VOUT

RSET

OCSet

Osc

0V

Voltage at Fb pin

Figure 4 - Theoretical operational waveforms

during soft-start.

Figure 5 - Diagram of the over current sensing.

the output start-up time is the time period when soft- When voltage VOCSET is below zero, the current sensing

start capacitor voltage increases from 1V to 2V. The start- comparator flips and disables the oscillator. The high

up time will be dependent on the size of the external side MOSFET is turned off and the low side MOSFET is

soft-start capacitor. The start-up time can be estimated turned on until the inductor current reduces to below

by:

current set value. The critical inductor current can be

calculated by setting:

20µA×TSTART/CSS = 2V-1V

VOCSET = IOCSET×RSET - RDS(ON)×IL = 0

For a given start up time, the soft-start capacitor can be

estimated as:

RSET×IOCSET

ISET = IL(CRITICAL) =

---(2)

RDS(ON)

CSS @ 20µA×TSTART/1V

Internal Regulator

If the over-current condition is temporary and goes away

The regulator powers directly from Vcc and generates a quickly, the IRU3039 will resume its normal operation.

regulated voltage (6V @ 40mA). The output is protected

for short circuit. This voltage can be used for charge If output is shorted or over-current condition persists,

pump circuitry as shown in Figure 1.

the output voltage will keep going down until it is below

0.4V. Then the output under-voltage lock out comparator

goes high and turns off both MOSFETs. The operation

Supply Voltage Under-Voltage Lockout

The under-voltage lockout circuit assures that the waveforms are shown in Figure 6.

MOSFET driver outputs remain in the off state whenever

the supply voltage drops below set parameters. Lockout

occurs if Vc or Vcc fall below 3.4V and 4.4V respec-

tively. Normal operation resumes once Vc and Vcc rise

above the set values.

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IRU3039

From Figure 7, the average inductor current during the

current limit mode is:

V

REF

Feedback

voltage

0.4V

∆IPK-PK(LIM)

IO(LIM) = ISET +

---(4)

2

FS(NOM)

IOUT

Switching

frequency

The inductor's ripple current can be expressed as:

(VIN - VOUT)×VOUT

∆IPK-PK(LIM) =

I

OUT

VIN×L×fS

D

MAX/FS(NOM)

V

OUT

High Side MOSFET

turn on time (tON)

Combination of above equation and (4) results in:

F

S(NOM)×VIN

(VIN-VOUT)×VOUT

2×fS×L×VIN

IOUT

ISET = IO(LIM) -

---(5)

(

)

<IL>=IOUT

Combination of equations (5) and (2) results in the rela-

tionship between RSET and output current limit.

Average Inductor

Current

IO(LIM)

I

O(MAX)

IOUT

RSET = ^RDS(ON)× IO(LIM) -

[ (

---(6)

(VIN-VOUT)×VOUT

2×fS×L×VIN

Normal

operation

Over Current

Shutdown

Limit Mode by UVLO

)]

IOCSET

Figure 6 - Diagram of over-current operation.

Where:

IO(LIM) = The Output Current Limit. Typical is 50%

higher than nominal output current

VIN = Maximum Input Voltage

VOUT = Output Voltage

fS = Switching Frequency

L = Output Inductor

Operation in current limit is shown in Figure 7, the high

side MOSFET is turned off and inductor current starts to

decrease. Because the output inductor current is higher

than the current limit setpoint (ISET), the over-current com-

parator keeps high until the inductor current decreases

to be below ISET. Then another cycle starts.

RDS(ON) = RDS(ON) of Low Side MOSFET

IOCSET = OC Threshold Set Current

During over-current mode, the valley inductor current is:

iL(VALLEY) = ISET

From the above analysis, the current limit is not only

dependent on the current setting resistor RSET and RDS(ON)

of low side MOSFET but it is also dependent on the

input voltage, output voltage, inductance and switching

The peak inductor current is given as:

IL(PEAK) = ISET+(VIN-VOUT)×tON/L

---(3)

To avoid undesirable trigger of over-current protection, frequency as well.

this relationship must be satisfied:

The cycle-by-cycle over-current limit will hold for a cer-

∆IPK-PK(NOM)

ISET / IO(NOM) -

tain amount of time, until the output voltage drops below

0.4V, the under-voltage lock out activates and latches

off the output driver. The operation waveform is shown in

Figure 7. Normal operation will resume after IRU3039 is

powered up again.

2

iL(PEAK)

Inductor

Current

iL(AVG)

ISET=iL(VALLEY)

Current Limit

Comparator Output

HDrv

tON

tOFF

Figure 7 - Operation waveforms during current limit.

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IRU3039

APPLICATION INFORMATION

Design Example:

The following example is a typical application for IRU3039,

the schematic is Figure 17 on page 16.

Css @ 20×tSTART (µF)

---(8)

Where tSTART is the desired start-up time (ms)

VIN = 18V

VOUT = 3.3V

IOUT = 8A

For a start-up time of 5ms, the soft-start capacitor will

be 0.1µF. Choose a ceramic capacitor at 0.1µF.

∆VOUT = 100mV (output voltage ripple @ 3% of VOUT)

fS = 200KHz

Boost Supply Vc

To drive the high side switch, it is necessary to supply a

gate voltage at least 4V grater than the bus voltage. This

Output Voltage Programming

Output voltage is programmed by reference voltage and is achieved by using a charge pump configuration as

external voltage divider. The Fb pin is the inverting input shown in Figure 9. This method is simple and inexpen-

of the error amplifier, which is referenced to the voltage sive. The operation of the circuit is as follows: when the

on non-inverting pin of error amplifier. For this applica- lower MOSFET is turned on, the capacitor (C1) is pulled

tion, this pin (VP) is connected to reference voltage (VREF). down to ground and charges, up to VOUT2 value, through

The output voltage is defined by using the following equa- the diode (D1). The bus voltage will be added to this

tion:

voltage when upper MOSFET turns on in next cycle,

and providing supply voltage (Vc) through diode (D2). Vc

is approximately:

R6

R5

VOUT = VP × 1 +

---(7)

( )

VP = VREF = 0.8V

Vc @ VOUT2 + VBUS - (VD1 + VD2)

When an external resistor divider is connected to the Capacitors in the range of 0.1µF and 1µF are generally

output as shown in Figure 8.

adequate for most applications. The diode must be a

fast recovery device to minimize the amount of charge

fed back from the charge pump capacitor into VOUT2. The

diodes need to be able to block the full power rail volt-

age, which is seen when the high side MOSFET is

switched on. For low voltage application, schottky di-

odes can be used to minimize forward drop across the

diodes at start up.

V

OUT

IRU3039

R

6

VREF

Fb

R

5

VP

D1

C3

Figure 8 - Typical application of the IRU3039 for

programming the output voltage.

VOUT2

D2

V

BUS

Vc

Equation (7) can be rewritten as:

Regulator

C2

C1

Q1

VOUT

L2

R6 = R5 ×

- 1

( _VP)

HDrv

Q2

Choose R5 = 1K

This will result toR6 = 3.16K

IRU3039

If the high value feedback resistors are used, the input

bias current of the Fb pin could cause a slight increase

Figure 9 - Charge pump circuit.

in output voltage. The output voltage set point can be Input Capacitor Selection

more accurate by using precision resistor.

The input filter capacitor should be based on how much

ripple the supply can tolerate on the DC input line. The

ripple current generated during the on time of upper

Soft-Start Programming

The soft-start timing can be programmed by selecting MOSFET should be provided by input capacitor. The RMS

the soft-start capacitance value. The start-up time of the value of this ripple is expressed by:

converter can be calculated by using:

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IRU3039

requirements, yet have high enough ESR to satisfy sta-

bility requirements. The ESR of the output capacitor is

calculated by the following relationship:

IRMS = IOUT

D×(1-D)

---(9)

Where:

D is the Duty Cycle, D=VOUT/VIN.

IRMS is the RMS value of the input capacitor current.

IOUT is the output current for each channel.

∆VO

∆IO

ESR ≤

---(10)

Where:

For VIN=20V, IOUT=8A and D=0.165, the IRMS=3A

∆VO = Output Voltage Ripple

∆i = Inductor Ripple Current

∆VO = 100mV and ∆I @ 40% of 8A = 3.2A

This results to: ESR=31mΩ

For higher efficiency, a low ESR capacitor is recom-

mended. Choose three Poscap from Sanyo 25TQC15M

(25V, 15µF, 90mΩ) with a maximum allowable ripple

current of 3A.

The Sanyo TPC series, Poscap capacitor is a good choice.

The 6TPC330M, 330µF, 6.3V has an ESR 40mΩ. Se-

lecting two of these capacitors in parallel, results to an

Inductor Selection

The inductor is selected based on operating frequency, ESR of @ 20mΩ which achieves our low ESR goal.

transient performance and allowable output voltage ripple.

The capacitor value must be high enough to absorb the

Low inductor value results to faster response to step inductor's ripple current. The larger the value of capaci-

load (high ∆i/∆t) and smaller size but will cause larger tor, the lower will be the output ripple voltage.

output ripple due to increase of inductor ripple current.

As a rule of thumb, select an inductor that produces a Power MOSFET Selection

ripple current of 10-40% of full load DC.

The IRU3039 uses two N-Channel MOSFETs. The se-

lections criteria to meet power transfer requirements is

For the buck converter, the inductor value for desired based on maximum drain-source voltage (VDSS), gate-

operating ripple current can be determined using the fol- source drive voltage (VGS), maximum output current, On-

lowing relation:

resistance RDS(ON) and thermal management.

∆i

∆t

1

fS

VOUT

VIN

VIN - VOUT = L×

; ∆t = D×

; D =

The MOSFET must have a maximum operating voltage

(VDSS) exceeding the maximum input voltage (VIN).

VOUT

L = (VIN - VOUT)×

---(11)

VIN×∆i×fS

The gate drive requirement is almost the same for both

MOSFETs. Logic-level transistor can be used and cau-

tion should be taken with devices at very low VGS to pre-

vent undesired turn-on of the complementary MOSFET,

which results a shoot-through current.

Where:

VIN = Maximum Input Voltage

VOUT = Output Voltage

Di = Inductor Ripple Current

fS = Switching Frequency

Dt = Turn On Time

The total power dissipation for MOSFETs includes con-

duction and switching losses. For the Buck converter,

the average inductor current is equal to the DC load cur-

rent. The conduction loss is defined as:

D = Duty Cycle

If ∆i = 37%(IO), then the output inductor will be:

L = 4.65µH

2

PCOND(Upper Switch) = ILOAD×RDS(ON)×D×ϑ

The Coilcraft DO5022HC series provides a range of in-

ductors in different values, low profile suitable for large

currents, 4.7µH, 13A is a good choice for this applica-

tion. This will result to a ripple approximately 37% of

output current.

2

PCOND(Lower Switch) = ILOAD×RDS(ON)×(1 - D)×ϑ

ϑ = RDS(ON) Temperature Dependency

The RDS(ON) temperature dependency should be consid-

ered for the worst case operation. This is typically given

Output Capacitor Selection

The criteria to select the output capacitor is normally in the MOSFET data sheet. Ensure that the conduction

based on the value of the Effective Series Resistance losses and switching losses do not exceed the package

(ESR). In general, the output capacitor must have low ratings or violate the overall thermal budget.

enough ESR to meet output ripple and load transient

Rev. 1.0

06/06/03

www.irf.com

9

IRU3039

Choose IRF7466 for control MOSFET and IRF7458 for These values are taken under a certain condition test.

synchronous MOSFET. These devices provide low on- For more details please refer to the IRF7466 and IRF7458

resistance in a compact SOIC 8-Pin package.

data sheets.

The MOSFETs have the following data:

By using equation (12), we can calculate the total switch-

ing losses.

IRF7466

IRF7458

VDSS = 30V

ID = 11A

RDS(ON) = 12.5mΩ

VDSS = 30V

ID = 14A

RDS(ON) = 8mΩ

PSW(TOTAL) = 92mW

Programming the Over-Current Limit

The over-current threshold can be set by connecting a

resistor (RSET) from drain of low side MOSFET to the

OCSet pin. The resistor can be calculated by using equa-

tion (2).

The total conduction losses will be:

PCON(TOTAL) = PCON(UPPER) + PCON(LOWER)

PCON(TOTAL) = 0.85W

The switching loss is more difficult to calculate, even The RDS(ON) has a positive temperature coefficient and it

though the switching transition is well understood. The should be considered for the worse case operation.

reason is the effect of the parasitic components and

switching times during the switching procedures such

RDS(ON) = 8mΩ×1.5 = 12mΩ

ISET @ IO(LIM) = 8A×1.5 = 12A

as turn-on / turnoff delays and rise and fall times. The

(50% over nominal output current)

control MOSFET contributes to the majority of the switch-

This results to:

RSET = 5.76KΩ

ing losses in synchronous Buck converter. The synchro-

nous MOSFET turns on under zero voltage conditions,

therefore, the turn on losses for synchronous MOSFET Feedback Compensation

can be neglected. With a linear approximation, the total The IRU3039 is a voltage mode controller; the control

switching loss can be expressed as:

loop is a single voltage feedback path including error

amplifier and error comparator. To achieve fast transient

response and accurate output regulation, a compensa-

tion circuit is necessary. The goal of the compensation

network is to provide a closed loop transfer function with

the highest 0dB crossing frequency and adequate phase

margin (greater than 458).

VDS(OFF)

tr + tf

T

PSW =

×

×ILOAD

---(12)

2

Where:

VDS(OFF) = Drain to Source Voltage at off time

tr = Rise Time

tf = Fall Time

T = Switching Period

ILOAD = Load Current

The output LC filter introduces a double pole, –40dB/

decade gain slope above its corner resonant frequency,

and a total phase lag of 1808 (see Figure 11). The Reso-

nant frequency of the LC filter is expressed as follows:

The switching time waveform is shown in Figure 10.

VDS

1

90%

FLC =

---(13)

2π× LO×CO

Figure 11 shows gain and phase of the LC filter. Since

we already have 1808 phase shift just from the output

filter, the system risks being unstable.

10%

Gain

Phase

VGS

08

0dB

td

(ON)

td(OFF)

tr

tf

-40dB/decade

Figure 10 - Switching time waveforms.

From IRF7466 data sheet we obtain:

-180

8

IRF7466

tr = 2.8ns

tf = 3.6ns

F

LC Frequency

F

LC Frequency

Figure 11 - Gain and phase of LC filter.

Rev. 1.0

06/06/03

www.irf.com

10

IRU3039

The IRU3039’s error amplifier is a differential-input First select the desired zero-crossover frequency (Fo):

transconductance amplifier. The output is available for

DC gain control or AC phase compensation.

Use the following equation to calculate R4:

Fo > FESR and FO ≤ (1/5 ~ 1/10)×fS

The E/A can be compensated with or without the use of

1

gm

VOSC

VIN

Fo×FESR

R5 + R6

R5

R4 =

×

---(18)

local feedback. When operated without local feedback,

the transconductance properties of the E/A become evi-

dent and can be used to cancel one of the output filter

poles. This will be accomplished with a series RC circuit

from Comp pin to ground as shown in Figure 12.

2

FLC

Where:

VIN = Maximum Input Voltage

VOSC = Oscillator Ramp Voltage

Fo = Crossover Frequency

Note that this method requires that the output capacitor

should have enough ESR to satisfy stability requirements.

In general, the output capacitor’s ESR generates a zero

typically at 5KHz to 50KHz which is essential for an

acceptable phase margin.

FESR = Zero Frequency of the Output Capacitor

FLC = Resonant Frequency of the Output Filter

R5 and R6 = Resistor Dividers for Output Voltage

Programming

gm = Error Amplifier Transconductance

For:

VIN = 18V

VOSC = 3.3V

Fo = 20KHz

FESR = 12KHz

The ESR zero of the output capacitor expressed as fol-

FLC = 2.8KHz

R5 = 1K

R6 = 3.16K

gm = 700µmho

lows:

1

2π×ESR×Co

FESR =

---(14)

VOUT

This results to R4=12.08K

Choose R4=14K

R6

Fb

Comp

To cancel one of the LC filter poles, place the zero be-

fore the LC filter resonant frequency pole:

Ve

E/A

R5

C9

Vp=VREF

FZ @ 75%FLC

R4

1

FZ @ 0.75×

---(19)

Gain(dB)

2π LO × CO

For:

H(s) dB

Lo = 4.7µH

Co = 660µF

FZ = 2.1KHz

R4 = 14K

Frequency

FZ

Using equations (17) and (19) to calculate C9, we get:

Figure 12 - Compensation network without local

feedback and its asymptotic gain plot.

C9 @ 5300pF; Choose C9=5600pF

One more capacitor is sometimes added in parallel with

C9 and R4. This introduces one more pole which is mainly

used to suppress the switching noise. The additional

pole is given by:

The transfer function (Ve / VOUT) is given by:

R5

1 + sR4C9

sC9

H(s) = gm×

×

---(15)

( )

R6 + R5

1

FP =

The (s) indicates that the transfer function varies as a

function of frequency. This configuration introduces a gain

and zero, expressed by:

C9×CPOLE

C9 + CPOLE

2π×R4×

The pole sets to one half of switching frequency which

results in the capacitor CPOLE:

R5

R6×R5

|H(s=j×2π×FO)| = gm×

×R4

---(16)

1

FZ =

---(17)

CPOLE =

@

π×R4×fS

2π×R4×C9

1

C9

π×R4×fS -

|H(s)| is the gain at zero cross frequency.

fS

2

for FP <<

Rev. 1.0

06/06/03

www.irf.com

11

IRU3039

For a general solution for unconditionally stability for

ceramic capacitor with very low ESR and any type of

output capacitors, in a wide range of ESR values we

should implement local feedback with a compensation

network. The typically used compensation network for

voltage-mode controller is shown in Figure 13.

FP1 = 0

FP2 =

1

2π×R8×C10

1

FP3 =

@

2π×R7×C12

C12×C11

(_C12+C11)

2π×R7×

VOUT

1

ZIN

C12

FZ1 =

FZ2 =

2π×R7×C11

C10

R7

1

C11

@

2π×C10×(R6 + R8)

2π×C10×R6

R8

R6

Zf

Cross Over Frequency:

Fb

VIN

FO = R7×C10×

VOSC

Where:

1

Ve

E/A

---(21)

×

Comp

R5

2π×Lo×Co

Vp=VREF

VIN = Maximum Input Voltage

VOSC = Oscillator Ramp Voltage

Lo = Output Inductor

Gain(dB)

H(s) dB

Co = Total Output Capacitors

The stability requirement will be satisfied by placing the

poles and zeros of the compensation network according

to following design rules. The consideration has been

taken to satisfy condition (20) regarding transconduc-

tance error amplifier.

Frequency

F

Z

1

F

Z

2

F

P

2

FP3

Figure 13 - Compensation network with local

feedback and its asymptotic gain plot.

In such configuration, the transfer function is given by:

These design rules will give a crossover frequency ap-

proximately one-tenth of the switching frequency. The

higher the band width, the potentially faster the load tran-

sient speed. The gain margin will be large enough to

Ve

1 - gmZf

=

VOUT

1 + gmZIN

The error amplifier gain is independent of the transcon- provide high DC-regulation accuracy (typically -5dB to -

ductance under the following condition:

12dB). The phase margin should be greater than 458 for

overall stability.

gmZf >> 1

and

gmZIN >>1

---(20)

By replacing ZIN and Zf according to Figure 9, the trans- Based on the frequency of the zero generated by ESR

former function can be expressed as:

versus crossover frequency, the compensation type can

be different. The table below shows the compensation

type and location of crossover frequency.

(1+sR7C11)×[1+sC10(R6+R8)]

1

×

H(s) =

sR6(C12+C11)

C12C11

1+sR7

×(1+sR8C10)

Compensator

Type

Location of Zero

Crossover Frequency

(FO)

Typical

Output

[ (_C12+C11)]

Capacitor

Electrolytic,

Tantalum

Tantalum,

Ceramic

As known, transconductance amplifier has high imped-

ance (current source) output, therefore, consider should

be taken when loading the E/A output. It may exceed its

source/sink output current capability, so that the ampli-

fier will not be able to swing its output voltage over the

necessary range.

Type II (PI)

FPO < FZO < FO < fS/2

Type III (PID)

Method A

FPO < FO < FZO < fS/2

FPO < FO < fS/2 < FZO

Type III (PID)

Method B

Ceramic

Table - The compensation type and location of zero

crossover frequency.

The compensation network has three poles and two ze-

ros and they are expressed as follows:

Detail information is dicussed in application Note AN-

1043 which can be downloaded from the IR Web-Site.

Rev. 1.0

06/06/03

www.irf.com

12

IRU3039

Layout Consideration

The layout is very important when designing high fre- the ESR, replace the single input capacitor with two par-

quency switching converters. Layout will affect noise allel units. The feedback part of the system should be

pickup and can cause a good design to perform with kept away from the inductor and other noise sources

less than expected results.

and be placed close to the IC. In multilayer PCB, use

one layer as power ground plane and have a separate

Start to place the power components. Make all the con- control circuit ground (analog ground), to which all sig-

nections in the top layer with wide, copper filled areas. nals are referenced. The goal is to localize the high cur-

The inductor, output capacitor and the MOSFET should rent path to a separate loop that does not interfere with

be close to each other as possible. This helps to reduce the more sensitive analog control function. These two

the EMI radiated by the power traces due to the high grounds must be connected together on the PC board

switching currents through them. Place input capacitor layout at a single point.

directly to the drain of the high-side MOSFET. To reduce

450

400

350

300

250

200

0

50

100

150

200

250

300

350

400

450

ΩΩ

Rt (K

)

Figure 14 - Switching Frequency versus Resistor.

Rev. 1.0

06/06/03

www.irf.com

13

IRU3039

TYPICAL APPLICATION

5V

+12V

L1

1uH

C4

1uF

C3

1uF

C2

C1

47uF

2x 150uF

Vcc

Vc

HDrv

Q1

IRF7457

^{SS / SD}U1

D1

C7

L2

0.1uF

IRU3039

R2

7.12K

OCSet

VOUT

3.3uH

V

P

2.5V @ 10A

Q2

IRF7457

REF

LDrv

C6

2x 330uF, 40m

Ω

Rt

V

OUT2

Fb

Comp

C8

2200pF

R3

2.15K

Gnd

PGnd

R1

28K

R4

1K

Figure 15 - Typical application of the IRU3039 with two input supplies.

Rev. 1.0

06/06/03

www.irf.com

14

IRU3039

TYPICAL APPLICATION

5V

12V

L1

5V

1uH

C1

1uF

C2

1uF

C3

2x 100uF, 55m

10TPB100M

C4

47uF

Ω

Vcc Vc

V

REF

P

V

OUT2

Q1

1/2 of IRF7313

HDrv

U1

IRU3039

D1

L2

R7

8K

SS / SD

OCSet

LDrv

V

DDQ

C6

0.1uF

4.7uH

Q1

1/2 of IRF7313

1.8V @ 5A

C7

2x 330uF, 40m

6TPC330M

Ω

PGnd

Rt

R1

Comp

C8

4.7nF

Fb

1.25K

Gnd

R3

1K

R2

27K

5V

12V

C9

1uF

C10

1uF

C11

100uF, 55m

10TPB100M

Ω

V

REF Vcc Vc

R4

1K

Q2

1/2 of IRF7313

U2

P

HDrv

R5

1K

IRU3038

D2

L3

VTT (0.9V @ 3A)

SS / SD

4.7uH

Q2

1/2 of IRF7313

C12

0.15uF

LDrv

C13

2x 330uF, 40m

6TPC330M

Ω

PGnd

Rt

Comp

C14

5.6nF

Fb

Gnd

R6

13K

Figure 16 - Typical application of IRU3039 for DDR memory when IRU3039

generates VCORE and IRU3038 generates the termination voltage.

Rev. 1.0

06/06/03

www.irf.com

15

IRU3039

DEMO-BOARD APPLICATION

18V to 3.3V @ 8A

18V

D1

L1

C11

1uF

C3

1uF

1uH

C2A,B,C

C13

1uF

C1

15uF

3x 15uF

25V

C5

0.1uF

V

OUT2

Vc

HDrv

Vcc

SS / SD

Q1

U1

IRU3039

C6

0.1uF

IRF7466

L2

R4

D2

3.3V

@ 8A

OCSet

4.7uH

V

P

5.76K

C8

C10

0.1uF

470pF

R8

4.7

C9A,B

2x 330uF

40m

REF

LDrv

C12

1uF

Q2

IRF7458

Rt

Ω

Comp

C7

5600pF

R9

3.16K

Gnd

PGnd Fb

R7

14K

R10

1K

Figure 17 - Demo-board application of the IRU3039.

PARTS LIST

Ref Desig Description

Value

Qty

1

Part#

IRF7466

Manuf

Web site (www.)

irf.com

Q1

Q2

U1

D1

D2

L1

MOSFET

Controller

Schottky Diode Fast Switching

30V, 12.5mΩ, 11A

30V, 8mΩ, 14A

Synchronous PWM

IR

1

IRF7458

IRU3039

BAT54S

1

BAT54

Inductor

1µH, 3A

DS1608C-102

DO5022P-472HC

25TQC15M

ECJ-2VF1E104Z

Coilcraft

Sanyo

coilcraft.com

sanyo.com

L2

4.7µH, 13A

15µF, 25V

0.1µF, Y5V, 25V

5600pF, X7R, 50V

470pF, X7R, 50V

330uF, 40mΩ

1µF, Y5V, 16V

1µF, X7R, 25V

5.76K

C1,C2A,B,C Cap, Poscap

4

3

1

C5,6,10

C7

Capacitor

Resistor

Panasonic maco.panasonic.co.jp

ECU-V1H562KBG Panasonic

C8

1

2

3

ECJ-2VC1H471J

6TPB-330M

ECJ-2VF1C105Z

ECJ-3YB1E105K

Panasonic

Sanyo sanyo.com

Panasonic maco.panasonic.co.jp

Panasonic

C9A,B

C3,11,12

C13

R4

1

R7

14K

R8

R9

R10

4.7Ω

3.16K

1K

1

Rev. 1.0

06/06/03

www.irf.com

16

IRU3039

TYPICAL OPERATING CHARACTERISTICS

Test Conditions:

VIN=20V, VOUT=3.3V, IOUT=0-8A, Fs=200KHz

Figure 18 - Normal condition at No Load.

Figure 20 - Soft-Start.

Ch1: HDrv, Ch2: LDrv, Ch4: Inductor Current

Ch1: VIN, Ch2: VOUT, Ch3: VOUT2, Ch4: Vss

Figure 19 - Soft-Start pin grounded.

Ch1: HDrv, Ch2: LDrv

Figure 21 - Output Ripple.

Ch1: Output Ripple, Ch2: HDrv, Ch3: LDrv,

Ch4: Inductor Current

Rev. 1.0

06/06/03

www.irf.com

17

IRU3039

TYPICAL OPERATING CHARACTERISTICS

Test Conditions:

VIN=20V, VOUT=3.3V, IOUT=0-8A, Fs=200KHz

8A

0A

Figure 22 - Output shorted at start up.

Ch1: VOUT, Ch3: Vss, Ch4: Inductor Current

Figure 23 - Load Transient Response

Ch1: VOUT, Ch3: Output Current

90

88

86

84

82

80

78

76

74

72

70

0

1

2

3

4

5

6

7

8

9

10

11

Output Current (A)

Figure 24 - Efficiency Measurement.

VIN=20V, VOUT=3.3V

Rev. 1.0

06/06/03

www.irf.com

18

IRU3039

TYPICAL PERFORMANCE CHARACTERISTICS

For all charts: VC=VCC=12V, 20V, 24V

Note:Data are taken with few samples to indicate the variation of these parameters over the wide temperature range.

0.802

6.2

0.801

6.15

0.8

6.1

0.799

6.05

0.798

12 Volt

20 Volt

6

0.797

24 Volt

12 Volt

20 Volt

24 Volt

5.95

5.9

0.796

0.795

5.85

0.794

0.793

5.8

-45

-10

25

60

95

130

-45

-10

25

60

95

130

Temperature (C)

Figure 28 - VOUT2 vs.Temperature

Figure 25 - VREF vs.Temperature

410

215

214

213

212

211

210

209

405

400

12 Volt

20 Volt

12 Volt

24 Volt

20 Volt

24 Volt

395

390

208

207

206

205

204

385

-45

-10

25

60

95

130

-10

25

60

95

130

Temperature(C)

Temperature (C)

Figure 26 - Frequency vs.Temperature

FS=200KHz

Figure 29 - Frequency vs.Temperature

FS=400KHz

200

150

100

50

200

150

100

50

12 Volts

20 Volts

24 Volts

12 Volts

20 Volts

24 Volts

0

-45

-10

25

60

95

130

-45

-10

25

60

95

130

Temperature (C)

Figure 27 - Deadtime, Control FET Drive

Rising Time vs.Temperature

Figure 30 - Deadtime, Sync FET Drive

Rising Time vs.Temperature

FS=400KHz, CLOAD=3300pF

Rev. 1.0

06/06/03

www.irf.com

19

IRU3039

TYPICAL PERFORMANCE CHARACTERISTICS

For all charts: VC=VCC=12V, 20V, 24V

Note:Data are taken with few samples to indicate the variation of these parameters over the wide temperature range.

200

180

160

140

120

100

80

200

180

160

140

120

100

80

12 Volts

20 Volts

24 Volts

12 Volts

20 Volts

24 Volts

60

40

20

0

-45

-10

25

60

95

130

-45

5

55

105

155

Temperature (C)

Figure 31 - Control FET Drive Rise Time vs.Temp.

FS=400KHz, CLOAD=3300pF

Figure 33 - Control FET Drive Fall Time vs.Temp.

FS=400KHz, CLOAD=3300pF

200

180

160

140

20

18

16

14

12 Volts

120

12

12 Volts

20 Volts

24 Volts

10

8

100

80

60

40

20

0

24 Volts

6

4

2

0

-45

-10

25

60

95

130

-45

-10

25

60

95

130

Temperature (C)

Figure 32 - Sync FET Drive Rise Time vs.Temp.

FS=400KHz, CLOAD=3300pF

Figure 34 - Sync FET Drive Fall Time vs.Temp.

FS=400KHz, CLOAD=3300pF

IR WORLD HEADQUARTERS:233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information

Data and specifications subject to change without notice. 02/01

Rev. 1.0

06/06/03

www.irf.com

20

IRU3039

(H) MLPQ 5x5 Package

20-Pin

D

D/2

D2

EXPOSED PAD

PIN NUMBER 1

PIN 1 MARK AREA

(See Note1)

E/2

E2

E

R

L

e

TOP VIEW

B

BOTTOMVIEW

Note 1: Details of pin #1 are optional, but

must be located within the zone indicated.

The identifier may be molded, or marked

features.

A

A3

A1

SIDE VIEW

20-PIN 5x5

SYMBOL

DESIG

A

MIN

NOM

MAX

1.00

0.05

0.80

0.00

0.90

0.02

0.20 REF

A1

A3

B

0.23

3.00

0.30

5.00 BSC

0.38

3.25

D

D2

E

3.15

5.00 BSC

E2

e

3.15

0.65 BSC

L

0.45

0.55

---

0.65

---

R

0.115

NOTE: ALL MEASUREMENTS

ARE IN MILLIMETERS.

Rev. 1.0

06/06/03

www.irf.com

21

IRU3039

PACKAGE SHIPMENT METHOD

PKG

PACKAGE

PARTS

T & R

DESIG

DESCRIPTION

COUNT

PER TUBE

PER REEL

Orientation

H

MLPQ 5x5

20

---

3000

Fig A

1

Feed Direction

Figure A - Live Bug

IR WORLD HEADQUARTERS:233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information

Data and specifications subject to change without notice. 02/01

Rev. 1.0

06/06/03

www.irf.com

22


型号：	IRU3039CHTR
厂家：	Infineon
描述：	Switching Controller, Voltage-mode, 400kHz Switching Freq-Max, MOS, 5 X 5 MM, MLPQ-20 开关
文件：	总22页 (文件大小：176K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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