IRU3138CSTRPBF [INFINEON]
Switching Regulator/Controller, Voltage-mode, 440kHz Switching Freq-Max, BIPolar, PDSO14,;
| 型号： | IRU3138CSTRPBF |
| 厂家： | 
Infineon |
| 描述： | Switching Regulator/Controller, Voltage-mode, 440kHz Switching Freq-Max, BIPolar, PDSO14, 控制器 |
| 文件： | 总18页 (文件大小：280K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD94701
IRU3138
SYNCHRONOUS PWM CONTROLLER
FOR TERMINATION POWER SUPPLY APPLICATIONS
FEATURES
DESCRIPTION
1A Peak Output Drive Capability
0.8V Precision Reference Voltage Available
Shuts off both drivers at shorted output
and shutdown
The IRU3138 controller IC is designed to provide a low
cost synchronous Buck regulator for voltage tracking
applications such DDR memory and general purpose
on-board DC to DC converter. Modern micro processors
combined with DDR memory, need high-speed bandwidth
data bus which requires a particular bus termination volt-
age. This voltage will be tightly regulated to track the
half of chipset voltage for best performance. The IRU3138
together with two N-channel MOSFETs, provide a low
cost solution for such applications. This device features
a programmable frequency set from 200KHz to 400KHz,
under-voltage lockout for both Vcc and Vc supplies, an
external programmable soft-start function as well as
output under-voltage detection that latches off the de-
vice when an output short is detected.
200KHz to 400KHz operation set by an external
resistor
Soft-Start Function
Uncommitted Error Amplifier available for DDR
voltage tracking application
Protects the output when control FET is shorted
Synchronous Controller in 14-Pin Package
APPLICATIONS
DDR memory source sink Vtt application
Graphic Card
Low cost on-board DC to DC such as
5V to 3.3V, 2.5V or 1.8V
TYPICAL APPLICATION
5V
VDDQ
12V
L1
(2.5V)
1uH
C1
C2
C3
C4
0.1uF
1uF
2x 47uF
47uF
Vcc
Vc
R1
1K
DDR
VREF
Q1
HDrv
Memory
IRF7460
VP
D1
L2
R2
1K
BAT54
SS/SD
U1
IRU3138
Vtt
1.25V @ 10A
C5
0.1uF
3.3uH
Q2
IRF7456
LDrv
C6
2x 150uF
40m Ω
Rt
PGnd
Fb
Comp
C7
3300pF
R3
13K
Gnd
Figure 1 - Typical application of IRU3138 when VTT tracks the VDDQ.
PACKAGE ORDER INFORMATION
TA (°C)
DEVICE
PACKAGE
0 To 70
IRU3138CS
14-Pin Plastic SOIC NB (S)
Rev. 1.0
01/29/04
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1
IRU3138
ABSOLUTE MAXIMUM RATINGS
VCC Supply Voltage .................................................. -0.5V - 25V
VC Supply Voltage .................................................... -0.5V - 25V
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range .....................
0°C To 125°C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device.
PACKAGE INFORMATION
14-PIN PLASTIC SOIC NB (S)
Fb 1
14 NC
V
P
2
3
13 SS/SD
12 Comp
11 Rt
V
REF
Vcc 4
NC 5
10 Vc
LDrv 6
Gnd 7
9 HDrv
8 PGnd
θJA=888C/W
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over VCC=5V, VC=12V and TA=0 to 70°C. Typical values refer
to TA=25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient
temperature.
PARAMETER
SYM
TEST CONDITION
MIN
TYP
MAX
UNITS
Reference Voltage
VREF Voltage
VFB
0.784
0.8
0.816
1.6
V
LREG
Fb Voltage Line Regulation
UVLO
5<VCC<12
mV
UVLO Threshold - VCC
UVLO Hysteresis - VCC
UVLO Threshold - VC
UVLO Hysteresis - VC
UVLO Threshold - Fb
UVLO Hysteresis - Fb
Supply Current
UVLO Vcc Supply Ramping Up
UVLO Vc Supply Ramping Up
4.0
3.0
0.3
4.25
0.25
3.5
0.25
0.4
4.5
3.65
0.5
V
V
V
V
V
V
UVLO Fb
Fb Ramping Down
Note 1
0.02
Dyn Icc
Dyn Ic
ICCQ
VCC Dynamic Supply Current
VC Dynamic Supply Current
VCC Static Supply Current
VC Static Supply Current
Soft-Start Section
Charge Current
Freq=200KHz, CL=3000pF
Freq=200KHz, CL=3000pF
SS=0V
6.5
11
4
8
14
6
mA
mA
mA
mA
ICQ
SS=0V
2.5
4
SSIB
Freq
SS=0V
15
20
26
µA
KHz
V
Oscillator
Frequency
Rt=Open
Rt=Gnd
Note 1
180
360
200
400
1.25
220
440
VRAMP
Ramp Amplitude
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IRU3138
PARAMETER
SYM
TEST CONDITION
SS=3V, Fb=1V
MIN
TYP
MAX
UNITS
Error Amp
Fb Voltage Input Bias Current
Fb Voltage Input Bias Current
VP Voltage Range
Transconductance
Output Drivers
Rise Time
0.1
50
µA
µA
V
IFB1
IFB2
SS=0V, Fb=1V
1.5
0.7
500
800
µmho
GM
1000
Tr
Tf
CLOAD=3000pF
CLOAD=3000pF
35
35
70
70
ns
ns
ns
%
%
Fall Time
Dead Band Time
Max Duty Cycle
Min Duty Cycle
TDB
100
90
Ton Fb=0.7V, Freq=200KHz
Fb=1.5V
85
Toff
0
Note 1: Guaranteed by design, but not tested in production.
PIN DESCRIPTIONS
PIN#
PIN SYMBOL
PIN DESCRIPTION
1
Fb
This pin is connected directly to the output of the switching regulator via resistor divider to
provide feedback to the Error amplifier.
2
3
4
VP
VREF
VCC
Non-inverting input of error amplifier.
Reference Voltage.
This pin provides biasing for the internal blocks of the IC as well as power for the low side
driver. A minimum of 1µF, high frequency capacitor must be connected from this pin to
ground to provide peak drive current capability.
5
14
6
NC
No Connection.
LDrv
Gnd
Output driver for the synchronous power MOSFET.
Analog ground for internal reference and control circuitry. Connect to PGnd with a short
trace.
7
8
9
PGnd
HDrv
This pin serves as the separate ground for MOSFET's drivers and should be connected to
system's ground plane. A high frequency capacitor (0.1µF to 1µF) must be connected
from VCC and VC pins to this pin for noise free operation.
Output driver for the high side power MOSFET. This pin should not go negative (below
ground), this may cause problem for the gate drive circuit. It can happen when the inductor
current goes negative (Source/Sink), soft-start at no load and for the fast load transient
from full load to no load. To prevent negative voltage at gate drive, a low forward voltage
drop diode might be connected between this pin and ground.
10
VC
This pin is connected to a voltage that must be at least 4V higher than the bus voltage of
the switcher (assuming 5V threshold MOSFET) and powers the high side output driver. A
minimum of 1µF, high frequency capacitor must be connected from this pin to ground to
provide peak drive current capability.
11
12
13
Rt
The switching frequency can be Programmed between 200KHz and 400KHz by connect-
ing a resistor between Rt and Gnd. Floating the pin set the switching frequency to 200KHz
and grounding the pin set the switching frequency to 400KHz.
Compensation pin of the error amplifier. An external resistor and capacitor network is
typically connected from this pin to ground to provide loop compensation.
This pin provides soft-start for the switching regulator. An internal current source charges
an external capacitor that is connected from this pin to ground which ramps up the output
of the switching regulator, preventing it from overshooting as well as limiting the input
current. The converter can be shutdown by pulling this pin below 2.8V.
Comp
SS / SD
Rev. 1.0
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IRU3138
BLOCK DIAGRAM
Vcc 4
3V
Bias
Generator
1.25V
0.25V
0.2V
0.8V
VREF
3
1.25V
POR
11 Rt
4.25V
Vc
Vc
10
9
3V
Rt
Oscillator
HDrv
20uA
Ct
3.5V
S
64uA Max
SS/SD 13
POR
Q
Error Comp
Vcc
R
ResetDom
6 LDrv
Error Amp
25K
25K
2
VP
FbLo Comp
8 PGnd
7 Gnd
0.4V
2.8V
SS
Fb 1
12
POR
Comp
Figure 2 - Simplified block diagram of the IRU3138.
Rev. 1.0
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IRU3138
The magnitude of this current is inversely proportional to
the voltage at soft-start pin.
THEORY OF OPERATION
Introduction
The IRU3138 is a fixed frequency, voltage mode syn-
chronous controller and consists of a precision refer-
ence voltage, an error amplifier, an internal oscillator, a
PWM comparator, 1A peak gate driver, soft-start and
shutdown circuits (see Block Diagram). The output volt-
age of the synchronous converter is set and controlled
by the output of the error amplifier; this is the amplified
error signal from the sensed output voltage and the refer-
ence voltage. This voltage is compared to a fixed fre-
quency linear sawtooth ramp and generates fixed fre-
quency pulses of variable duty-cycle, which drives the
two N-channel external MOSFETs.The timing of the IC
is provided through an internal oscillator circuit which
uses on-chip capacitor. The oscillation frequency is pro-
grammable between 200KHz to 400KHz by using an
external resistor. Figure 4A shows switching frequency
vs. external resistor.
The 20µA current source starts to charge up the exter-
nal capacitor. In the mean time, the soft-start voltage
ramps up, the current flowing into Fb pin starts to de-
crease linearly and so does the voltage at the positive
pin of feedback UVLO comparator and the voltage nega-
tive input of E/A.
When the soft-start capacitor is around 1V, the current
flowing into the Fb pin is approximately 32µA. The volt-
age at the positive input of the E/A is approximately:
32µA×25K = 0.8V
The E/A will start to operate and the output voltage starts
to increase. As the soft-start capacitor voltage contin-
ues to go up, the current flowing into the Fb pin will keep
decreasing. Because the voltage at pin of E/A is regu-
lated to reference voltage 0.8V, the voltage at the Fb is:
Soft-Start
VFB = 0.8-25K×(Injected Current)
The IRU3138 has a programmable soft-start to control
the output voltage rise and limit the current surge at the
start-up. To ensure correct start-up, the soft-start se-
quence initiates when the Vc and Vcc rise above their
threshold (3.5V and 4.25V respectively) and generates
the Power On Reset (POR) signal. Soft-start function
operates by sourcing an internal current to charge an
external capacitor to about 3V. Initially, the soft-start func-
tion clamps the E/A’s output of the PWM converter and
disables the short circuit protection. During the power
up, the output starts at zero and voltage at Fb is below
0.4V. The feedback UVLO is disabled during this time
by injecting a current (64µA) into the Fb. This generates
a voltage about 1.6V (64µA×25K) across the negative
input of E/A and positive input of the feedback UVLO
comparator (see Fig3).
The feedback voltage increases linearly as the injecting
current goes down. The injecting current drops to zero
when soft-start voltage is around 2V and the output volt-
age goes into steady state.
As shown in Figure 4, the positive pin of feedback UVLO
comparator is always higher than 0.4V, therefore, feed-
back UVLO is not functional during soft-start.
Output of UVLO
POR
3V
@2V
@1V
Soft-Start
Voltage
0V
3V
20uA
64uA
Current flowing
into Fb pin
64uA
Max
HDrv
LDrv
SS/SD
0uA
@1.6V
Voltage at negative input
of Error Amp and Feedback
UVLO comparator
POR
0.8V
0.8V
Comp
Error Amp
25K
25K
0.8V
Fb
0V
Voltage at Fb pin
0.4V
Figure 4 - Theoretical operational waveforms
during soft-start.
64uA×25K=1.6V
POR
When SS=0
Feeback
UVLO Comp
Figure 3 - Soft-start circuit for IRU3138.
Rev. 1.0
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IRU3138
the output start-up time is the time period when soft- Short-Circuit Protection
start capacitor voltage increases from 1V to 2V. The start- The outputs are protected against the short-circuit. The
up time will be dependent on the size of the external IRU3138 protects the circuit for shorted output by sens-
soft-start capacitor. The start-up time can be estimated ing the output voltage (through the external resistor di-
by:
vider). The IRU3138 turns off both drivers, when the out-
put voltage drops below 0.4V.
20µA×TSTART/CSS = 2V-1V
For a given start up time, the soft-start capacitor can be The IRU3138 also protects the output from over-voltaging
estimated as:
when the control FET is shorted. This is done by turning
on the sync FET with the maximum duty cycle.
CSS @ 20µA×TSTART/1V
MOSFET Drivers
Under-Voltage Lockout
The driver capabilities of both high and low side drivers The under-voltage lockout circuit assures that the
are optimized to maintain fast switching transitions. They MOSFET driver outputs remain in the off state whenever
are sized to drive a MOSFET that can deliver up to 20A the supply voltage drops below set parameters. Lockout
output current.
occurs if Vc and Vcc fall below 3.5V and 4.25V respec-
tively. Normal operation resumes once Vc and Vcc rise
The low side MOSFET driver is supplied directly by VCC above the set values.
while the high side driver is supplied by VC.
Shutdown
An internal dead time control is implemented to prevent The converter can be shutdown by pulling the soft-start
cross-conduction and allows the use of several kinds of pin below 2.8V. This can be easily done by using an
MOSFETs.
external small signal transistor. During shutdown both
MOSFET drivers turn off.
Switching Frequency VS. RT
450
400
350
300
250
200
150
100
50
0
0
10 20 30 40 50 60 70 80 90 100
RT
Figure 4A - Switching frequency vs. external resistor
Rev. 1.0
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IRU3138
APPLICATION INFORMATION
Design Example:
The following example is a typical application for IRU3138,
the schematic is Figure 13 on page 15.
Css = 20×tSTART (µF)
---(8)
Where tSTART is the desired start-up time (ms)
VIN = VCC = 5V
VOUT = 1.6V
IOUT = 12A
Supply Voltage
VC = 12V
For a start-up time of 5ms, the soft-start capacitor will
be 0.1µF. Choose a ceramic capacitor at 0.1µF.
∆VOUT = 50mV
(output voltage ripple @ 3% of VOUT)
Boost Supply Vc
To drive the high side switch, it is necessary to supply a
gate voltage at least 4V grater than the bus voltage. For
single supply applications, this is achieved by using a
charge pump configuration as shown in Figure 6. This
fS = 400KHz
Output Voltage Programming
Output voltage is programmed by reference voltage and method is simple and inexpensive. The operation of the
external voltage divider. The Fb pin is the inverting input circuit is as follows: when the lower MOSFET is turned
of the error amplifier, which is referenced to the voltage on, the capacitor (C1) is pulled down to ground and
on non-inverting pin of error amplifier. The output voltage charges, up to VBUS value, through the diode (D1). The
is defined by using the following equation:
bus voltage will be added to this voltage when upper
MOSFET turns on in next cycle, and providing supply
voltage (Vc) through diode (D2). Vc is approximately:
R6
R5
VOUT = VP× 1 +
---(7)
( )
VC @ 2 × VBUS - (VD1 + VD2)
VP = VREF = 0.8V
When an external resistor divider is connected to the Capacitors in the range of 0.1µF and 1µF are generally
output as shown in Figure 5.
adequate for most applications. The diode must be a
fast recovery device to minimize the amount of charge
fed back from the charge pump capacitor into Vc. The
diodes need to be able to block the full power rail volt-
age, which is seen when the high side MOSFET is
switched on. For low voltage application, schottky di-
odes can be used to minimize forward drop across the
diodes at start up. For this application, Vc is biased by
an external 12V supply.
V
OUT
IRU3138
VP
R6
Fb
VREF
R5
Figure 5 - Typical application of the IRU3138 for
programming the output voltage.
VBUS
D2
D1
IRU3138
Equation (7) can be rewritten as:
Vc
C2
C1
Q1
Q2
VOUT
R6 = R5 ×
- 1
( VP )
L2
Choose R5 = 1K
This will result toR6 = 1K
HDrv
If the high value feedback resistors are used, the input
bias current of the Fb pin could cause a slight increase
in output voltage. The output voltage set point can be
more accurate by using precision resistor.
Figure 6 - Charge pump circuit.
Input Capacitor Selection
The input filter capacitor should be based on how much
ripple the supply can tolerate on the DC input line. The
Soft-Start Programming
The soft-start timing can be programmed by selecting ripple current generated during the on time of upper
the soft-start capacitance value. The start-up time of the MOSFET should be provided by input capacitor. The RMS
converter can be calculated by using:
value of this ripple is expressed by:
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IRU3138
requirements, yet have high enough ESR to satisfy sta-
bility requirements. The ESR of the output capacitor is
calculated by the following relationship:
IRMS = IOUT
D×(1-D)
---(9)
Where:
D is the Duty Cycle, D=VOUT/VIN.
IRMS is the RMS value of the input capacitor current.
IOUT is the output current for each channel.
∆VO
∆IO
ESR ≤
---(10)
Where:
For VIN=5V, IOUT=12A and D=0.36, the IRMS=5.7A
∆VO = Output Voltage Ripple
∆i = Inductor Ripple Current
∆VO = 50mV and ∆I @ 22% of 12A = 2.64A
This results to: ESR=18.9mΩ
For higher efficiency, a low ESR capacitor is recom-
mended. Choose three Poscap from Sanyo 6TPC150M
(6.3V, 150µF, 40mΩ) with a maximum allowable ripple
current of 5.7A.
The Sanyo TPC series, Poscap capacitor is a good choice.
The 6TPC330M, 330µF, 6.3V has an ESR 40mΩ. Se-
lecting three of these capacitors in parallel, results to an
Inductor Selection
The inductor is selected based on operating frequency, ESR of @ 13.3mΩ which achieves our low ESR goal.
transient performance and allowable output voltage ripple.
The capacitor value must be high enough to absorb the
Low inductor value results to faster response to step inductor's ripple current. The larger the value of capaci-
load (high ∆i/∆t) and smaller size but will cause larger tor, the lower will be the output ripple voltage.
output ripple due to increase of inductor ripple current.
As a rule of thumb, select an inductor that produces a Power MOSFET Selection
ripple current of 10-40% of full load DC.
The IRU3138 uses two N-Channel MOSFETs. The se-
lections criteria to meet power transfer requirements is
For the buck converter, the inductor value for desired based on maximum drain-source voltage (VDSS), gate-
operating ripple current can be determined using the fol- source drive voltage (VGS), maximum output current, On-
lowing relation:
resistance RDS(ON) and thermal management.
∆i
∆t
1
fS
VOUT
VIN
VIN - VOUT = L×
; ∆t = D×
; D =
The MOSFET must have a maximum operating voltage
(VDSS) exceeding the maximum input voltage (VIN).
VOUT
L = (VIN - VOUT)×
---(11)
VIN×∆i×fS
The gate drive requirement is almost the same for both
MOSFETs. Logic-level transistor can be used and cau-
tion should be taken with devices at very low VGS to pre-
vent undesired turn-on of the complementary MOSFET,
which results a shoot-through current.
Where:
VIN = Maximum Input Voltage
VOUT = Output Voltage
Di = Inductor Ripple Current
fS = Switching Frequency
Dt = Turn On Time
The total power dissipation for MOSFETs includes con-
duction and switching losses. For the Buck converter,
the average inductor current is equal to the DC load cur-
rent. The conduction loss is defined as:
D = Duty Cycle
If ∆i = 25%(IO), then the output inductor will be:
L = 0.91µH
2
PCOND(Upper Switch) = ILOAD ×RDS(ON)×D×ϑ
The Panasonic PCCN6B series provides a range of in-
ductors in different values, low profile suitable for large
currents, 1.1µH, 16A is a good choice for this applica-
tion. This will result to a ripple approximately 22% of
output current.
2
PCOND(Lower Switch) = ILOAD ×RDS(ON)×(1 - D)×ϑ
ϑ = RDS(ON) Temperature Dependency
The RDS(ON) temperature dependency should be consid-
ered for the worst case operation. This is typically given
Output Capacitor Selection
The criteria to select the output capacitor is normally in the MOSFET data sheet. Ensure that the conduction
based on the value of the Effective Series Resistance losses and switching losses do not exceed the package
(ESR). In general, the output capacitor must have low ratings or violate the overall thermal budget.
enough ESR to meet output ripple and load transient
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IRU3138
Choose IRLR3715Z for control MOSFET and IRFR3711Z These values are taken under a certain condition test.
for synchronous MOSFET. These devices provide low For more details please refer to the IRFR3711Z datasheet.
on-resistance in a D-Pak.
By using equation (12), we can calculate the total switch-
The MOSFETs have the following data:
ing losses.
PSW(TOTAL) = 336mW
IRFL3715Z
IRFR3711Z
VDSS = 20V
RDS(ON) = 11mΩ
VDSS = 20V
RDS(ON) = 5.7mΩ
Feedback Compensation
The IRU3138 is a voltage mode controller; the control
loop is a single voltage feedback path including error
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensa-
tion circuit is necessary. The goal of the compensation
network is to provide a closed loop transfer function with
The total conduction losses will be:
PCON(TOTAL) = PCON(UPPER) + PCON(LOWER)
PCON(TOTAL) = 1.77W
The switching loss is more difficult to calculate, even the highest 0dB crossing frequency and adequate phase
though the switching transition is well understood. The margin (greater than 458).
reason is the effect of the parasitic components and
switching times during the switching procedures such The output LC filter introduces a double pole, –40dB/
as turn-on / turnoff delays and rise and fall times. The decade gain slope above its corner resonant frequency,
control MOSFET contributes to the majority of the switch- and a total phase lag of 1808 (see Figure 8). The Reso-
ing losses in synchronous Buck converter. The synchro- nant frequency of the LC filter is expressed as follows:
nous MOSFET turns on under zero voltage conditions,
1
therefore, the turn on losses for synchronous MOSFET
can be neglected. With a linear approximation, the total
switching loss can be expressed as:
FLC =
---(13)
2π× LO×CO
Figure 9 shows gain and phase of the LC filter. Since we
already have 1808 phase shift just from the output filter,
the system risks being unstable.
VDS(OFF)
tr + tf
T
PSW =
×
×ILOAD
---(12)
2
Where:
Gain
Phase
VDS(OFF) = Drain to Source Voltage at off time
08
0dB
tr = Rise Time
-40dB/decade
tf = Fall Time
T = Switching Period
ILOAD = Load Current
-180
8
The switching time waveform is shown in Figure 7.
F
LC Frequency
FLC Frequency
VDS
Figure 8 - Gain and phase of LC filter.
90%
10%
VGS
td
(ON)
td(OFF)
tr
tf
Figure 7 - Switching time waveforms.
From IRFR3711Z data sheet we obtain:
IRFR3711Z
tr = 13ns
tf = 15ns
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IRU3138
The IRU3138’s error amplifier is a differential-input First select the desired zero-crossover frequency (Fo):
transconductance amplifier. The output is available for
DC gain control or AC phase compensation.
Use the following equation to calculate R4:
Fo > FESR and FO ≤ (1/5 ~ 1/10)×fS
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback,
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 9.
1
gm
VOSC
VIN
Fo×FESR
R5 + R6
R5
R4 =
×
×
×
---(18)
2
FLC
Where:
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Fo = Crossover Frequency
FESR = Zero Frequency of the Output Capacitor
FLC = Resonant Frequency of the Output Filter
R5 and R6 = Resistor Dividers for Output Voltage
Programming
Note that this method requires that the output capacitor
should have enough ESR to satisfy stability requirements.
In general, the output capacitor’s ESR generates a zero
typically at 5KHz to 50KHz which is essential for an
acceptable phase margin.
gm = Error Amplifier Transconductance
For:
VIN = 5V
VOSC = 1.25V
Fo = 40KHz
FESR = 12KHz
The ESR zero of the output capacitor expressed as fol-
FLC = 4.82KHz
R5 = 1K
R6 = 1K
lows:
1
2π×ESR×Co
FESR =
---(14)
gm = 600µmho
VOUT
This results to R4=17.32K
Choose R4=17.8K
R6
Fb
To cancel one of the LC filter poles, place the zero be-
fore the LC filter resonant frequency pole:
Comp
Ve
E/A
R
5
C9
FZ @ 75%FLC
Vp=VREF
R4
1
Optional
FZ @ 0.75×
---(19)
Gain(dB)
2π LO × CO
For:
H(s) dB
Lo = 1.1µH
Co = 990µF
FZ = 3.6KHz
R4 = 17.8K
Using equations (17) and (19) to calculate C9, we get:
Frequency
FZ
C9 @ 2.4nF; Choose C9=2.2nF
Figure 9 - Compensation network without local
feedback and its asymptotic gain plot.
One more capacitor is sometimes added in parallel with
C9 and R4. This introduces one more pole which is mainly
used to suppress the switching noise. The additional
pole is given by:
The transfer function (Ve / VOUT) is given by:
R5
1 + sR4C9
sC9
H(s) = gm×
×
---(15)
( )
1
R6 + R5
FP =
C9×CPOLE
2π×R4×
C9 + CPOLE
The (s) indicates that the transfer function varies as a
function of frequency. This configuration introduces a gain
and zero, expressed by:
The pole sets to one half of switching frequency which
results in the capacitor CPOLE:
R5
R6×R5
|H(s=j×2π×FO)| = gm×
×R4
---(16)
1
1
CPOLE =
@
π×R4×fS
1
C9
1
π×R4×fS -
FZ =
---(17)
2π×R4×C9
For FP << fS/2
R4=17.8K and FS=400KHz will result to CPOLE=44pF.
Choose CPOLE=47pF.
|H(s)| is the gain at zero cross frequency.
Rev. 1.0
01/29/04
www.irf.com
10
IRU3138
For a general solution for unconditionally stability for
ceramic capacitor with very low ESR and any type of
output capacitors, in a wide range of ESR values we
should implement local feedback with a compensation
network. The typically used compensation network for
voltage-mode controller is shown in Figure 10.
FP1 = 0
FP2 =
1
2π×R8×C10
1
1
FP3 =
@
2π×R7×C12
C12×C11
(C12+C11 )
2π×R7×
VOUT
1
ZIN
C12
FZ1 =
FZ2 =
2π×R7×C11
C10
R7
1
1
C11
@
2π×C10×(R6 + R8)
2π×C10×R6
R8
R6
Zf
Cross Over Frequency:
Fb
VIN
FO = R7×C10×
VOSC
Where:
1
Ve
E/A
---(21)
×
Comp
R5
2π×Lo×Co
Vp=VREF
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Lo = Output Inductor
Gain(dB)
H(s) dB
Co = Total Output Capacitors
The stability requirement will be satisfied by placing the
poles and zeros of the compensation network according
to following design rules. The consideration has been
taken to satisfy condition (20) regarding transconduc-
tance error amplifier.
Frequency
F
Z
1
F
Z
2
F
P
2
FP3
Figure 10 - Compensation network with local
feedback and its asymptotic gain plot.
In such configuration, the transfer function is given by:
These design rules will give a crossover frequency ap-
proximately one-tenth of the switching frequency. The
higher the band width, the potentially faster the load tran-
sient speed. The gain margin will be large enough to
Ve
1 - gmZf
=
VOUT
1 + gmZIN
The error amplifier gain is independent of the transcon- provide high DC-regulation accuracy (typically -5dB to -
ductance under the following condition:
12dB). The phase margin should be greater than 458 for
overall stability.
gmZf >> 1
and
gmZIN >>1
---(20)
By replacing ZIN and Zf according to Figure 7, the trans- Based on the frequency of the zero generated by ESR
former function can be expressed as:
versus crossover frequency, the compensation type can
be different. The table below shows the compensation
type and location of crossover frequency.
(1+sR7C11)×[1+sC10(R6+R8)]
1
×
H(s) =
sR6(C12+C11)
C12C11
1+sR7
×(1+sR8C10)
Compensator
Type
Location of Zero
Crossover Frequency
(FO)
Typical
Output
[ (C12+C11)]
Capacitor
Electrolytic,
Tantalum
Tantalum,
Ceramic
As known, transconductance amplifier has high imped-
ance (current source) output, therefore, consider should
be taken when loading the E/A output. It may exceed its
source/sink output current capability, so that the ampli-
fier will not be able to swing its output voltage over the
necessary range.
Type II (PI)
FPO < FZO < FO < fS/2
Type III (PID)
Method A
FPO < FO < FZO < fS/2
FPO < FO < fS/2 < FZO
Type III (PID)
Method B
Ceramic
Table - The compensation type and location of zero
crossover frequency.
The compensation network has three poles and two ze-
ros and they are expressed as follows:
Detail information is dicussed in application Note AN-
1043 which can be downloaded from the IR Web-Site.
Rev. 1.0
01/29/04
www.irf.com
11
IRU3138
Layout Consideration
The layout is very important when designing high fre- directly to the drain of the high-side MOSFET. To reduce
quency switching converters. Layout will affect noise the ESR, replace the single input capacitor with two par-
pickup and can cause a good design to perform with allel units. The feedback part of the system should be
less than expected results.
kept away from the inductor and other noise sources
and be placed close to the IC. In multilayer PCB, use
Start to place the power components. Make all the con- one layer as power ground plane and have a separate
nections in the top layer with wide, copper filled areas. control circuit ground (analog ground), to which all sig-
The inductor, output capacitor and the MOSFET should nals are referenced. The goal is to localize the high cur-
be close to each other as possible. This helps to reduce rent path to a separate loop that does not interfere with
the EMI radiated by the power traces due to the high the more sensitive analog control function. These two
switching currents through them. Place input capacitor grounds must be connected together on the PC board
layout at a single point.
Rev. 1.0
01/29/04
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12
IRU3138
TYPICAL APPLICATION
Single Supply 5V Input
5V
D2
BAT54
D1
BAT54S
L1
1uH
C1
47uF
C2
3x 6TPB150M,
150uF, 40m
C3
0.1uF
C4
1uF
Ω
C5
0.1uF
Vcc
Vc
HDrv
Q1
IRF7457
V
REF
C8
0.1uF
L2
3.3uH
D3
BAT54
U1
IRU3138
V
P
3.3V
@ 12A
SS/SD
Q2
IRF7457
LDrv
C7
2x 6TPC330M,
C8
0.1uF
Rt
330uF, 40m
Ω
PGnd
Fb
Comp
R6
C9
3.3nF
3.16K, 1%
C6
68pF
Gnd
R4
18K
R5
1K, 1%
Figure 11 - Typical application of IRU3138 in an on-board DC-DC converter
using a single 5V supply.
Rev. 1.0
01/29/04
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13
IRU3138
TYPICAL APPLICATION
5V
12V
L1
5V
1uH
C1
1uF
C2
1uF
C4
47uF
C5
4x 150uF
6TPB150M
Vcc
Vc
Q1
IRF3711S
HDrv
LDrv
Fb
SS
D1
1N4148
C6
0.1uF
L2
U1
IRU3137
VDDQ
2.2uH
1.8V @ 15A
Q2
IRF3711S
C7
3x 330uF
6TPC330M
Comp
R1
C8
3300pF
1.25K
C15
68pF
Gnd
5V
R2
20K
R3
1K
12V
C9
1uF
C10
1uF
C11
3x 150uF
6TPB150M
Vcc
Vc
R4
1K
VREF
Q3
IRF7460
HDrv
V
P
D2
1N4148
L3
R5
1K
SS
U2
V
TT
2.2uH
C12
0.15uF
IRU3138
(0.9V @ 10A)
Q4
IRF7457
LDrv
C13
3x 330uF
6TPC330M
PGnd
Fb
Rt
Comp
C14
6800pF
C16
47pF
Gnd
R6
12K
Figure 12 - Typical application of IRU3137 for DDR memory when the termination voltage,
generated by IRU3138, tracks the core voltage.
Rev. 1.0
01/29/04
www.irf.com
14
IRU3138
DEMO-BOARD APPLICATION
5V to 2.5V @ 12A
L1
VIN
1uH
5V
C1
150uF
C19
150uF
C20
150uF
C18
150uF
Gnd
12V
C4
1uF
C6
1uF
Vcc
Vc
HDrv
C3
1uF
Q1
L2
V
P
D3
VOUT
1.6V
@ 12A
1.1uH
U1
IRU3138
VREF
C2
100pF
C9
470pF
Rt
C12
1uF
C22 C21
330uF 330uF
C11
330uF
SS/SD
R6
4.7Ω
LDrv
C8
0.1uF
Q2
PGnd
Fb
Gnd
Comp
R8
1K
C15
2.2nF
Gnd
R9
17.8K
R11
1K
Figure 13 - Demo-board application of IRU3138.
Application Parts List
Ref Desig
Description
MOSFET
Value
20V, 11mΩ
20V, 5.7mΩ
Synchronous PWM
Fast Switching
1µH, 10A
Qty
1
Part#
Manuf
Q1
IRLR3715Z
IR
IR
IR
IR
Q2
U1
D3
MOSFET
Controller
Diode
1
1
1
IRFR3711Z
IRU3138
BAT54
L1
L2
Inductor
Inductor
1
1
4
D03316P-102HC
ETQP6F1R1BFA
6TPC150M
Coilcraft
Panasonic
Sanyo
1.1µH
C1,C2,C18,C20
Capacitor, Poscap
Capacitor, Ceramic
Capacitor, Ceramic
Capacitor, Ceramic
Capacitor, Ceramic
Capacitor, Poscap
Capacitor, Ceramic
Resistor
150µF, 6.3V
1µF, Y5V, 16V
100pF, 50V
0.1µF, Y5V, 25V
470pF, X7R, 50V
330µF, 6.3V
2.2nF, X7R, 50V
4.7Ω, 5%
C3,C4,C6,C12
4
1
1
ECJ-SVF1C105Z
ECJ-2VC1H101J
ECJ-2VF1E104Z
ECJ-2VC1H471J
6TPC330M
Panasonic
Panasonic
Panasonic
Panasonic
Sanyo
C7
C8
C9
1
3
1
C11,C21,C22
C15
R6
ECJ-2VB1H222K
Panasonic
1
R8,R11
R9
Resistor
Resistor
1K
17.8K
2
1
Rev. 1.0
01/29/04
www.irf.com
15
IRU3138
TYPICAL OPERATING CHARACTERISTICS
Vin=5.0V, Vout=1.6V
92
90
88
86
84
82
80
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
Output Current (A)
Figure 15 - Start-up time
Ch2:VC, Ch3:SS pin, Ch4:Vout
Figure 14 - Efficiency for IRU3138 Evaluation Board
Figure 17 - Output Voltage Ripple @ 15A
Ch1:Output, Ch4:Iout (5A/Div)
Figure 16 - Shut Down the output by pulling down the
soft-start pin
Ch1: HDrv, Ch2:LDrv, Ch3: SS pin
Figure 18 - Transient response @ Iout=15A
Ch1: Output, Ch4:Iout (5A/Div)
Rev. 1.0
01/29/04
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16
IRU3138
(S) SOIC Package
14-Pin Surface Mount, Narrow Body
H
A
B
C
E
DETAIL-A
L
D
PIN NO. 1
DETAIL-A
I
0.38± 0.015 x 458
K
T
F
J
G
14-PIN
SYMBOL
MIN
MAX
A
B
C
D
E
F
G
H
I
8.56
8.74
1.27 BSC
0.51 REF
0.36
0.46
3.99
1.72
0.25
3.81
1.52
0.10
78 BSC
0.19
5.80
08
0.25
6.20
88
J
K
L
0.41
1.37
1.27
1.57
T
NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS.
Rev. 1.0
01/29/04
www.irf.com
17
IRU3138
PACKAGE SHIPMENT METHOD
PKG
PACKAGE
PIN
PARTS
PARTS
T & R
DESIG
DESCRIPTION
COUNT
PER TUBE
PER REEL
Orientation
S
SOIC, Narrow Body
14
55
2500
Fig A
1
1
1
Feed Direction
Figure A
This product has been designed and qualified for the consumer market.
IR WORLD HEADQUARTERS:233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice. 02/01
Rev. 1.0
01/29/04
www.irf.com
18
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