ISC080N10NM6 [INFINEON]
正常电平 ISC080N10NM6 OptiMOS™ 6 系列 100 V 器件在分立式功率 MOSFET 领域树立了全新技术标准。相较于替代产品，英飞凌的领先薄晶圆技术显示出卓越性能优势。;
| 型号： | ISC080N10NM6 |
| 厂家： | 
Infineon |
| 描述： | 正常电平 ISC080N10NM6 OptiMOS™ 6 系列 100 V 器件在分立式功率 MOSFET 领域树立了全新技术标准。相较于替代产品，英飞凌的领先薄晶圆技术显示出卓越性能优势。 |
| 文件： | 总12页 (文件大小：1594K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISC080N10NM6
MOSFET
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
TDSON-8ꢀFLꢀ(enlargedꢀsourceꢀinterconnection)
8
7
6
5
Features
•ꢀN-channel,ꢀnormalꢀlevel
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)
1
5
2
6
•ꢀExcellentꢀgateꢀchargeꢀxꢀRDS(on)ꢀproductꢀ(FOM)
•ꢀVeryꢀlowꢀreverseꢀrecoveryꢀchargeꢀ(Qrr)
•ꢀHighꢀavalancheꢀenergyꢀrating
7
3
4
8
4
•ꢀ175°Cꢀoperatingꢀtemperature
3
2
•ꢀOptimizedꢀforꢀhighꢀfrequencyꢀswitchingꢀandꢀsynchronousꢀrectification
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
•ꢀMSLꢀ1ꢀclassifiedꢀaccordingꢀtoꢀJ-STD-020
1
Drain
Pin 5-8
Productꢀvalidation
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications
*1
Gate
Pin 4
Source
Pin 1-3
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
*1: Internal body diode
Parameter
Value
100
8.05
75
Unit
VDS
V
RDS(on),max
ID
mΩ
A
Qoss
35
nC
nC
nC
QG(0V...10V)
Qrrꢀ(100A/µs)
19
31
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
ISC080N10NM6
PG-TDSON-8 FL
080N10N6
-
Final Data Sheet
1
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Final Data Sheet
2
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
-
-
-
-
-
-
-
-
75
53
48
13
VGS=10ꢀV,ꢀTC=25ꢀ°C
VGS=10ꢀV,ꢀTC=100ꢀ°C
Continuous drain current1)
ID
A
VGS=8ꢀV,ꢀTC=100ꢀ°C
VGS=10V,TA=25°C,RthJA=50°C/W2)
Pulsed drain current3)
ID,pulse
IAS
-
-
-
-
-
300
20
A
TA=25ꢀ°C
Avalanche current, single pulse4)
Avalanche energy, single pulse
Gate source voltage
-
A
TC=25ꢀ°C
EAS
VGS
-
185
20
mJ
V
ID=11ꢀA,ꢀRGS=25ꢀΩ
-20
-
-
-
-
-
100
3.0
TC=25ꢀ°C
Power dissipation
Ptot
W
TA=25ꢀ°C,ꢀRthJA=50ꢀ°C/W2)
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
-
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case,
bottom
RthJC
RthJC
RthJA
-
0.77
1.5
°C/W -
°C/W -
°C/W -
Thermal resistance, junction - case,
top
-
-
-
-
20
50
Thermal resistance, junction - ambient,
6 cm² cooling area
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual
environmental conditions.
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
3) See Diagram 3 for more detailed information
4) See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
100
2.3
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
VDS=VGS,ꢀID=36ꢀµA
2.8
3.3
-
-
0.1
10
1.0
100
VDS=80ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=80ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C1)
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
IDSS
µA
nA
IGSS
-
10
100
VGS=20ꢀV,ꢀVDS=0ꢀV
-
-
7.1
8.7
8.05
10
VGS=10ꢀV,ꢀID=20ꢀA
VGS=8ꢀV,ꢀID=10ꢀA
RDS(on)
mΩ
Gate resistance
RG
gfs
0.6
15
1.2
30
1.8
-
Ω
-
Transconductance
S
|VDS|≥2|ID|RDS(on)max,ꢀID=20ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
1400 1800 pF
VGS=0ꢀV,ꢀVDS=50ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=50ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=50ꢀV,ꢀf=1ꢀMHz
310
9
390
13
pF
pF
VDD=50ꢀV,ꢀVGS=10ꢀV,ꢀID=10ꢀA,
RG,ext=1.6ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
6.4
1.5
10.7
4.3
-
-
-
-
ns
ns
ns
ns
VDD=50ꢀV,ꢀVGS=10ꢀV,ꢀID=10ꢀA,
RG,ext=1.6ꢀΩ
VDD=50ꢀV,ꢀVGS=10ꢀV,ꢀID=10ꢀA,
RG,ext=1.6ꢀΩ
Turn-off delay time
Fall time
VDD=50ꢀV,ꢀVGS=10ꢀV,ꢀID=10ꢀA,
RG,ext=1.6ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
6.4
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
8.5
4.9
5.1
-
Gate to source charge1)
Gate charge at threshold1)
Gate to drain charge1)
Switching charge
Qgs
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
V
VDD=50ꢀV,ꢀID=10ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=50ꢀV,ꢀID=10ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=50ꢀV,ꢀID=10ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=50ꢀV,ꢀID=10ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=50ꢀV,ꢀID=10ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=50ꢀV,ꢀID=10ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ10ꢀV
Qg(th)
Qgd
3.9
3.4
Qsw
5.9
Gate charge total1)
Qg
19
24
-
Gate plateau voltage
Gate charge total, sync. FET
Output charge1)
Vplateau
Qg(sync)
Qoss
4.6
17
-
nC
nC
35
44
VDS=50ꢀV,ꢀVGS=0ꢀV
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
75
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
300
1.0
47
A
TC=25ꢀ°C
Diode forward voltage
0.82
31.5
31
V
VGS=0ꢀV,ꢀIF=20ꢀA,ꢀTj=25ꢀ°C
VR=50ꢀV,ꢀIF=10ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=50ꢀV,ꢀIF=10ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=50ꢀV,ꢀIF=10ꢀA,ꢀdiF/dt=1000ꢀA/µs
VR=50ꢀV,ꢀIF=10ꢀA,ꢀdiF/dt=1000ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
Reverse recovery time1)
Reverse recovery charge1)
ns
nC
ns
nC
Qrr
trr
46.5
27
18
Qrr
140
210
1) Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
120
80
70
60
50
40
30
20
10
0
100
80
60
40
20
0
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀVGS≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
103
101
single pulse
0.01
0.02
1 µs
0.05
0.1
0.2
0.5
10 µs
102
101
100 µs
1 ms
100
10-1
10-2
10 ms
DC
100
10-1
10-2
10-1
100
101
102
103
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
280
24
10 V
7 V
6 V
240
200
160
120
80
20
16
12
8
8 V
8 V
7 V
10 V
6 V
4
40
5 V
4.5 V
0
0
0
1
2
3
4
5
0
25
50
75
100
125
150
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
120
24
175 °C
100
80
20
16
12
8
25 °C
60
40
20
4
175 °C
25 °C
0
0
0
1
2
3
4
5
6
7
5
6
7
8
9
10
VGSꢀ[V]
VGSꢀ[V]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
RDS(on)=f(VGS),ꢀID=20ꢀA;ꢀparameter:ꢀTj
Final Data Sheet
7
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.4
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.0
2.0
1.6
1.2
0.8
0.4
0.0
360 µA
36 µA
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=20ꢀA,ꢀVGS=10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
104
103
25 °C
25 °C, max
175 °C
175 °C, max
Ciss
103
102
101
100
102
101
100
Coss
Crss
0
20
40
60
80
100
0.00
0.25
0.50
0.75
1.00
1.25
1.50
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
102
10
20 V
50 V
80 V
8
6
4
2
0
101
25 °C
100 °C
150 °C
100
10-1
10-1
100
101
102
103
0.0
2.5
5.0
7.5
10.0 12.5 15.0 17.5 20.0
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=10ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
112
110
108
106
104
102
100
98
96
94
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=10ꢀmA
Final Data Sheet
9
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
5ꢀꢀꢀꢀꢀPackageꢀOutlines
DOCUMENT NO.
Z8B000193699
REVISION
04
MILLIMETERS
DIMENSION
MIN.
0.90
0.15
0.26
4.80
3.70
0.00
5.70
5.90
3.88
MAX.
1.20
0.35
0.54
5.35
4.40
0.23
6.10
6.42
4.42
SCALE 10:1
A
A1
b
3mm
0
1
2
D
D1
D2
E
EUROPEAN PROJECTION
E1
E2
e
1.27
L
0.69
0.45
0.90
0.69
ISSUE DATE
05.11.2019
M
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TDSON-8ꢀFL,ꢀdimensionsꢀinꢀmm
Final Data Sheet
10
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTMꢀ6ꢀPower-Transistor,ꢀ100ꢀV
ISC080N10NM6
PG-TDSON-8FL: Recommended Boardpads & Apertures
Figure 2 Outline Boardpads (TDSON-8 FL)
Final Data Sheet
11
Rev.ꢀ2.2,ꢀꢀ2023-02-07
OptiMOSTM 6 Power-Transistor , 100 V
ISC080N10NM6
Revision History
ISC080N10NM6
Revision: 2023-02-07, Rev. 2.2
Previous Revision
Revision Date
Subjects (major changes since last revision)
2.0
2.1
2.2
2021-07-05
Release of final version
Update IAS
2021-07-20
2023-02-07
Update SOA Diagram
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously
improve the quality of this document. Please send your proposal (including a reference to this document) to:
erratum@infineon.com
Published by
Infineon Technologies AG
81726 München, Germany
© 2023 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the
product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation
warranties of non-infringement of intellectual property rights of any third party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the
product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s
technical departments to evaluate the suitability of the product for the intended application and the completeness of the product
information given in this document with respect to such application.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon
Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in question,
please contact the nearest Infineon Technologies Office.
The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or
automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a
failure of such components can reasonably be expected to cause the failure of that life-support, automotive, aviation and
aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are
intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is
reasonable to assume that the health of the user or other persons may be endangered.
Final Data Sheet
12
Rev. 2.2, 2023-02-07
相关型号：
ISC1008ER1R0M
General Fixed Inductor, 1 ELEMENT, 1 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD, CHIP, 1414, ROHS COMPLIANT
VISHAY
ISC1008ER220M
General Fixed Inductor, 1 ELEMENT, 22 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD, CHIP, 1414, ROHS COMPLIANT
VISHAY
ISC104N12LM6
This is a logic level 120 V MOSFET in SuperSO8 packaging with 10.4 mOhm on-resistance. ISC104N12LM6 is part of Infineon’s OptiMOS™ 6 power MOSFET family.
INFINEON
ISC1210100JB25
General Fixed Inductor, 1 ELEMENT, 10 uH, POWDERED IRON-CORE, GENERAL PURPOSE INDUCTOR, SMD
VISHAY
ISC1210120JRE4
General Fixed Inductor, 1 ELEMENT, 12 uH, POWDERED IRON-CORE, GENERAL PURPOSE INDUCTOR, SMD
VISHAY
©2020 ICPDF网 联系我们和版权申明