ISZ034N06LM5 [INFINEON]

OptiMOS™ 5 60 V 功率 MOSFETISZ034N06LM5 完全适用于开关电源 (SMPS) 这类高效率与功率密度解决方案中的同步整流、电信砖模块、服务器应用以及便携式充电器。器件占板面积仅为 3.3x3.3 mm,电气性能出色,有助于实现同类最佳的功率密度,可进一步改善终端应用中的产品外形尺寸。;
ISZ034N06LM5
型号: ISZ034N06LM5
厂家: Infineon    Infineon
描述:

OptiMOS™ 5 60 V 功率 MOSFETISZ034N06LM5 完全适用于开关电源 (SMPS) 这类高效率与功率密度解决方案中的同步整流、电信砖模块、服务器应用以及便携式充电器。器件占板面积仅为 3.3x3.3 mm,电气性能出色,有助于实现同类最佳的功率密度,可进一步改善终端应用中的产品外形尺寸。

开关 便携式 服务器 电信
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中文:  中文翻译
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ISZ034N06LM5  
MOSFET  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
PG-TSDSON-8ꢀFL  
8
5
Features  
6
7
6
7
5
8
•ꢀOptimizedꢀforꢀhighꢀperformanceꢀSMPS,ꢀe.g.ꢀsync.rec.  
•ꢀ100%ꢀavalancheꢀtested  
•ꢀSuperiorꢀthermalꢀperformance  
•ꢀN-channel  
•ꢀPb-freeꢀleadꢀplatingꢀ:ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀEC61249-2-21  
1
4
2
3
3
2
4
1
Productꢀvalidation  
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications  
Drain  
Pin 5-8  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Parameter  
Value  
Unit  
*1  
Gate  
Pin 4  
VDS  
60  
V
Source  
Pin 1-3  
RDS(on),max  
ID  
3.4  
112  
33  
m  
A
*1: Internal body diode  
Qoss  
nC  
nC  
QG(0V..4.5V)  
20  
Typeꢀ/ꢀOrderingꢀCode  
Package  
PG-TSDSON-8 FL  
Marking  
RelatedꢀLinks  
ISZ034N06LM5  
034N06L  
-
Final Data Sheet  
1
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Final Data Sheet  
2
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
VGS=10ꢀV,ꢀTC=25ꢀ°C  
VGS=10ꢀV,ꢀTC=100ꢀ°C  
-
-
-
-
-
-
112  
79  
19  
Continuous drain current1)  
ID  
A
VGS=10ꢀV,ꢀTA=25ꢀ°C,  
RthJA=60ꢀ°C/W2)  
Pulsed drain current3)  
Avalanche energy, single pulse4)  
ID,pulse  
EAS  
-
-
-
-
448  
121  
20  
A
TC=25ꢀ°C  
-
mJ  
V
ID=20ꢀA,ꢀRGS=25ꢀΩ  
Gate source voltage  
VGS  
-20  
-
-
-
-
-
83  
2.5  
TC=25ꢀ°C  
Power dissipation  
Ptot  
W
TA=25ꢀ°C,ꢀRthJA=60ꢀ°C/W2)  
IEC climatic category; DIN IEC 68-1:  
55/175/56  
Operating and storage temperature  
Tj,ꢀTstg  
-55  
-
175  
°C  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction - case,  
bottom  
RthJC  
RthJC  
RthJA  
-
1.3  
1.8  
°C/W -  
°C/W -  
°C/W -  
Thermal resistance, junction - case,  
top  
-
-
-
-
20  
60  
Device on PCB,  
6 cm² cooling area2)  
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature  
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual  
environmental conditions.  
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
3) See Diagram 3 for more detailed information  
4) See Diagram 13 for more detailed information  
Final Data Sheet  
3
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
60  
Max.  
-
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
VGS(th)  
V
V
VGS=0ꢀV,ꢀID=1ꢀmA  
VDS=VGS,ꢀID=36ꢀµA  
1.1  
1.7  
2.3  
-
-
0.1  
10  
1
100  
VDS=60ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C  
VDS=60ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance  
IDSS  
µA  
nA  
IGSS  
-
10  
100  
VGS=20ꢀV,ꢀVDS=0ꢀV  
-
-
2.9  
3.5  
3.4  
4.2  
VGS=10ꢀV,ꢀID=20ꢀA  
VGS=4.5ꢀV,ꢀID=10ꢀA  
RDS(on)  
mΩ  
Gate resistance1)  
Transconductance  
RG  
gfs  
-
-
1.7  
80  
-
-
-
S
|VDS|2|ID|RDS(on)max,ꢀID=20ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance1)  
Output capacitance1)  
Reverse transfer capacitance1)  
Ciss  
Coss  
Crss  
-
-
-
2600 3500 pF  
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=30ꢀV,ꢀf=1ꢀMHz  
550  
25  
730  
33  
pF  
pF  
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-on delay time  
Rise time  
td(on)  
tr  
td(off)  
tf  
-
-
-
-
7.6  
4.2  
27  
-
-
-
-
ns  
ns  
ns  
ns  
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,  
RG,ext=1.6ꢀΩ  
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-off delay time  
Fall time  
VDD=30ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,  
RG,ext=1.6ꢀΩ  
8.0  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ  
Values  
Typ.  
6.6  
4.2  
6.2  
8.6  
20  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Qgs  
-
-
-
-
-
-
-
-
-
-
nC  
nC  
nC  
nC  
nC  
V
VDD=30ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=30ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=30ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=30ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=30ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=30ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=30ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ10ꢀV  
Qg(th)  
Qgd  
-
-
Qsw  
-
Gate charge total1)  
Qg  
27  
-
Gate plateau voltage  
Gate charge total1)  
Vplateau  
Qg  
2.5  
40  
53  
-
nC  
nC  
nC  
Gate charge total, sync. FET  
Output charge  
Qg(sync)  
Qoss  
36  
33  
-
VDS=30ꢀV,ꢀVGS=0ꢀV  
1) Defined by design. Not subject to production test.  
2) See Gate charge waveformsfor parameter definition  
Final Data Sheet  
4
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
-
Max.  
73  
448  
1.0  
-
Diode continuous forward current  
Diode pulse current  
IS  
-
-
-
-
-
A
TC=25ꢀ°C  
IS,pulse  
VSD  
trr  
-
A
TC=25ꢀ°C  
Diode forward voltage  
0.81  
20  
50  
V
VGS=0ꢀV,ꢀIF=20ꢀA,ꢀTj=25ꢀ°C  
VR=30ꢀV,ꢀIF=20ꢀA,ꢀdiF/dt=400ꢀA/µs  
VR=30ꢀV,ꢀIF=20ꢀA,ꢀdiF/dt=400ꢀA/µs  
Reverse recovery time1)  
Reverse recovery charge1)  
ns  
nC  
Qrr  
-
1) Defined by design. Not subject to production test.  
Final Data Sheet  
5
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
100  
120  
100  
80  
60  
40  
20  
0
80  
60  
40  
20  
0
0
25  
50  
75  
100  
125  
150  
175  
0
25  
50  
75  
100  
125  
150  
175  
TCꢀ[°C]  
TCꢀ[°C]  
Ptot=f(TC)  
ID=f(TC);ꢀVGS10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
103  
101  
1 µs  
single pulse  
0.01  
0.02  
0.05  
0.1  
0.2  
0.5  
10 µs  
102  
101  
100  
10-1  
10-2  
100 µs  
1 ms  
DC  
100  
10 ms  
10-1  
10-2  
10-1  
100  
101  
102  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
6
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
450  
10  
10 V  
5 V  
4.5 V  
400  
350  
300  
250  
200  
150  
100  
50  
2.8 V  
8
3 V  
4 V  
6
4
3.5 V  
4.5 V  
3.5 V  
3 V  
4 V  
5 V  
10 V  
2.8 V  
0
2
0
1
2
3
4
5
0
20  
40  
60  
80  
100  
120  
VDSꢀ[V]  
IDꢀ[A]  
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
500  
10.0  
400  
300  
200  
100  
0
25 °C  
8.0  
175 °C  
6.0  
175 °C  
4.0  
25 °C  
2.0  
0
1
2
3
4
5
0
4
8
12  
16  
20  
VGSꢀ[V]  
VGSꢀ[V]  
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj  
RDS(on)=f(VGS),ꢀID=20ꢀA;ꢀparameter:ꢀTj  
Final Data Sheet  
7
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
2.0  
2.2  
1.6  
1.2  
0.8  
0.4  
1.8  
360 µA  
1.4  
1.0  
0.6  
36 µA  
-75 -50 -25  
0
25  
50  
75 100 125 150 175  
-75 -50 -25  
0
25  
50  
75 100 125 150 175  
Tjꢀ[°C]  
Tjꢀ[°C]  
RDS(on)=f(Tj),ꢀID=20ꢀA,ꢀVGS=10ꢀV  
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID  
Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
104  
103  
25 °C  
25 °C, max  
175 °C  
175 °C, max  
Ciss  
103  
102  
101  
102  
101  
100  
Coss  
Crss  
0
10  
20  
30  
40  
50  
60  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
VDSꢀ[V]  
VSDꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz  
IF=f(VSD);ꢀparameter:ꢀTj  
Final Data Sheet  
8
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
102  
10  
12 V  
30 V  
48 V  
8
6
4
2
0
101  
25 °C  
100 °C  
100  
150 °C  
10-1  
100  
101  
102  
103  
0
10  
20  
30  
40  
50  
tAVꢀ[µs]  
Qgateꢀ[nC]  
IAS=f(tAV);ꢀRGS=25ꢀ;ꢀparameter:ꢀTj,start  
VGS=f(Qgate),ꢀID=20ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD  
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Diagram Gate charge waveforms  
65  
64  
63  
62  
61  
60  
59  
58  
57  
-75 -50 -25  
0
25  
50  
75 100 125 150 175  
Tjꢀ[°C]  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
9
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
5ꢀꢀꢀꢀꢀPackageꢀOutlines  
PACKAGE - GROUP  
NUMBER:  
PG-TSDSON-8-U03  
REVISION: 03  
DATE: 20.10.2020  
MILLIMETERS  
DIMENSIONS  
MIN.  
MAX.  
1.10  
0.44  
A
b
0.90  
0.24  
c
(0.20)  
D
3.20  
2.19  
1.54  
3.20  
2.01  
0.10  
3.40  
2.39  
1.74  
3.40  
2.21  
0.30  
D1  
D2  
E
E1  
E2  
e
0.65  
0.06  
L
0.30  
0.40  
0.50  
0.50  
0.60  
0.70  
L1  
L2  
aaa  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TSDSON-8ꢀFL,ꢀdimensionsꢀinꢀmm  
Final Data Sheet  
10  
Rev.ꢀ2.0,ꢀꢀ2021-03-12  
OptiMOSTM5ꢀPower-Transistor,ꢀ60ꢀV  
ISZ034N06LM5  
RevisionꢀHistory  
ISZ034N06LM5  
Revision:ꢀ2021-03-12,ꢀRev.ꢀ2.0  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
Release of final version  
2.0  
2021-03-12  
Trademarks  
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Final Data Sheet  
11  
Rev.ꢀ2.0,ꢀꢀ2021-03-12  

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