JANTXVH2N7481U3_技术文档

INCH-POUND

The documentation and process conversion

measures necessary to comply with this revision

shall be completed by 30 November 2010.

MIL-PRF-19500/703B

30 August 2010

SUPERSEDING

MIL-PRF-19500/703A

2 July 2004

PERFORMANCE SPECIFICATION SHEET

SEMICONDUCTOR DEVICE, FIELD EFFECT RADIATION HARDENED

(TOTAL DOSE AND SINGLE EVENT EFFECTS)

TRANSISTOR, N-CHANNEL, SILICON, TYPES 2N7479U3, 2N7480U3, AND 2N7481U3,

JANTXVR, F, G, AND H AND JANSR, F, G, AND H

This specification is approved for use by all Departments

and Agencies of the Department of Defense.

The requirements for acquiring the product described herein shall consist of

this specification sheet and MIL-PRF-19500.

1. SCOPE

1.1 Scope. This specification covers the performance requirements for a N-Channel, enhancement-mode,

MOSFET, radiation hardened (total dose and single event effects (SEE)), power transistor. Two levels of product

assurance are provided for each device type as specified in MIL-PRF-19500, with avalanche energy maximum rating

(E_AS) and maximum avalanche current (I_AS).

1.2 Physical dimensions. See figure 1, surface mount, TO-276AA (SMD-0.5) for U3.

*

1.3 Maximum ratings. T_A= +25°C, unless otherwise specified.

Type

P_T(1)

T_C=

+25°C +25°C

P_T

T_A=

V_DS

V_DG

V_GS

I_D1(3) (4)

T_C

=+25°C

I_D2(3) (4)

T_C=

+100°C

I_S

I_DM(5)

A (pk)

T_J

and

T_STG

R_θJC

(2)

W

°C/W

V dc

A dc

°C

2N7479U3

2N7480U3

2N7481U3

75

1.0

1.67

30

60

30

60

22

21

16

22

88

±20

-55

to

+150

100

(1) Derate linearly by 0.6 W/°C for T_C> +25°C.

(2) See figure 2, thermal impedance curves.

(3) The following formula derives the maximum theoretical I_Dlimit. I_Dis limited by package and internal construction.

-

T_JMT_C

( on ) at

T_JM

=

I_D

(

)

x

(

)

R_θJC

R_DS

(4) See figure 3, maximum drain current graph.

(5) I_DM= 4 X I_D1as calculated in note (3).

* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,

ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dscc.dla.mil. Since

contact information can change, you may want to verify the currency of this address information using the

ASSIST Online database at https://assist.daps.dla.mil/.

AMSC N/A

FSC 5961

MIL-PRF-19500/703B

* 1.4 Primary electrical characteristics at T_C= +25°C.

Type

Min V_(BR)DSS

V_GS= 0

V_GS(TH)1

V_DS> V_GS

Max I_DSS1

V_GS= 0

Max r_DS(on)(1)

V_GS= 12V, I_D= I_D2

E_AS

I_D= 1.0 mA dc V_DS= 80%

I_D= 1.0mA

dc

of rated

V_DS

T_J=

+25°C

+150°C

V dc

Min

mJ

µA dc

Ω

Max

4.0

2N7479U3

2N7480U3

2N7481U3

30

60

155

100

70

0.020

0.030

0.060

0.040

0.068

0.115

2.0

10

100

(1) Pulsed (see 4.5.1).

2. APPLICABLE DOCUMENTS

2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This

section does not include documents cited in other sections of this specification or recommended for additional

information or as examples. While every effort has been made to ensure the completeness of this list, document

users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this

specification, whether or not they are listed.

2.2 Government documents.

2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a

part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are

those cited in the solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICATIONS

MIL-PRF-19500

DEPARTMENT OF DEFENSE STANDARDS

MIL-STD-750 Test Methods for Semiconductor Devices.

-

Semiconductor Devices, General Specification for.

-

* (Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or

https://assist.daps.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D,

Philadelphia, PA 19111-5094.)

* 2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the

text of this document and the references cited herein, the text of this document takes precedence. Nothing in this

document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

2

MIL-PRF-19500/703B

Symbol

Dimensions

Inches

Millimeters

Min

.395

.291

.1085

.010

.281

.090

.220

.115

Min

.405

.301

.1205

.020

.291

.100

.230

.125

Min

10.03

7.39

2.76

0.25

7.14

2.29

5.59

2.92

Max

10.29

7.65

3.06

0.51

7.39

2.54

5.84

3.18

BL

BW

CH

LH

LW1

LW2

LL1

LL2

LS1

LS2

0.150 BSC

0.075 BSC

3.81 BSC

1.91 BSC

Q1

Q2

.030

0.762

TERM 1

TERM 2

TERM 3

Drain

Gate

Source

NOTES:

1. Dimensions are in inches.

2. Millimeters are given for general information only.

3. The lid shall be electrically isolated from the drain, gate and source.

FIGURE 1. Physical dimensions for TO-276AA (SMD-0.5), U3.

3

MIL-PRF-19500/703B

3. REQUIREMENTS

3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.

3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a

manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)

before contract award (see 4.2 and 6.3).

3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as

specified in MIL-PRF-19500 and as follows.

I

_AS........ Rated avalanche current, nonrepetitive

nC ........ nano Coulomb.

3.4 Interface and physical dimensions. Interface and physical dimensions shall be as specified in

MIL-PRF-19500, and on figure 1 (TO-276AA, SMD-0.5, U3) herein.

3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein.

Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).

3.5 Electrostatic discharge protection. The devices covered by this specification require electrostatic discharge

protection.

3.5.1 Handling. Metal oxide semiconductor (MOS) devices must be handled with certain precautions to avoid

damage due to the accumulation of static charge. However, the following handling practices are recommended

(see 3.5).

a. Devices should be handled on benches with conductive handling devices.

b. Ground test equipment, tools, and personnel handling devices.

c. Do not handle devices by the leads.

d. Store devices in conductive foam or carriers.

e. Avoid use of plastic, rubber, or silk in MOS areas.

f. Maintain relative humidity above 50 percent if practical.

g. Care should be exercised during test and troubleshooting to apply not more than maximum rated

voltage to any lead.

h. Gate must be terminated to source, R ≤ or 100 kΩ, whenever bias voltage is applied drain to source.

3.6 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance

characteristics are as specified in 1.3, 1.4, and table I.

3.7 Electrical test requirements. The electrical test requirements shall be as specified in table I.

3.8 Marking. Marking shall be in accordance with MIL-PRF-19500. At the option of the manufacturer, marking of

the country of origin may be omitted from the body of the transistor but shall be retained on the initial container.

3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and

shall be free from other defects that will affect life, serviceability, or appearance.

4

MIL-PRF-19500/703B

4. VERIFICATION

4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:

a. Qualification inspection (see 4.2).

b. Screening (see 4.3).

c. Conformance inspection (see 4.4 and tables I and II).

4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as specified

herein.

4.2.1 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In

case qualification was awarded to a prior revision of the specification sheet that did not request the performance of

table III tests, the tests specified in table III herein that were not performed in the prior revision shall be performed on

the first inspection lot of this revision to maintain qualification.

5

MIL-PRF-19500/703B

4.3 Screening (JANS and JANTXV). Screening shall be in accordance with table E-IV of MIL-PRF-19500, and as

specified herein. The following measurements shall be made in accordance with table I herein. Devices that exceed

the limits of table I herein shall not be acceptable.

Screen (see table E-IV

of MIL-PRF-19500)

(1) (2)

Measurement

JANS level

Gate stress test (see 4.3.1)

JANTXV levels

Gate stress test (see 4.3.1)

(3)

Method 3470 of MIL-STD-750, E_AS(see 4.3.2)

(3) 3c

9

Method 3161 of MIL-STD-750, thermal

impedance, (see 4.3.3)

Method 3161 of MIL-STD-750, thermal impedance,

(see 4.3.3)

Subgroup 2 of table I herein, I

,

Not applicable

GSSF1

I

, I as a minimum

GSSR1 DSS1

10

11

Method 1042 of MIL-STD-750, test condition B

I

, I

, r

, V

I

, I

, r

, V

GSSF1 GSSR1 DSS1 DS(on)1 GS(TH)1

Subgroup 2 of table I herein

∆I

GSSF1

= ±20 nA dc or ±100 percent

of initial value, whichever is greater.

∆I = ±20 nA dc or ±100 percent of initial

GSSR1

value, whichever is greater.

∆I = ±10 µA dc or ±100 percent of

DSS1

initial value, whichever is greater.

12

13

Method 1042 of MIL-STD-750, test condition A

Subgroups 2 and 3 of table I herein

Method 1042 of MIL-STD-750, test condition A

Subgroups 2 and 3 of table I herein

∆I

GSSF1

= ±20 nA dc or ±100 percent

∆I = ±20 nA dc or ±100 percent

GSSF1

of initial value, whichever is greater.

∆I = ±20 nA dc or ±100 percent of initial

of initial value, whichever is greater.

∆I = ±20 nA dc or ±100 percent of initial

GSSR1

value, whichever is greater.

∆I = ±10 µA dc or ±100 percent of

GSSR1

value, whichever is greater.

∆I = ±10 µA dc or ±100 percent of

DSS1

initial value, whichever is greater.

DSS1

initial value, whichever is greater.

∆r

DS(on)1

=±20 percent of initial value

= ±20 percent of initial value

∆r

DS(on)1

=±20 percent of initial value

= ±20 percent of initial value

∆V

GS(th)1

(1) At the end of the test program, I_GSSF1, I_GSSR1, and I_DSS1are measured.

(2) An out-of-family program to characterize I_GSSF1, I_GSSR1, I_DSS1, and V_{GS( )1}shall be invoked.

th

(3) Shall be performed anytime before screen 9.

6

MIL-PRF-19500/703B

4.3.1 Gate stress test. Apply V_GS= 24 V, minimum for t = 250 µS, minimum.

4.3.2 Single pulse avalanche energy (E_AS).

a.

b.

Peak current.................................................................. I_AS= I_D1.







V

− V

Inductance..................................................................... L =

mH minimum.



_DD

2E_AS

BR









²

V_BR

I



(

)

D1





c.

d.

Gate to source resistor R_GS: ......................................... 25 Ω ≤ R_GS≤ 200 Ω.

Supply voltage............................................................... V_DD= 25 V dc, except V_DD= 50 V dc for

2N7481U3.

e.

f.

Initial case temperature................................................. T_C= +25° C, -5° C, +10° C.

Gate voltage, ................................................................ V_GS= 12 V dc.

Number of pulses to be applied: ................................... 1 pulse minimum.

g.

* 4.3.3 Thermal impedance. The thermal impedance measurements shall be performed in accordance with method

3161 of MIL-STD-750 using the guidelines in that method for determining I_M, I_H, t_H, t_SW, (and V_Hwhere appropriate).

Measurement delay time (t_MD) = 70 µs max. See table III, group E, subgroup 4 herein.

4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500.

4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with table E-V of MIL-PRF-19500

and table I herein.

4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for

subgroup testing in table E-VIA (JANS) and table E-VIB (JANTXV) of MIL-PRF-19500, and as follows. Electrical

measurements (end-points) shall be in accordance with table I, subgroup 2 herein.

7

MIL-PRF-19500/703B

* 4.4.2.1 Group B inspection, table E-VIA (JANS) of MIL-PRF-19500.

Subgroup Method

Condition

B3

B4

1051

2077

1042

Test condition G, 100 cycles.

Scanning electron microscope (SEM).

Intermittent operation life, condition D, 2,000 cycles. No heat sink or forced-air cooling on

the device shall be permitted during the on cycle. t_on= 30 seconds minimum.

B5

1042

2037

Accelerated steady-state gate bias, condition B, V_GS= rated; T_A= +175°C, t = 24 hours

minimum; or T_A= +150°C, t = 48 hours minimum.

Accelerated steady-state reverse bias, condition A, V_DS= rated; T_A= +175°C,

t = 120 hours minimum; or T_A= +150°C, t = 240 hours minimum.

*

Bond strength, test condition D.

4.4.2.2 Group B inspection, table E-VIB (JANTXV) of MIL-PRF-19500.

Subgroup Method

Condition

B2

B3

1051

1042

Test condition G, 25 cycles.

Intermittent operation life, condition D, 2,000 cycles. No heat sink or forced-air cooling on

the device shall be permitted during the on cycle. t_on= 30 seconds minimum.

B5 and B6

Not applicable.

4.4.3 Group C inspection. Group C inspection shall be conducted in accordance with the conditions specified for

subgroup testing in table E-VII of MIL-PRF-19500 and as follows. Electrical measurements (end-points) shall be in

accordance with table I, subgroup 2 herein.

Subgroup Method

Condition

C2

2036

Terminal strength is not applicable.

*

C5

C6

3161

1042

Thermal resistance, see 4.3.3, R_θJC(max)= 1.67ºC/W.

Intermittent operation life, condition D, 6,000 cycles. No heat sink or forced-air

cooling on the device shall be permitted during the on cycle. t_on= 30 seconds minimum.

4.4.4 Group D inspection. Group D inspection shall be conducted in accordance with table E-VIII of

MIL-PRF-19500 and table II herein.

4.4.5 Group E inspection. Group E inspection shall be conducted in accordance with the conditions specified for

subgroup testing in table E-IX of MIL-PRF-19500 and as specified in table III herein. Electrical measurements (end-

points) shall be in accordance with table I, subgroup 2 herein.

4.4.5.1 SEE. Design capability shall be tested on the initial qualification and thereafter whenever a major die

design or process change is introduced. See the design safe operation area figure. End-point measurements shall

be in accordance with table III.

4.5 Methods of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows.

4.5.1 Pulse measurements. Conditions for pulse measurement shall be as specified in section 4 of MIL-STD-750.

8

MIL-PRF-19500/703B

* TABLE I. Group A inspection.

Inspection

1/

MIL-STD-750

Limits

Symbol

Unit

Method

2071

Condition

Min

Max

Subgroup 1

Visual and mechanical

inspection

Subgroup 2

*

Thermal impedance 2/

3161

3407

See 4.3.3

°C/W

Z _θ

JC

Breakdown voltage

drain to source

2N7479U3

Bias condition C, V_GS= 0,

I_D= 1 mA dc

V_(BR)DSS

30

60

V dc

2N7480U3

2N7481U3

100

Gate to source

voltage (threshold)

3403

3411

3413

3421

V_GS(TH)1

2.0

4.0

V dc

nA dc

µA dc

V_DS≥ V_GS

,

I_D= 1 mA dc

Gate current

Drain current

V_GS= +20 V dc, bias condition C,

V_DS= 0

+100

-100

10

I_GSSF1

I_GSSR1

I_DSS1

V_GS= -20 V dc, bias condition C,

V_DS= 0

V_GS= 0, bias condition C,

V_DS= 80 percent of rated V_DS

,

Static drain to source

on-state resistance

2N7479U3

V_GS= 12V dc, condition A,

pulsed (see 4.5.1), I_D= I_D2

r_DS(ON)1

0.020

0.030

0.060

Ω

2N7480U3

2N7481U3

Forward voltage

4011

V_GS= 0, condition A, pulsed

(see 4.5.1), I_D= I_D1

V_SD

2N7479U3

2N7480U3

2N7481U3

1.2

V dc

See footnotes at end of table.

9

MIL-PRF-19500/703B

* TABLE I. Group A inspection - Continued.

Inspection 1/

MIL-STD-750

Symbol

Limits

Min Max

Unit

Method

Condition

Subgroup 3

High temperature operation

Gate current

T_C= T_J= +125°C

3411

3413

3421

I_GSS2

nA dc

µA dc

V_GS= ±20 V dc, bias condition C,

_DS= 0

±200

V

Drain current

V_GS= 0, bias condition C,

V_DS= 80 percent of rated V_DS

I_DSS2

25

Static drain to source on-

state resistance

2N7479U3

V_GS= 12V dc, condition A,

pulsed (see 4.5.1), I_D= I_D2

r_DS(ON)3

0.035

0.060

0.110

Ω

2N7480U3

2N7481U3

Gate to source voltage

(threshold)

3403

3475

3472

V_GS(TH)2

V_GS(TH)3

g_FS

1.0

V dc

V_DS≥ V_GS, I_D= 1 mA dc

Low temperature operation

T_C= T_J= -55°C

Gate to source voltage

(threshold)

5.0

V dc

V_DS≥ V_GS(TH)3, I_D= 1 mA dc

Subgroup 4

Forward transconductance

2N7479U3

I_D= I_D2, V_DD= 15 V dc (see 4.5.1)

16

13

S

2N7480U3

2N7481U3

Switching time test

Turn-on delay time

I_D= I_D1, V_GS= 12 V dc, R_G= 2.35 Ω, V_DD

= 50 percent of rated V_DS

t_D(on)

25

100

35

ns

Rise time

t_r

Turn-off delay time

Fall time

t_D(off)

t_f

30

See footnotes at end of table.

10

MIL-PRF-19500/703B

* TABLE I. Group A inspection - Continued.

Inspection

1/

MIL-STD-750

Symbol

Limits

Unit

Method

3474

Condition

Min

Max

Subgroup 5

Safe operating area

test (high voltage)

See figures 4, 5, and 6

t_p= 10 ms min.

V

_DS= 80 percent of max. rated V_DS

Electrical measurements

Subgroup 6

See table I, subgroup 2

Not applicable

Subgroup 7

Gate charge

3471

Condition B. I_D= I_D1

,

V_GS= 12 V dc

V_DD= 50 percent of rated V_DS

On-state gate charge

2N7479U3

Q_G(ON)

Q_GS

Q_GD

t_rr

65

45

50

nC

2N7480U3

2N7481U3

Gate to source charge

2N7479U3

20

10

nC

2N7480U3

2N7481U3

7.4

Gate to drain charge

2N7479U3

10

15

20

nC

2N7480U3

2N7481U3

Reverse recovery time

3473

di/dt = -100 A/µs, V_DD≤ 50 V

I_D= I_D1

2N7479U3

2N7480U3

2N7481U3

102

125

250

ns

1/ For sampling plan, see MIL-PRF-19500.

2/ This test required for the following end-point measurements only (not intended for 4.3, screen 9 or 11):

Group B, subgroups 2 and 3 (JANTXV).

Group B, subgroups 3 and 4 (JANS).

Group C, subgroup 6.

Group E, subgroup 1.

11

MIL-PRF-19500/703B

TABLE II. Group D inspection.

Inspection

1/ 2/ 3/

MIL-STD-750

Symbol

Pre-irradiation

limits

R, F, G and H

Post-irradiation limits

R, F and G H 4/

Unit

Method

Conditions

Min

Max

Min

Max

Min

Max

Subgroup 1

Not applicable

Subgroup 2

T_C= + 25°C

Steady-state total

dose irradiation (V_GS

bias) 5/

1019

V_GS= 12 V;

V_DS= 0

Steady-state total

dose irradiation (V_DS

bias) 5/

V_GS= 0;

V_DS= 80 percent of

rated

V

_DS(preirradiation)

End-point electricals:

Breakdown voltage,

drain to source

2N7479U3

3407

V_GS= 0 V; I_D= 1 mA;

bias condition C

V_(BR)DSS

30

60

30

60

30

60

V dc

2N7480U3

2N7481U3

100

Gate to source

voltage (threshold)

3403

3411

3413

V_GS(th)1

I_GSSF1

I_GSSR1

I_DSS

2.0

4.0

100

-100

10

2.0

4.0

100

-100

10

1.5

4.0

100

-100

25

V dc

V_DS≥ V_GS

I_D= 1 mA

Gate current

Drain current

V_GS= +20 V; V_DS= 0

bias condition C

nA dc

µA dc

V_GS= -20 V; V_DS= 0

bias condition C

V_GS= 0, V_DS= 80

percent of rated V_DS

(preirradiation)

bias condition C,

Static drain to

source on-state

voltage

3405

4011

V_GS= 12 V; I_D= I_D2

condition A

pulsed (see 4.5.1)

V_DS(on)

2N7479U3

0.528

0.714

1.024

1.2

0.528

0.714

1.024

1.2

0.660 V dc

0.903 V dc

1.280 V dc

2N7480U3

2N7481U3

Forward voltage

source drain diode

V_GS= 0; I_D= I_D1

bias condition C

V_SD

1.2

V dc

1/

2/

For sampling plan see MIL-PRF-19500.

Group D qualification may be performed prior to lot formation. Wafers qualified to these group D QCI

requirements may be used for any other specification sheet utilizing the same die design.

3/

At the manufacturer’s option, group D samples need not be subjected to the screening tests, and may be

assembled in it’s qualified package or in any qualified package that the manufacturer has data to correlate the

performance to the designated package.

4/

5/

The H designation represents devices which pass end-points at all 100K, 300K, and 600K rads (Si).

Separate samples shall be pulled for each bias.

12

MIL-PRF-19500/703B

* TABLE III. Group E inspection (all quality levels) for qualification or re-qualification only.

Inspection

MIL-STD-750

Conditions

Qualification and

large lot quality

conformance

inspection

Method

Subgroup 1

45 devices

c = 0

Temperature cycling

1051

1071

Test condition G, 500 cycles

As applicable

Hermetic seal

Fine leak

Gross leak

Electrical measurements

Subgroup 2 1/

Table I, subgroup 2 herein.

45 devices

c = 0

Steady-state gate bias

Electrical measurements

Steady-state reverse bias

Electrical measurements

Subgroup 4

1042

Condition B, 1,000 hours.

Table I, subgroup 2 herein.

Condition A, 1,000 hours.

Table I, subgroup 2 herein.

Sample size

N/A

Thermal impedance curves

See MIL-PRF-19500.

Subgroup 5

Not applicable

15 devices

c = 0

Subgroup 10

22 devices

c = 0

Commutating diode for safe

operating area test procedure

for measuring dv/dt during

reverse recovery of power

MOSFET transistors or

insulated gate bipolar

transistors

3476

Test conditions shall be derived by the manufacturer

See footnotes at end of table.

13

MIL-PRF-19500/703B

* TABLE III. Group E inspection (all quality levels) for qualification or re-qualification only - Continued.

Qualification

MIL-STD-750

and large lot

Inspection

quality conformance

inspection

Method

1080

Conditions

Subgroup 11

3 devices

SEE 2/ 3/ 4/

See figure 7.

_GSSF1, I_GSSR1, and I

Electrical

measurements 5/

I

in accordance with table I, subgroup 2

DSS1

SEE irradiation

Fluence = 3E5 ± 20 percent ions/cm²

Flux = 2E3 to 2E4 ions/cm²/sec, temperature = 25 ± 5 °C

Surface LET = 38 MeV-cm²/mg ±5%, range = 38 µm ±7.5%,

energy = 300 MeV ±7.5%

2N7479U3

In-situ bias conditions:

V

= 30 V and V = -10 V

GS

DS

= 22.5 V and V = -15 V

GS

= 15 V and V = -20 V

GS

(nominal 3.86 MeV/nucleon at Brookhaven National Lab

Accelerator)

2N7480U3

2N7481U3

In-situ bias conditions:

V

= 60 V and V = -15 V

GS

DS

= 30 V and V = -20 V

GS

(nominal 3.86 MeV/nucleon at Brookhaven National Lab

Accelerator)

In-situ bias conditions:

V

=100 V and V = -20 V

DS GS

(nominal 3.86 MeV/nucleon at Brookhaven National Lab

Accelerator)

Surface LET = 61 MeV-cm2/mg ±5%, range = 31 µm ±10%,

energy = 330 MeV ±7.5%

2N7479U3

2N7480U3

In-situ bias conditions: V_DS= 25 V and V_GS= -5 V

V_DS= 20 V and V_GS= -10 V

V_DS= 15 V and V_GS= -15 V

V_DS= 7.5 V and V_GS= -20 V

(nominal 2.92 MeV/nucleon at Brookhaven National Lab

Accelerator)

In-situ bias conditions:

V

= 46 V and V = -5 V

GS

DS

= 30 V and V = -10 V

GS

= 25 V and V = -15 V

GS

= 15 V and V = -20 V

GS

(nominal 2.92 MeV/nucleon at Brookhaven National Lab

Accelerator)

See footnotes at end of table.

14

MIL-PRF-19500/703B

* TABLE III. Group E inspection (all quality levels) for qualification or re-qualification only - Continued.

Qualification

MIL-STD-750

and large lot

Inspection

quality

Method

Conditions

conformance

inspection

Subgroup 11-

continued.

3 devices

2N7481U3

In-situ bias conditions:

V

= 100 V and V = -10 V

GS

DS

= 35 V and V = -15 V

GS

= 25 V and V = -20 V

GS

(nominal 2.92 MeV/nucleon at Brookhaven National Lab Accelerator)

Surface LET = 84 MeV-cm2/mg ± 5%,

range = 28 µm ±7.5%, energy = 350 MeV ±7.5%

2N7479U3

2N7480U3

In-situ bias conditions: V_DS= 25 V and V_GS= -5 V

V_DS= 20 V and V_GS= -10 V

(nominal 1.98 MeV/nucleon at Brookhaven National Lab Accelerator)

In-situ bias conditions:

V

= 35 V and V = -5 V

GS

DS

= 25 V and V = -10 V

GS

= 15 V and V = -15 V

GS

= 10 V and V = -20 V

GS

(nominal 1.98 MeV/nucleon at Brookhaven National Lab Accelerator)

2N7481U3

In-situ bias conditions:

V

= 100 V and V = -5 V

GS

DS

= 80 V and V = -10 V

GS

= 25 V and V = -15 V

GS

(nominal 1.98 MeV/nucleon at Brookhaven National Lab Accelerator)

Electrical

measurements 5/

I

_GSSF1, I_GSSR1, and I in accordance with table I, subgroup 2

DSS1

1/ A separate sample for each test shall be pulled.

2/ Group E qualification of SEE testing may be performed prior to lot formation. Qualification may be extended to

other specification sheets utilizing the same structurally identical die design.

3/ Device qualification to a higher level linear energy transfer (LET) is sufficient to qualify all lower level LET’s.

4/ The sampling plan applies to each bias condition.

5/ Examine I

, I

, and I_DSS1before and following SEE irradiation to determine acceptability for each

GSSF1 GSSR1

bias condition. Other test conditions in accordance with table I, subgroup 2, may be performed at the

manufacturer’s option.

15

MIL-PRF-19500/703B

10

1

D = 0.50

0.20

0.10

0.05

P

DM

0.1

t

0.02

0.01

SINGLE PULSE

(THERMAL RESPONSE)

1

t

2

Notes:

1. Duty factor D = t / t

1

2

2. Peak T =P

x Z

+ T

thJC C

J

DM

0.01

0.00001

0.0001

0.001

0.01

0.1

1

t , Rectangular Pulse Duration (sec)

1

FIGURE 2. Thermal response curve.

16

MIL-PRF-19500/703B

2N7479U3

2N7480U3

Maximum Current Rating

44

40

36

32

28

24

20

16

12

8

35

30

25

20

15

10

5

4

0

25

50

75

100

125

150

25

50

75

100

125

150

TC, Case Temperature (ºC)

T_C,

TC, Case Temperature (ºC)

T_C,

2N7481U3

Maximum Current Rating

30

25

20

15

10

5

0

25

50

75

100

125

150

TC, Case Temperature (ºC)

T_C,

FIGURE 3. Maximum drain current versus case temperature graphs.

17

MIL-PRF-19500/703B

Operation in this area limited by RDS(on)

100.0

10.0

1.0

100µs

1ms

10ms

DC

T_C= 25^oC

T_J= 150^oC

Single Pulse

0.1

1

10

100

V_DS, Drain-to-Source Voltage (V)

2N7479U3

Operation in this area limited by RDS(on)

100.0

10.0

1.0

100µs

1ms

10ms

T_C= 25^oC

T_J= 150^oC

Single Pulse

DC

0.1

1

10

100

V_DS, Drain-to-Source Voltage (V)

2N7480U3

* FIGURE 5. Safe operating area graph.

18

MIL-PRF-19500/703B

Operation in this area limited by RDS(on)

100.0

10.0

1.0

100µs

1ms

T_C= 25^oC

T_J= 150^oC

10ms

DC

Single Pulse

0.1

1

10

100

V_DS, Drain-to-Source Voltage (V)

2N7481U3

* FIGURE 6. Safe operating area graph.

19

MIL-PRF-19500/703B

Single-Event-Effects RESPONSE

35

30

25

20

15

10

5

LET=38±5%;

38µm±7.5%;

300MeV±7.5%

LET=61±5%;

31µm±10%;

330MeV±7.5%

LET=84±5%;

28µm±7.5%;

350MeV±10%

0

-5

-10

-15

-20

Bias VGS (Volts)

2N7479U3

Single-Event-Effects RESPONSE

70

60

50

40

30

20

10

0

LET=38±5%;

38µm±7.5%;

300MeV±7.5%

LET=61±5%;

31µm±10%;

330MeV±7.5%

LET=84±5%;

28µm±7.5%;

350MeV±10%

0

-5

-10

-15

-20

Bias VGS (Volts)

2N7480U3

Single-Event-Effects RESPONSE

120

100

80

60

40

20

0

LET=38±5%;

38µm±7.5%;

300MeV±7.5%

LET=61±5%;

31µm±10%;

330MeV±7.5%

LET=84±5%;

28µm±7.5%;

350MeV±10%

0

-5

-10

-15

-20

Bias VGS (Volts)

2N7481U3

* FIGURE 7. SEE safe operating area graph.

20

MIL-PRF-19500/703B

5. PACKAGING

* 5.1 Packaging. For acquisition purposes, the packaging requirements shall be as specified in the contract or order

(see 6.2). When packaging of materiel is to be performed by DoD or in-house contractor personnel, these personnel

need to contact the responsible packaging activity to ascertain packaging requirements. Packaging requirements are

maintained by the Inventory Control Point's packaging activities within the Military Service or Defense Agency, or

within the Military Service’s system commands. Packaging data retrieval is available from the managing Military

Department's or Defense Agency's automated packaging files, CD-ROM products, or by contacting the responsible

packaging activity.

6. NOTES

* (This section contains information of a general or explanatory nature that may be helpful, but is not mandatory.

The notes specified in MIL-PRF-19500 are applicable to this specification.)

* 6.1 Intended use. Semiconductors conforming to this specification are intended for original equipment design

applications and logistic support of existing equipment.

6.2 Acquisition requirements. Acquisition documents should specify the following:

a. Title, number, and date of this specification.

b. Packaging requirements (see 5.1).

c. Lead finish (see 3.4.1).

d. Product assurance level and type designator.

* 6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which are,

at the time of award of contract, qualified for inclusion in Qualified Manufacturers List (QML 19500) whether or not

such products have actually been so listed by that date. The attention of the contractors is called to these

requirements, and manufacturers are urged to arrange to have the products that they propose to offer to the Federal

Government tested for qualification in order that they may be eligible to be awarded contracts or orders for the

products covered by this specification. Information pertaining to qualification of products may be obtained from DLA

Land and Maritime, ATTN: VQE, P.O. Box 3990, Columbus, OH 43218-3990 or e-mail vqe.chief@dla.mil. An online

listing of products qualified to this specification may be found in the Qualified Products Database (QPD) at

https://assist.daps.dla.mil .

6.4 Cross-reference list. The following table shows the generic P/N and its associated military P/N (without JAN

and RHA prefix).

Generic P/N

Military P/N

IRHNJ57Z30

IRHNJ57034

IRHNJ57130

2N7479U3

2N7480U3

2N7481U3

21

MIL-PRF-19500/703B

6.5 Changes from previous issue. The margins of this specification are marked with asterisks to indicate where

changes from the previous issue were made. This was done as a convenience only and the Government assumes

no liability whatsoever for any inaccuracies in these notations. Bidders and contractors are cautioned to evaluate the

requirements of this document based on the entire content irrespective of the marginal notations and relationship to

the last previous issue.

Custodians:

Army - CR

Navy - EC

Air Force - 85

NASA - NA

DLA - CC

Preparing activity:

DLA - CC

(Project 5961-2009-002)

Review activities:

Army - AV, MI

Air Force - 99

* NOTE: The activities listed above were interested in this document as of the date of this document. Since

organizations and responsibilities can change, you should verify the currency of the information above using the

ASSIST Online database at https://assist.daps.dla.mil/ .

22


型号：	JANTXVH2N7481U3
厂家：	Infineon
描述：	Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET
文件：	总22页 (文件大小：190K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

JANTXVH2N7481U3 [INFINEON]

相关型号：

JANTXVHN3G01

JANTXVIN6626US

JANTXVIN6627US

JANTXVIN6628US

JANTXVIN6629US

JANTXVIN6631US

JANTXVLL3595A

JANTXVLL962AUR-1

JANTXVLL962BUR-1

JANTXVLL962UR-1

JANTXVLL963AUR-1

JANTXVLL963BUR-1