Q67006A9373 [INFINEON]
Buffer/Inverter Based Peripheral Driver, 0.75A, PDSO20, SOP-20;
| 型号： | Q67006A9373 |
| 厂家： | 
Infineon |
| 描述： | Buffer/Inverter Based Peripheral Driver, 0.75A, PDSO20, SOP-20 驱动 光电二极管 接口集成电路 |
| 文件： | 总9页 (文件大小：238K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet TLE 6225 G
Smart Quad Low-Side Switch
Features
Product Summary
• Shorted circuit protection
• Overtemperature protection
• Overvoltage protection
Supply voltage
Drain source voltage
On resistance
Output current(each)
(individ.)
VS
4.5 – 32
V
V
VDS(AZ)max 60
• Open Load Detection
RON
ID(NOM)
1.7
350
500
Ω
• Direct parallel control of the inputs
• Inputs high or low active programmable
• General fault flag
mA
mA
• Very low standby quiescent current
• Compatible with 3V microcontrollers
• Electostatic discharge (ESD) protection
Application
• µC compatible power switch for 12 V applications
• Switch for automotive and industrial systems
• Line, relay or lamp driver
P-DSO 20-6
Ordering Code:
Q 67006 A9373
General description
Quad channel Low-Side Switch in Smart Power Technology (SPT) with four separate inputs
and four open drain DMOS output stages. The TLE 6225 G is protected by embedded protec-
tion functions and designed for automotive and industrial applications, to drive lines, lamps
and relays.
Block Diagram
ENA
VS
FAULT
PRG
GND
VS
Vbb
Diagnostic,
Protection
IN1
IN4
Over Temp.
Open Load
as Ch. 1
as Ch. 1
as Ch. 1
Logic
OUT1
Output Stage
4
1
4
Output Control
Buffer
OUT4
GND
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1
Data Sheet TLE 6225 G
Pin Description
Pin Configuration (Top view)
Pin
1
Symbol
Function
Input Channel 1
Input Channel 2
General Fault Flag
Ground
IN1 1•
20 PRG
19 OUT1
18 OUT2
17 GND
16 GND
15 GND
14 GND
13 OUT3
12 OUT4
11 ENA
IN1
IN2
FAULT
GND
GND
GND
GND
VS
2
3
4
5
6
7
8
9
2
IN2
3
FAULT
GND
GND
GND
GND
VS
4
5
Ground
6
Ground
Ground
7
IN3
8
Supply Voltage
Input Channel 3
Input Channel 4
Enable for all channels/Standby
Power Output channel 4
Power Output channel 3
Ground
IN4 10
9
IN3
IN4
10
11
12
13
14
15
16
17
18
19
20
P-DSO-20-6
ENA
OUT4
OUT3
GND
GND
GND
GND
OUT2
OUT1
PRG
Ground
Ground
Ground
Power Output channel 2
Power Output channel 1
Program (inputs high or low active)
V2.1
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2
Data Sheet TLE 6225 G
Maximum Ratings for Tj = – 40°C to 150°C
Parameter
Symbol
Values
-0.3 ... +40
Unit
Supply Voltage
VS
V
Continuous Drain Source Voltage (OUT1...OUT4)
Input Voltage, IN1 - IN4
Input Voltage, PRG, ENA
VDS
VIN
VIN
-0.7 ... +45
- 0.3 ... + 7
- 0.3 ... + 40
75
V
V
V
V
2
)
Output Load Dump Protection VLoad Dump=U +U ; U =13.5 V VLoad Dump
P
S
P
With Automotive Relay Load RL = 70 Ω
1
)
R =2 Ω; t =400ms; IN = low or high
I
d
FAULT Output Voltage
VFault
Tj
Tstg
ID(lim)
EAS
- 0.3 ... + 40
- 40 ... + 150
- 55 ... + 150
ID(lim) min
V
°C
Operating Temperature Range
Storage Temperature Range
Output Current per Channel (see electrical characteristics)
Output Clamping Energy
A
mJ
10
I = 0.2 A
D
Power Dissipation (DC) @ TA = 25 °C (on PCB 6 cm2 cool-
ing area)
Ptot
2.5
W
V
Electrostatic Discharge Voltage (Human Body Model)
VESD
2000
according to MIL STD 883D, method 3015.7 and EOS/ESD
assn. standard S5.1 - 1993
DIN Humidity Category, DIN 40 040
IEC Climatic Category, DIN IEC 68-1
Thermal Resistance
E
40/150/56
junction - pin
RthJP
RthJA
RthJA
23 K/W
80
45
junction - ambient @ min. footprint
junction - ambient @ 6 cm2 cooling area
1
)
)
R =internal resistance of the load dump test pulse generator LD200
LoadDump
I
2
V
is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839.
V2.1
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Data Sheet TLE 6225 G
Electrical Characteristics
Parameter and Conditions
Symbol
Values
Unit
VS = 4.5 to 32 V ; Tj = - 40 °C to + 150 °C
(unless otherwise specified)
min
typ
max
1. Power Supply
VS
V
Supply Voltage
4.5
32
Supply Current (ENA = H, Outputs ON)
Supply Current in Standby Mode (ENA = L)
IS(ON)
IS(stby)
1
2
10
mA
µA
2. Power Outputs
ON Resistance VS ≥ 6 V; ID = 300 mA
TJ = 25°C
TJ = 150°C
RDS(ON)
1.7
3
2
3.6
Ω
45
500
50
60
V
Output Clamping Voltage
Current Limit
Output OFF VDS(AZ)
750 1000 mA
ID(lim)
Output Leakage Current
VENA = L
5
10
10
µA
µs
µs
ID(lkg)
5
5
Turn-On Time
Turn-Off Time
ID = 200 mA, resistive load tON
ID = 200 mA, resistive load tOFF
3. Digital Inputs (IN1 – IN4, ENA, PRG)
Input Low Voltage (IN1 – IN4, PRG)
Input Low Voltage (ENA)
VINL
VINL
VINH
VINHys
VINHys
IIN(1..4)PU
- 0.3
- 0.3
2.0
50
20
20
1
0.8
V
V
V
mV
mV
µA
Input High Voltage
Input Voltage Hysteresis (IN1 – IN4, PRG)
Input Voltage Hysteresis (ENA)
Input Pull Up Current (IN1...IN4) @ PRG = L,
VIN = 0V
Input Pull Down Current (IN1...IN4) @ PRG = H,
VIN < VS; VIN < 6
100
100
50
100
100
IIN(1..4)PD
20
20
50
50
µA
PRG, ENA Pull Down Current
PRG, ENA Pull Down Current
VIN = 5 V
VIN = 14 V
IIN(PRG,ENA)
IIN(PRG,ENA)
100
200
µA
µA
4. Digital Output (FAULT )
FAULT Output Low Voltage
IFAULT = 1.6 mA
VFAULTL
0.4
V
5. Diagnostic Functions
Open Load/Short to Ground Detection Voltage
Output Pull Down Current
Fault Delay Time; VS = 12V
Overtemperature Shutdown Threshold
Hysteresis
VDS(OL)
IPD(OL)
td(fault)
Tth(sd)
Thys
0.4*VS 0.5*VS 0.6*VS
V
µA
µs
°C
K
20
50
50
100
200
200
200
170
10
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Data Sheet TLE 6225 G
Functional Description
The TLE 6225 G is a quad channel low-side switch with four power DMOS stages. The power
transistors are protected against short to VBB, overload, overtemperature and against over-
voltage by zenerclamp.
The diagnostic logic recognises a fault condition which is indicated by a fault flag.
Circuit Description
Output Stage Control
Each output is independently controlled by an input pin and a common enable line, which en-
ables/disables all four outputs. The parallel inputs are high or low active depending on the
PRG pin. If the parallel input pins are not connected (independent of high or low activity) it is
guaranteed that the outputs 1 to 4 are switched OFF. ENA - and PRG - pin itself are internally
pulled down when they are not connected.
ENA - Enable pin.
PRG - Program pin.
Power Transistors
ENA = High:
Active mode. Channels are enabled
ENA = Low (GND): Sleep mode. Channels are switched off. Less than
1 µA current consumption.
PRG = High:
Parallel inputs Channel 1 to 4 are high active
PRG = Low (GND): Parallel inputs Channel 1 to 4 are low active.
Each of the four output stages has its own zenerclamp. This causes a voltage limitation at the
power transistors when inductive loads are switched off. The outputs are provided with a cur-
rent limitation set to a minimum of 500 mA.
Each output is protected by embedded protection functions3). In the event of an overload or
short to supply, the current is internally limited. If this operation leads to an overtemperature
condition, a second protection level (about 170 °C) will turn the effected output into a PWM-
mode (selective thermal shutdown with restart) to prevent critical chip temperatures. The tem-
perature hysteresis is typically 10K.
Diagnostic
The FAULT pin is an open drain output. The logic status depends on the programming pin
PRG.
FAULT - pin.
FAULT = High
FAULT = Low
no fault @ PRG = High
no fault @ PRG = Low
3) The integrated protection functions prevent an IC destruction under fault conditions and may not be used in normal operation or perma-
nently
V2.1
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5
Data Sheet TLE 6225 G
Diagnostic Table
Enable
Input
Program
Input
Control
Input
Power
Output
Diagnostic
Output
Operating Condition
ENA
PRG
IN
OUT
FAULT
Standby
L
X
X
OFF
H
Normal function
H
H
H
H
L
L
L
H
L
ON
OFF
OFF
ON
L
L
H
H
H
H
H
Overtemperature
H
H
L
L
OFF *
OFF *
H
L
H
H
Open load or short to ground
H
H
H
H
L
L
L
H
L
ON
OFF
OFF
ON
L
H
L
H
H
H
H
X = not relevant
*selective thermal shutdown for each channel at overtemperature
Fault Distinction
Open load/short to ground is recognised in OFF-state. Overtemperature as a result of an
overload or short to battery can only arise in ON-state. If there is only one fault at a time, it is
possible to distinguish which channel is affected with which fault.
V2.1
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Data Sheet TLE 6225 G
Typical electrical Characteristics
Drain-Source on-resistance
RDS(ON) = f (Tj) ; Vs = 5V
Channel 1-4
Typical Drain- Source ON-Resistance
3,5
3
2,5
2
1,5
1
-50
-25
0
25
50
75
100
125
150
175
Tj[°C]
Figure 6 : Typical ON Resistance versus Junction-Temperature
Channel 1-4
Output Clamping Voltage
VDS(AZ) = f (Tj) ; Vs = 5V
Channel 1-4
Typical Clamping Voltage
55
54
53
52
51
50
49
48
-50
-25
0
25
50
75
100
125
150
175
Tj[°C]
Figure 7 : Typical Clamp Voltage versus Junction-Temperature
Channel 1-4
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Data Sheet TLE 6225 G
Timing Diagrams
Power Outputs
VIN
t
tOFF
tON
VDS
80%
20%
t
Application Circuit
VBB
+5V
VS
VCC
PRG
TLE
6225 G
ENA
Py.1
Px.1
Px.2
Px.3
Px.4
IN1
IN2
IN3
IN4
OUT1
OUT2
OUT3
OUT4
µC
e.g. C166
+5V
Line
FAULT
INT
GND
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8
Data Sheet TLE 6225 G
Package and ordering code
all dimensions in mm
P - DSO - 20 - 6
Ordering code
Q 67006 A9373
TLE 6225 G
0.35 x 45˚
1)
7.6-0.2
+0.09
0.23
8˚ max
0.4+0.8
1.27
2)
0.35+0.15
0.3
10.3
0.1
0.2 24x
11
20
1
10
1)
12.8-0.2
GPS05094
Index Marking
1) Does not include plastic or metal protrusions of 0.15 max per side
2) Does not include dambar protrusion of 0.05 max per side
Published by
Infineon Technologies AG,
Bereichs Kommunikation
St.-Martin-Strasse 76,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
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For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Tech-
nologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).
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Due to technical requirements components may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of
Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support
device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are in-
tended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it
is reasonable to assume that the health of the user or other persons may be endangered.
V2.1
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