Q67007-A9335 [INFINEON]
1-A Quad-HBD (Quad-Half-Bridge Driver); 1 -A四HBD （四半桥驱动器）
| 型号： | Q67007-A9335 |
| 厂家： | 
Infineon |
| 描述： | 1-A Quad-HBD (Quad-Half-Bridge Driver) |
| 文件： | 总14页 (文件大小：66K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1-A Quad-HBD (Quad-Half-Bridge Driver)
TLE 4208
Overview
Features
• Driver for up to 3 motors
• Delivers up to 0.8 A continuous
• Optimized for DC motor management applications
• Very low current consumption
in stand-by (Inhibit) mode
P-DSO-28-6
• Low saturation voltage; typ.1.2 V total @ 25 °C; 0.4 A
• Output protected against short circuit
• Error flag diagnosis
• Overvoltage lockout and diagnosis
• Undervoltage lockout
• CMOS/TTL compatible inputs with hysteresis
• No crossover current
• Internal clamp diodes
• Overtemperature protection with hysteresis and diagnosis
• Enhanced power P-DSO-Package
Type
Ordering Code
Package
TLE 4208 G
Q67007-A9335
P-DSO-28-6
Description
The TLE 4208 is a fully protected Quad-Half-Bridge-Driver designed specially for
automotive and industrial motion control applications.
The part is built using the Siemens bipolar high voltage power technology DOPL.
In a cascade configuration up to three actuators (DC motors) can be connected between
the four half-bridges. These four half-bridges are configured as 2 dual-half-bridges,
which are supplied and controlled separately. Operation modes forward (cw), reverse
(ccw), brake and high impedance are invoked from a standard interface.
The standard enhanced power P-DSO-28 package meets the application requirements
and saves PCB-board space and costs.
Furthermore the built-in features like diagnosis, over- and undervoltage-lockout, short-
circuit protection, over-temperature protection and the very low quiescent current in
stand-by mode will open a wide range of automotive and industrial applications.
Semiconductor Group
1
1998-06-03
TLE 4208
GND
1
2
3
4
5
6
7
8
28
27
26
25
24
23
22
21
20
19
18
17
16
15
N.C.
INH
EF
12
12
IN1
N.C.
IN2
V
S12
OUT1
GND
GND
GND
GND
OUT3
N.C.
OUT2
GND
GND
GND
GND
OUT4
TLE 4208 G
9
10
11
12
13
14
V
S34
IN3
IN4
EF
INH
34
34
GND
N.C.
AEP02349
Figure 1
Pin Configuration (top view)
Semiconductor Group
2
1998-06-03
TLE 4208
Pin Definitions and Functions
Pin No.
Symbol
Function
1, 6, 7, 8, 9, GND
14, 20, 21,
Ground;
negative reference potential for blocking capacitor
22, 23
2
3
EF12
IN1
Error Flag output of half-bridges 1and 2;
open collector; low = error
Input channel of half-bridge 1;
controls OUT1
4, 11, 15, 28 N.C.
Not connected
5
OUT1
Power output of half-bridge 1;
full short circuit protected; with integrated clamp diodes
10
12
13
16
17
18
19
24
25
26
27
OUT3
IN3
Power output of half-bridge 3;
full short-circuit protected; with integrated clamp diodes
Input channel of half-bridge 3;
controls OUT3
INH34
EF34
IN4
Inhibit input of half-bridges 3 and 4;
low = half-bridges 3 and 4 in stand-by
Error Flag output of half-bridges 3 and 4;
open collector; low = error
Input channel of half-bridge 4;
controls OUT4
VS34
Power supply voltage of half-bridges 3 and 4;
positive reference potential for blocking capacitor
OUT4
OUT2
VS12
Power output of half-bridge 4;
full short circuit protected; with integrated clamp diodes
Power-output of half-bridge 2;
full short circuit protected; with integrated clamp diodes
Power supply voltage of half-bridges 1 and 2;
positive reference potential for blocking capacitor
IN2
Input channel of half-bridge 2;
controls OUT2
INH12
Inhibit input of half-bridges 1and 2;
low = half-bridges 1 and 2 in stand-by
Semiconductor Group
3
1998-06-03
TLE 4208
TLE 4208 G
25
5
V
S12
27
2
INH
EF
Inhibit 1,2
12
12
DRV1
Fault-Detection 1,2
OUT1
OUT2
GND
DRV2
IN1
IN2
OUT1
OUT2
INH
3
12
IN1
IN2
24
0
1
1
1
1
X
0
0
1
1
X
0
1
0
1
Z
L
L
H
H
Z
L
H
L
26
13
16
1,6,7,8,
9,14,
H
20,21,
22,23
INH
Inhibit 3,4
34
34
DRV3
DRV4
10
EF
Fault-Detection 3,4
OUT3
OUT4
IN3
IN4
OUT3
OUT4
INH
12
17
34
IN3
IN4
19
18
0
1
1
1
1
X
0
0
1
1
X
0
1
0
1
Z
L
L
H
H
Z
L
H
L
H
V
S34
AEB02350
Figure 2
Block Diagram
Semiconductor Group
4
1998-06-03
TLE 4208
Input Logic
Functional Truth Table of Halfbridge 1 and 2
INH12
IN1
IN2
OUT1
OUT2
Mode
0
X
X
Z
Z
Stand-By
1
1
1
1
0
0
1
1
0
1
0
1
L
L
H
H
L
H
L
Brake LL
CW
CCW
H
Brake HH
Note: Half-Bridge 1 and 2 connected to a full-bridge
Functional Truth Table of Half-Bridge 3 and 4
INH34
IN3
IN4
OUT3
OUT4
Mode
0
X
X
Z
Z
Stand-By
1
1
1
1
0
0
1
1
0
1
0
1
L
L
H
H
L
H
L
Brake LL
CW
CCW
H
Brake HH
IN: 0 = Logic LOW
1 = Logic HIGH
X = don’t care
OUT: Z = Output in tristate condition
L = Output in sink condition
H = Output in source condition
Note: Half-Bridge 3 and 4 connected to a full-bridge
Diagnosis
EF12
EF34
Error
1
0
0
1
1
0
0
1
1
1
0
0
0
0
no error
over temperature of half-bridge 1 and 2 or
over voltage of half-bridge 1 and 2
over temperature of half-bridge 3 and 4 or
over voltage of half-bridge 3 and 4
over temperature of all half-bridges or
over voltage of all half-bridges
Semiconductor Group
5
1998-06-03
TLE 4208
Electrical Characteristics
Absolute Maximum Ratings
Parameter
Symbol Limit Values Unit
min. max.
Remarks
Voltages
Supply voltage
VS12,
VS34
– 0.3 45
V
V
V
–
Supply voltage
VS12,
VS34
– 1
– 5
–
t < 0.5 s;
IS12, IS34 > – 2 A
Logic input voltages
(IN1; IN2; INH12;
IN3; IN4; INH34)
VI
20
0V < VS12, VS34 < 45 V
Logic output voltage
(EF12; EF34)
VEF12
VEF34
,
– 0.3 20
V
0 V < VS12, VS34 < 45 V
Currents
Output current (cont.)
Output current (peak)
Output current (diode)
Output current (EF)
IOUT1-4
IOUT1-4
–
–
–
–
1
5
A
internally limited
A
internally limited
IOUT1-4 –1
IEF12-34 –2
A
–
–
mA
Temperatures
Junction temperature
Storage temperature
Tj
– 40
150
150
°C
°C
–
–
Tstg
– 50
Thermal Resistances
Junction pin
Rthj-pin
RthjA
–
–
25
65
K/W
K/W
measured to pin 7
–
Junction ambient
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Semiconductor Group
6
1998-06-03
TLE 4208
Operating Range
Parameter
Symbol
Limit Values
min. max.
VUV OFF 18
Unit
Remarks
Supply voltage
VS12,
VS34
V
V
V
V
After VS12, VS34 rising
above VUV ON
Supply voltage increasing VS12,
– 0.3
– 0.3
– 2
VUV ON
VUV OFF
18
Outputs in tristate
Outputs in tristate
–
VS34
Supply voltage decreasing VS12,
VS34
Logic input voltages
(IN1; IN2; INH12;
IN3; IN4; INH34)
VI
Junction temperature
Tj
– 40
150
°C
–
Note: In the operating range the functions given in the circuit description are fulfilled.
Semiconductor Group
7
1998-06-03
TLE 4208
Electrical Characteristics
8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C;
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Current Consumption
INH12 = INH34 = LOW
Quiescent current
Quiescent current
IS
IS
–
–
–
100 µA IS = IS12 + IS34
40 µA IS = IS12 + IS34;
20
V
S12 = VS34 = 13.2 V;
Tj = 25 °C
INH12 = HIGH and INH34 = LOW or INH12 = LOW and INH34 = HIGH
Supply current
Supply current
IS12, IS34
IS12, IS34
–
–
10
–
20
30
mA –
mA IOUT1/3 = 0.4 A
I
OUT2/4 = – 0.4 A
mA IOUT1/3 = 0.8 A
OUT2/4 = – 0.8 A
Supply current
IS12, IS34
–
–
50
I
Over- and Under Voltage Lockout
UV Switch ON voltage
UV Switch OFF voltage
VUV ON
–
5
6.5 7.5
V
V
VS12, VS34
increasing
VUV OFF
6
–
VS12, VS34
decreasing
UV ON/OFF hysteresis
OV Switch OFF voltage
VUV HY
–
–
0.5
20
–
V
V
VUV ON – VUV OFF
VOV OFF
24
VS12, VS34
increasing
OV Switch ON voltage
OV ON/OFF hysteresis
VOV ON 18
VOV HY
19.5 –
0.5
V
V
VS12, VS34
decreasing
–
–
VOV OFF – VOV ON
Semiconductor Group
8
1998-06-03
TLE 4208
Electrical Characteristics (cont’d)
8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C;
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Outputs OUT1; OUT2; OUT 3; OUT 4
Saturation Voltages
Source (upper)
OUT12, IOUT34 = – 0.2 A
Source (upper)
OUT12, IOUT34 = – 0.4 A
Sink (upper)
OUT12, IOUT34 = – 0.8 A
Sink (lower)
OUT12, IOUT34 = 0.2 A
Sink (lower)
OUT12, IOUT34 = 0.4 A
Sink (lower)
OUT12, IOUT34 = 0.8 A
VSAT U
VSAT U
VSAT U
VSAT L
VSAT L
VSAT L
–
–
–
–
–
–
0.85 1.15 V
Tj = 25 °C
Tj = 25 °C
Tj = 25 °C
Tj = 25 °C
Tj = 25 °C
Tj = 25 °C
I
0.90 1.20 V
1.10 1.50 V
0.15 0.23 V
0.25 0.40 V
0.45 0.75 V
I
I
I
I
I
VSAT = VSAT U + VSAT L
VSAT = VSAT U + VSAT L
VSAT = VSAT U + VSAT L
Total Drop
OUT12, IOUT34 = 0.2 A
Total Drop
OUT12, IOUT34 = 0.4 A
Total Drop
OUT12, IOUT34 = 0.8 A
VSAT
VSAT
VSAT
–
–
–
1
1.4
V
V
V
I
1.2 1.7
1.6 2.5
I
I
Clamp Diodes
Forward voltage; upper
Upper leakage current
Forward voltage; lower
VFU
ILKU
VFL
–
–
–
1
–
1.5
5
V
IF = 0.4 A
mA IF = 0.4 A1)
0.9 1.4
V IF = 0.4 A
Notes see page 11.
Semiconductor Group
9
1998-06-03
TLE 4208
Electrical Characteristics (cont’d)
8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C;
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Input Interface
Logic Inputs IN1; IN2; IN3; IN4
H-input voltage
L-input voltage
VIH
VIL
–
2.0 3.0
V
V
V
–
–
–
1.0
–
1.5
0.5
–
–
Hysteresis of input voltage VIHY
–
H-input current
L-input current
IIH
IIL
– 2
10
µA VI = 5 V
µA VI = 0 V
– 100 – 20 – 5
Logic Inputs INH12; INH34
H-input voltage
L-input voltage
VIH
VIL
–
2.7 3.5
V
V
V
–
–
–
V
V
1.0
–
2.0
0.7
–
–
Hysteresis of input voltage VIHY
H-input current
L-input current
IIH
IIL
–
100 250 µA
INH = 5 V
INH = 0 V
– 10
–
10
µA
Error-Flags EF12; EF34
L-output voltage level
Leakage current
VEFL
IEFLK
–
–
0.2 0.4
10
V
IEF = 2 mA
–
µA 0 V < VEF < 7 V
Semiconductor Group
10
1998-06-03
TLE 4208
Electrical Characteristics (cont’d)
8 V < VS12 = VS34 < 18 V; INH12 = INH34 = HIGH; IOUT1-4 = 0 A; – 40 °C < Tj < 150 °C;
unless otherwise specified
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Thermal Shutdown
Thermal shutdown junction TjSD
temperature
150
120
–
175 200 °C
–
Thermal switch-on junction TjSO
temperature
–
170 °C
–
–
Temperature hysteresis
∆T
30
–
K
1)
Guaranteed by design.
Note: The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and
the given supply voltage.
Semiconductor Group
11
1998-06-03
TLE 4208
V
= 12 V
Watchdog In
Watchdog Out
Reset Out
Q
Input
S
8
13
2
D1
Watchdog
Adjust
1
1N4001
TLE 4278 G
14
9
6
3,4,5,10,11,12
GND
7
D
C
Reset
Adjust
R
QA
R
R
WA
10 k
Ω
C
C
C
QB
Q
Ι
D
S
10 k
Ω
100 k
Ω
22 µF
100 nF
100 nF 22 µF
WDO WDI
R
V
CC
TLE 4208 G
V
28
S12
INH12
4
Inhibit 1,2
DRV1
EF12
25
27 OUT1
Fault-Detection 1,2
M1
DRV2
INH12 IN1 IN2 OUT1 OUT2
IN1 24
1
0
1
1
1
1
X
0
0
1
1
X
0
1
0
1
Z
L
L
H
H
Z
L
H
L
OUT2
GND
IN2 5
6,7,8,9,
H
µ
C
INH34
18
11
20,21,
22,23
Inhibit 3,4
DRV3
DRV4
EF34
13 OUT3
Fault-Detection 3,4
M2
INH34 IN3 IN4 OUT3 OUT4
IN3 10
IN4 19
15
14
0
1
1
1
1
X
0
0
1
1
X
0
1
0
1
Z
L
L
H
H
Z
L
H
L
OUT4
V
S34
AES02351
H
Figure 3
Application Circuit 1 (Device is used as Dual-Full-Bridge-Driver)
Semiconductor Group
12
1998-06-03
TLE 4208
Diagrams
Quiescent current IS
Saturation Voltage of Source VSAT U
over Temperature
over Temperature
AED02308
AED02352
1500
50
VSAT U
VS = 14 V
µA
1250
Ι OUT = 800 mA
Ι
S
40
30
20
10
0
mV
1000
Ι OUT = 400 mA
Ι OUT = 200 mA
V = 18 V
S
750
500
250
0
V = 13.2 V
S
V = 8 V
S
-50
0
50
100 ˚C 150
-50
0
50
100
150
C
Tj
T
j
Saturation Voltage of Sink VSAT L
Total Drop at outputs VSAT
over Temperature
over Temperature
AED02310
AED02309
2000
1000
VSAT L
VSAT
VS = 14 V
VS = 14 V
mV
mV
Ι OUT = 800 mA
1500
750
Ι OUT = 400 mA
Ι OUT = 200 mA
Ι OUT = 800 mA
1000
500
Ι OUT = 400 mA
500
250
Ι OUT = 200 mA
0
0
-50
0
50
100 ˚C 150
-50
0
50
100 ˚C 150
Tj
Tj
Semiconductor Group
13
1998-06-03
TLE 4208
Package Outlines
P-DSO-28-6
(Plastic Dual Small Outline Package)
0.35 x 45˚
1)
7.6 -0.2
+0.09
0.23
8˚ max
0.4 +0.8
10.3 ±0.3
1.27
0.35 +0.152)
0.1
0.2 28x
28
15
14
1
1)
18.1-0.4
Index Marking
1) Does not include plastic or metal protrusions of 0.15 max rer side
2) Does not include dambar protrusion of 0.05 max per side
GPS05123
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm
1998-06-03
SMD = Surface Mounted Device
Semiconductor Group
14
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