SFH6319T [INFINEON]

LOW CURRENT, HIGH GAIN OPTOCOUPLER; 低电流,高增益光耦合器
SFH6319T
型号: SFH6319T
厂家: Infineon    Infineon
描述:

LOW CURRENT, HIGH GAIN OPTOCOUPLER
低电流,高增益光耦合器

光电 输出元件
文件: 总3页 (文件大小:36K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SFH6318T  
SFH6319T  
LOW CURRENT, HIGH GAIN  
OPTOCOUPLER  
Package Dimensions in Inches (mm)  
.120±.002  
(3.05±.05)  
NC  
8
7
1
2
VCC  
VB  
Anode  
FEATURES  
.154±.002  
(.391±.05)  
C
.240  
(6.10)  
L
Industry Standard SOIC-8 Surface Mountable  
Package  
6
5
3
4
Cathode  
NC  
V0  
GND  
.016  
(.41)  
High Current Transfer Ratio, 800%  
Low Input Current, 0.5mA  
High Output Current, 60mA  
Pin 1  
7°  
40°  
.058±.005  
(1.49±.13)  
.015±.002  
(.38±.05)  
.192±.005  
(4.88±.13)  
Isolation Test Voltage, 2500 VAC  
RMS  
.004 (.10)  
.008 (.20)  
TTL Compatible Output, V =0.1 V  
OL  
Adjustable Bandwidth-Access to Base  
Underwriters Lab File #E52744  
.125±.005  
(3.18±.13)  
.008 (.20)  
5° max.  
R.010  
Lead  
.021  
(.53)  
.050  
(1.27)  
typ.  
.020±.004  
(.15±.10)  
2 plcs.  
(.25)  
max.  
Coplanarity  
±.0015 (.04  
max.  
Available in Tape and Reel (suffix T)  
APPLICATIONS  
Logic Ground Isolation-TTL/TTL, TTL/CMOS,  
CMOS/CMOS, CMOS/TTL  
TOLERANCE: ±.005 (unless otherwise noted)  
Maximum Ratings (25°)  
Emitter  
EIA RS 232C Line Receiver  
Low Input Current Line Receiver-Long Lines,  
Party Lines  
Telephone Ring Detector  
117 VAC Line Voltage Status Indication-Low  
Input Power Dissipation  
Reverse Input Voltage.............................................................. 3 V  
Supply and Output Voltage, V (pin 8-5), V (pin 6-5)  
SFH6318T..................................................................–0.5 to 7 V  
SFH6319T................................................................–0.5 to 18 V  
Input Power Dissipation ..................................................... 35mW  
Derate Linearly above 50°C  
Free Air Temperature................................................ 0.7 mW/°C  
Average Input Current......................................................... 20 mA  
Peak Input Current .............................................................. 40 mA  
(50% Duty Cycle-1 ms pulse width)  
CC  
O
Low Power Systems-Ground Isolation  
DESCRIPTION  
Very high current ratio together with 2500 VAC isolation  
are achieved by coupling an LED with an integrated high  
gain photodetector in a SOIC-8 package. Separate pins  
for the photodiode and output stage enable TTL compat-  
ible saturation voltages with high speed operation. Pho-  
todarlington operation is achieved by tying the VCC and  
VO terminals together. Access to the base terminal  
allows adjustment to the gain bandwidth.  
Peak Transient Input Current  
(tp1 µsec, 300 pps) ......................................................... 1.0 A  
Detector (Si Photodiode + Photodarlington)  
Output Current I (pin 6)..................................................... 60 mA  
O
Emitter-Base Reverse Voltage (pin 5-7)................................ 0.5 V  
Output Power Dissipation................................................. 150 mW  
Derate Linearly from 25°C ........................................... 2 mW/°C  
Package  
Storage Temperature ......................................... –55°C to +125°C  
Operating Temperature........................................ –40°C to +85°C  
Lead Soldering Temperature (t=10 sec.).............................260°C  
Junction Temperature ..........................................................100°C  
Ambient Temperature Range............................. –55°C to +100°C  
IsolationTest Voltage between  
The SFH6318T is ideal for TTL applications since the  
300% minimum current transfer ratio with an LED current  
of 1.6 mA enables operation with one unit load-in and  
one unit load-out with a 2.2 Kpull-up resistor.  
The SFH6319T is best suited for low power logic applica-  
tions involving CMOS and low power TTL. A 400% cur-  
rent transfer ratio with only 0.5 mA of LED current is  
guaranteed from 0°C to 70°C.  
Emitter and Detector............................................ 2500 VAC  
(refer to climate DIN 40046, part 2, Nov. 74)  
Pollution Degree (DIN VDE 0110) ................................................2  
Creepage Distance.............................................................4 mm  
Clearance............................................................................4 mm  
Comparative Tracking Index  
RMS  
Caution:  
Due to the small geometries of this device, it should be  
handled with Electrostatic Discharge (ESD) precautions.  
Proper grounding would prevent damage further and/or  
degradation which may be induced by ESD.  
per DIN IEC 112/VDE 0303, part 1.......................................175  
Isolation Resistance  
12  
V
V
=500 V, T =25°C R .............................................10  
ISOL  
IO  
IO  
A
11  
=500 V, T =100°C R  
...........................................10  
A
ISOL  
10.95  
Semiconductor Goup  
4–48  
This document was created with FrameMaker 4.0.3  
Electro-Optical Characteristics (T =0°C to 70°C, T =25°C-Typical, unless otherwise specified)  
A
A
Parameter  
Symbol Device  
Min  
Typ  
Max  
Units Test Conditions  
Note  
Current Transfer Ratio  
CTR  
SFH6318T 300  
1600 2600  
%
%
I =1.6 mA, V =0.4 V, V =4.5 V  
1,2  
1,2  
F
O
CC  
SFH6319T 400  
500  
1600 2600  
2000 3500  
I =0.5 mA, V =0.4 V, V =4.5 V  
F O CC  
I =1.6 mA, V =0.4 V, V =4.5 V  
F
O
CC  
Logic Low  
Output Voltage  
V
SFH6318T  
SFH6319T  
0.1  
0.4  
V
V
I =1.6 mA, I =4.8 mA, V =4.5 V  
2
2
OL  
F
O
CC  
0.1  
0.15  
0.25  
0.4  
0.4  
0.4  
I =1.6 mA, I =8 mA, V =4.5 V  
F O CC  
I =5 mA, I =15 mA, V =4.5 V  
F O CC  
I =12 mA, I =24 mA, V =4.5 V  
F
O
CC  
Logic High  
Output Current  
I
I
SFH6318T  
SFH6319T  
0.1  
250  
100  
1.5  
10  
µA  
µA  
mA  
µA  
V
I =0 mA, V =V =7 V  
2
2
2
2
OH  
F
O
CC  
0.05  
0.2  
I =0 mA, V =V =18 V  
F O CC  
Logic Low Supply Current  
Logic High Supply Current  
Input Forward Voltage  
I =1.6 mA, V =OPEN, V =18 V  
F O CC  
CCL  
I
0.01  
1.4  
I =0 mA, V =OPEN, V =18 V  
F O CC  
CCH  
V
1.7  
I =1.6 mA, T =25°C  
F A  
F
Temperature Coefficient,  
Forward Voltage  
V /T  
–1.8  
mV/  
°C  
I =1.6 mA  
F
F
A
Input Capacitance  
C
25  
pF  
f=1 MHz, V =0  
F
IN  
12  
Resistance (Input-Output)  
R
10  
V
V
=500 VDC, T =25°C  
3
3
I-O  
IO  
IO  
A
11  
10  
=500 VDC, T =100°C  
A
Capacitance (Input-Output)  
C
0.6  
pF  
f=1 MHz  
I-O  
Switching Specifications (T =25°C)  
A
Parameter  
Symbol  
Device  
Min  
Typ  
Max  
Units  
Test Conditions  
I =1.6 mA, R =2.2 KΩ  
Note  
Propagation Delay Time  
To Logic Low at Output  
t
SFH6318T  
SFH6319T  
2
10  
µs  
µs  
PHL  
F
L
6
0.6  
25  
1
I =0.5 mA, R =4.7 KΩ  
2,4  
F
L
I =12 mA, R =270 Ω  
F L  
Propagation Delay Time  
To Logic High at Output  
t
SFH6318T  
SFH6319T  
2
35  
µs  
µs  
I =1.6 mA, R =2.2 KΩ  
F L  
PLH  
4
1.5  
60  
7
I =0.5 mA, R =4.7 KΩ  
2,4  
5,6  
F
L
I =12 mA, R =270 Ω  
F L  
Common Mode Transient Im- | CM  
munity at Logic High Level  
Output  
|
1 K  
V/µs  
V/µs  
I =0 mA, R =2.2 KΩ  
H
F
L
V
=10 V  
CM  
p-p  
Common Mode Transient Im- | CM |  
L
1 K  
I =1.6 mA, R =2.2 KΩ  
5,6  
F
L
munity at Logic Low Level Out-  
put  
V
=10 V  
CM p-p  
Notes  
1. DC current transfer ratio is defined as the ratio of outpput collector current, I , to the forward LED input current, I times 100%.  
O
F
2. Pin 7 open.  
3. Device considered a two-terminal device: pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7 and 8 shorted together.  
4. Using a resistor between pin 5 and 7 will decrease gain and delay time.  
5. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV /dt on the leading edge of the commo-  
cm  
mode pulse, V , to assure that the output will remain in a logic high state (i.e. V >2.0 V) common mode transient immunity in logic  
CM  
O
low level is the maximum tolerable (negative) dV /dt on the trailing edge of the common mode puse signal, V , to assure that the  
cm  
CM  
output will remain in a logic low state (i.e. V <0.8 V).  
O
6. In applications where dv/dt may exceed 50,000 V/µs (such as state discharge) a series resistor, R should be included to protect IC  
CC  
from destructively high surge currents. The recommended value is RCC  
IV  
k. Refer to Figure 2.  
0.15 IF(mA)  
SFH6318T/6319T  
Semiconductor Group  
4–49  
Figure 1. Switching test circuit  
IF  
0
10% Duty Cycle  
1/f<100 µs  
+5 V  
8
7
1
2
5 V  
VO  
(Saturated  
Response)  
Pulse  
IF  
Generator  
ZO=50  
t =5 ns  
r
RL  
1.5 V  
1.5 V  
VOL  
6
5
3
4
VO  
0.1 µF  
tPLH  
tPHL  
VO  
(Non-Saturated  
Response)  
IF=Monitor  
CL=15pF  
5 V  
90%  
90%  
10%  
Rm  
10%  
t
t
f
r
Figure 2. Test circuit for transient immunity and typical waveforms  
R
CC (see Note 6)  
+5 V  
8
7
1
VCM  
0 V  
90%  
90%  
220  
0.1 µF  
IF  
10%  
10%  
2
3
4
RL  
t
t
f
r
t +t =16 ns  
f
f
6
5
VO  
A
B
VO  
5 V  
Switch at A: I =0 mA  
F
VFF  
VCM  
VO  
+
VOL  
Switch at B: I =1.6 mA  
F
Pulse Generator  
SFH6318T/6319T  
Semiconductor Group  
4–50  

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