TLF51801ELV [INFINEON]

TLF51801ELV 是 PWM 步降直流/直流转换器，具有外部功率开关，采用小型 PG-SSOP-14 散热焊盘封装。调节器能够驱动外部功率级 (n/n-MOS) 负载高达 10 A。电流限制功能使用 HS 开关晶体管或者使用外部分流器电阻实现。输出电压可调节容差值为 2%.该器件可在占空比大于 99% 的条件下运行。集成自举二极管，无需外部元件。开关频率可设置为 100 kHz - 700 kHz 之间，并可与外部时钟同步。启动期间，集成软启动限制浪涌电流峰值，防止电压过冲。关断模式下的启用功能电流消耗低于 2 μA，便于对电池供电系统进行功率管理。TLF51801ELV 具有保护功能，比如逐周期电流限制、过温关断和欠电压锁定。该器件可在 -40 °C < Tj < 150 °C 温度范围内使用，适用于汽车应用在恶劣环境下使用。;


型号：	TLF51801ELV
厂家：	Infineon
描述：	TLF51801ELV 是 PWM 步降直流/直流转换器，具有外部功率开关，采用小型 PG-SSOP-14 散热焊盘封装。调节器能够驱动外部功率级 (n/n-MOS) 负载高达 10 A。电流限制功能使用 HS 开关晶体管或者使用外部分流器电阻实现。输出电压可调节容差值为 2%.该器件可在占空比大于 99% 的条件下运行。集成自举二极管，无需外部元件。开关频率可设置为 100 kHz - 700 kHz 之间，并可与外部时钟同步。启动期间，集成软启动限制浪涌电流峰值，防止电压过冲。关断模式下的启用功能电流消耗低于 2 μA，便于对电池供电系统进行功率管理。TLF51801ELV 具有保护功能，比如逐周期电流限制、过温关断和欠电压锁定。该器件可在 -40 °C < Tj < 150 °C 温度范围内使用，适用于汽车应用在恶劣环境下使用。时钟电池开关驱动软启动晶体管二极管转换器调节器
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中文：	中文翻译
下载：	下载PDF数据表文档文件

TLF51801ELV

10 A synchronous DC/DC Step-Down Controller

Data sheet

Rev. 1.0.1, 2013-04-15

Automotive Power

10 A synchronous DC/DC Step-Down Controller

TLF51801ELV

Overview

•

10 A synchronous step down Controller

Current limitation adjustable with Shunt resistor or Rdson

Adjustable output voltage

± 2% output voltage tolerance

External power transistors

Integrated bootstrap diode

PWM regulation

Very Low Dropout Operation: max Duty Cycle higher than 99%

Input voltage range from 4.75V to 45V

Adjustable switching frequency from 100 to 700 kHz

Synchronization input

Very low shutdown current consumption (<2µA)

Soft-start function

PG-SSOP-14

Input undervoltage lockout

Suited for automotive applications: T_j= -40°C to +150°C

Green Product (RoHS compliant)

AEC Qualified

Description

The TLF51801ELV is a PWM step-down DC/DC controller with external power switches, packaged in a small PG-

SSOP-14 with exposed pad. The controller is capable to drive external power MOSFETs for load currents up to

10 A. A current limitation feature is included, it is done by measuring the voltage over the high-side switch (when

switch is closed) in Rdson-configuration or by including a shunt resistor above the high-side switch in Shunt-

configuration.

Type

Package

Marking

TLF51801ELV

PG-SSOP-14

TLF51801

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Block Diagram

sensehigh

senselow

IVCC

LDO

V_ls

Enable

BTS

Softstart

Temp .SD

GND

Osc

SYNC/

FREQ

Sync

BUO

Step Down

Regulator

V_ls

COMP

PGND

TLF51801ELV

Figure 1

Block Diagram

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Pin Configuration

3.1

Pin Assignment

sensehigh

senselow

IVCC

12 BTS

GND

BUO

SYNC/FREQ

COM P

PGND

TLF51801ELV

Figure 2

Pin Configuration

3.2

Pin Definitions and Functions

Pin Symbol Function

IVCC

Internal Voltage Supply

Output of the internal linear regulator, supply for low-side driver and through internal bootstrap

diode to high-side driver, connect a capacitor between this pin and GND

Input Voltage

Connect to input voltage for internal power supply

Enable Input

Active-high enable input with integrated pull down resistor

GND

Ground

Connect to ground plane

SYNC/ Synchronization and Oscillator frequency set Input

FREQ

Connect to an external clock signal in order to synchronize/adjust the switching frequency

(SYNC-mode). Connect an external resistor to set the frequency (FREQ-mode)

COMP

Compensation Input

Frequency compensation for regulation loop stability

Connect to compensation network

Feedback Input

Connect via voltage divider to output capacitor

PGND

Power Ground

Connect to Ground plane

Low-side MOSFET driver output

Driving output for the low-side external power MOSFET, connect to gate

BUO

Buck Switch Out

Connect this point between the switching transistors, floating ground for high-side driver

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Pin Configuration

Pin Symbol Function

Up-side MOSFET driver output

Driving output for the high-side external power MOSFET, connect to gate

BTS

Buck Driver Supply Input

Connect the bootstrap capacitor between this pin and pin BUO

sense

low

Current sensing (low-side) input

For Shunt-configuration connect a shunt resistor from senselow to input/battery voltage, for

Rdson-configuration connect to source of the high-side MOSFET

sense

high

Current sensing (high-side) input

Connect a resistor between battery and this pin to adjust the current threshold for both Rdson

and Shunt configurations

Exposed Pad Connect to heatsink area and GND by low inductance wiring

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

General Product Characteristics

4.1

Absolute Maximum Ratings

Absolute Maximum Ratings¹⁾

T_j= -40°C to +150°C; all voltages with respect to ground (unless otherwise specified)

Pos.

Parameter

Symbol

Limit Values

Max.

Unit Conditions

Min.

-0.3

Voltages

4.1.1

Synchronization Input

Compensation Input

V_SYNC

V_COMP

5.5

6.2

5.5

6.2

5.5

–

4.1.2

t < 10s²⁾

4.1.3

–

4.1.4

t < 10s²⁾

4.1.5

Feedback Input

V_FB

4.1.6

Buck Driver Supply Input

V_BTS

V_BUO

- 0.3

+ 5.0

4.1.7

Buck Switch Output

Enable Input

V_BUO

V_EN

V_S

-2.0

-20

4.1.8

4.1.9

Supply Voltage Input

Sensehigh

-0.3

4.1.10

4.1.11

V_sensehigh-0.3

Senselow

V_senselow

-2.0

V_sensehigh

+ 0.3

4.1.12

4.1.13

IVCC

V_IVCC

V_UG

-0.3

6.0

Upper Transistor Gate

V_BUO

V_BTS

- 0.3

+ 0.3

4.1.14

Lower Transistor Gate

V_LG

-0.3

6.5

Temperatures

4.1.15

4.1.16

Junction Temperature

Storage Temperature

T_j

-40

-55

150

°C

–

T_stg

ESD Susceptibility

4.1.17

4.1.18

4.1.19

ESD Resistivity

V_ESD

-2

HBM ²⁾

CDM ³⁾

ESD Resistivity to GND

-500

-750

500

750

ESD Resistivity corner pins to GND

1) Not subject to production test, specified by design

2) ESD susceptibility HBM according to ANSI/ESDA/JEDEC JS-001.

3) ESD susceptibility, Charged Device Model “CDM” EIA/JESD22-C101 or ESDA STM5.3.1

Note:Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

Note:Integrated protection functions are designed to prevent IC destruction under fault conditions described in the

data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are

not designed for continuous repetitive operation.

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

General Product Characteristics

4.2

Functional Range

Pos.

Parameter

Symbol

Limit Values

Unit

Conditions

Min.

4.75

–

Max.

4.2.1

4.2.2

4.2.3

4.2.4

Supply Voltage

V_S

–

Max. Duty Cycle

D_max

V_CC

T_j

>99

Output Voltage adjust range

Junction Temperature

1.20

-40

D_maxx V_S

150

°C

Note:Within the functional range the IC operates as described in the circuit description. The electrical

characteristics are specified within the conditions given in the related electrical characteristics table.

4.3

Thermal Resistance

Pos.

Parameter

Symbol

Limit Values

Unit

Conditions

Min.

Typ.

Max.

4.3.1

4.3.2

4.3.3

4.3.4

Junction to Case¹⁾

Junction to Ambient^{1) 2)}

R_thJC

R_thJA

–

K/W

–

2s2p

1s0p + 600 mm²

1s0p + 300 mm²

1) Not subject to production test, specified by design.

2) Specified R_thJAvalue is according to JEDEC 2s2p (JESD 51-7) + (JESD 51-5) and JEDEC 1s0p (JESD 51-3) + heatsink

area at natural convection on FR4 board;

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Regulator

5.1

Description

The TLF51801ELV is a synchronous step down controller for output currents up to 10 Amps. The power stage

consists of two external MOSFETs with logic level gate signal. The switching frequency can be adjusted between

100 and 700 kHz by connecting an external resistor between pin SYNC/FREQ and GND (FREQ-mode). By

connecting this pin to a frequency source the TLF51801ELV might be synchronized to a frequency between 350

and 700 kHz (SYNC-mode).

A valid high signal at pin EN will start the regulator. Then it will ramp up with a soft start ramp, which is derived

from the switching frequency (i.e.: the soft start ramp will last around 1 msec at a switching frequency of 500 kHz).

The regulator is working in voltage mode, there is no feedforward function included and it operates in continuous

conduction mode only.

An external compensation network connected to pin COMP is necessary to compensate the switching ripple on

the feedback line. The compensation network must be adapted to the application.

The regulator can withstand a short circuit at the output. The current limitation can be implemented measuring the

drop across the Rdson of the external high-side MOSFET (Rdson-configuration), or by shunt resistor located in

series with the drain of high-side MOSFET (Shunt-configuration).

The output voltage is monitored using pin FB. If the output voltage exceeds the overvoltage threshold (10% higher

than the regulated output voltage), the low-side external MOSFET is turned on in order to discharge the output

capacitor and lower the output voltage to the nominal value.

SENSELOW

BTS

SENSEHIGH

BLANK

CLOCK

DRIVER

COMP

Force

Min Duty

CROSS CONDUCTION

SAFETY LOGIC

BUO

PWM

Skipping

Mode

COMP

PHS

DETECT

VREF

1.2V

V_LS

POR

IVCC

DRIVER

SAWTOOTH GEN

PGND

SOFTSTART LOGIC

TSD

THERMALSHUTDOWN

OVERVOLTAGESHUTDOWN

Figure 3

Block Diagram Buck Regulator

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Regulator

5.2

The Soft start

x0.6

Vfb

Force

min

Toff

To_LG

SoSt_25%End

Vref1V2

Vbg

SoSt_100%End

Logic

Stair

start

POR IVCC

TSD

Figure 4

Soft start block diagram

An integrated Soft start function (of duration 512 clock cycles, where a clock cycle is derived from the switching

frequency) ensures that the inrush current will be limited and prevents from output voltage overshoots.

When the regulator starts from OFF state (EN pin forced from low to high), an additional pre-charging function is

triggered before Soft start: for a time slot of 64 clock cycles, low-side MOSFET is switched ON and OFF at fixed

frequency of 1.5 MHz and 50% duty cycle, in order to charge in advance the bootstrap capacitor.

If an under voltage appears during Soft start, it is recognized only after 25% of the Soft start stair, this is realized

by the signal SoSt_25%End. In case 1) the UV is permanent fault (i.e. the BTS cap is not charged or shorted, or

the output cap is shorted). In case 2) the UV failure is removed before the 25% of the Soft start procedure is

reached (i.e. the output cap is too large and the system is not able to charge it fast enough). In case 1), a

permanent UV, the soft start begins again the procedure after a delay of 512 clock cycles.

In case of pre-charged output condition, the system recognizes it and keeps the external switches in high

impedance in order not to discharge the output capacitance.

start

1.2V

Delay

Vref1V2

SoSt_25%End

Figure 1)

start

1.2V

Delay

Vref1V2

SoSt_25%End

i.e output

short

Figure 2)

Figure 5

Soft start timing

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Regulator

5.3

Operation Mode

The PWM pulses are voltage controlled. The error amplifier and the PWM comparator are creating the PWM

pulses using the oscillator saw-tooth signal and the feedback voltage. The pulse-width modulation is done so that

the feedback voltage is similar to the reference voltage (1.2 V). To achieve a stable output voltage even under very

low or very high duty cycle conditions a pulse skipping mode is implemented. When the minimum off time for the

up-side gate is reached (boundary between dark grey area and light grey area in Figure 6), the TLF51801ELV

operates in pulse skipping mode for high duty cycle. This operation mode is typically used with low supply voltages

for very low dropout operation. If the minimum on time for the up-side gate is reached (boundary between dark

grey area and light grey area in Figure 6) the TLF51801ELV operates in pulse skipping mode for low duty cycle.

Figure 6

Operation Mode

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Regulator

5.4

Bootstrap concept

The high-side MOSFET driver is supplied by the bootstrap concept. The capacitor at pin BTS and BUO must be

switched to GND to be charged by the internal LDO. A monitoring circuit controls the charge of the bootstrap

capacitor. If the charge is sufficient the driver will trigger the external high-side MOSFET. If a recharge is

necessary, the capacitor will be loaded using the integrated bootstrap diode by switching pin BUO to ground

forcing a proper PWM signal.

For very high duty-cycle and high input capacitance of the MOSFET, it may be necessary to consider use of an

external diode placed in parallel with the internal bootstrap diode to speed up the recharge of the bootstrap

capacitor. In addition, the small voltage drop across the external diode improves the overdrive of the gate of the

high-side MOSFET.

BTS

CBTS

DRIVER

Linear Regulator

CROSS

CONDUCTION

SAFETY LOGIC

BUO

PWM

PHS

DETECT

V_LS

IVCC

DRIVER

PGND

Parts in grey are optional

Figure 7

Bootstrap concept

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Regulator

5.5

Current Limitation

5.5.1

Rdson-configuration

To optimize the efficiency, the regulator is measuring the voltage (which is the current through the MOSFET

multiplied by the Rdson) over the high-side switch, if it should be too high the pulse will be cut off. By varying the

sense resistor between the pin sensehigh and the drain of the high-side MOSFET the current limit can be adjusted.

Senselow is connected to the source of the MOSFET.

Pow er current

flow

External high side M O S

BUO

R _SEN SE

SENSEHIG H

SEN SELO W

O VERC U RR EN T

CO M PARATO R

(O VC )

O VER CU RR EN T

LO G IC SIG NAL

BLAN K

Figure 8

Rdson-configuration for current limitation

The figure above shows the concept of the Rdson configuration for current limitation. The characteristics of the

external high-side MOSFET must be known, especially its thermal behavior. The current limitation might be

calculated with the following equation:

R _ SENSE

I _limit= I _OC

⋅

_ lim, ref

Rdson _ EXT _ MOS

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Regulator

5.5.2

Shunt-configuration

The regulator is offering a second possibility to do a more accurate current measurement by shunt resistor located

in series with the drain of the high-side MOSFET. The shunt resistor will be placed in the input current path and

be connected to the overcurrent comparator with pin senselow and through a sense resistor to pin sensehigh. By

varying the sense resistor the current limit can be adjusted.

P ow er current

flow

E xternal high side M O S

V S

B U O

R _S H U N T

R _S E N S E

S E N S E H IG H

S E N S E LO W

O V E R C U R R E N T

C O M P A R A T O R

(O V C )

O V E R C U R R E N T

LO G IC S IG N A L

B LA N K

Figure 9

Shunt-configuration for current limitation

The Shunt-configuration works similar to the Rdson-configuration, it uses also pins Sensehigh and Senselow. The

current limitation might be calculated with the following equation:

_ SENSE

⋅

limit

lim,

ref

R _ SHUNT

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Regulator

5.6

Electrical Characteristics

Electrical Characteristics:

V_S= 6.0 V to 40 V, T_j= -40°C to +150°C, all voltages with respect to ground (unless otherwise specified)

Pos.

Parameter

Symbol

Limit Values

Unit Conditions

Min. Typ. Max.

1.176 1.200 1.224

5.6.1

5.6.2

Output voltage

V_FB

_EN= 12V;

_CC< 10A

Output overvoltage threshold

V_FB,OV

1.05 x 1.1 x 1.15 x

_FBincreasing;

_COMP= 3V;

V_FB

Monitor LG low to high

5.6.3

Output overvoltage threshold

hysteresis

V_FB,OV,hyst0.02 x 0.05 x 0.08 x

–

V_FB

-1

V_FB

-0.1

1.2

–

V_FB

5.6.4

5.6.5

5.6.6

FB input current

I_FB

µA

_FB= 1.2V

Error amplifier, gain

gm_EA

0.8

1.0

1.6

–

MΩ

Error amplifier, output resistance R_EA,OUT

_FB= 1.2V;

_COMP= 1.2V

5.6.7

5.6.8

5.6.9

Error amplifier, ramp amplitude,

FREQ-mode

V_Comp,peak1.0

–

1.6

2.6

450

_FB= 1.2V;

FREQ-mode;

_FREQ= 100 -700kHz;

Monitor LG

_FB= 1.2V;

SYNC-mode;

_SYNC= 350 -700kHz;

to peak,FREQ

Error amplifier, ramp amplitude,

SYNC-mode

V_Comp,peak0.6

–

to peak,SYNC

Monitor LG

Error amplifier output, source and I_Comp,max150

280

μA

Source current:

sink current

_FB= 0.8V, V_COMP= 2.5V;

Sink current:

_FB= 2.4V, V_COMP= 2.5V

5.6.10 Comp pin, minimum voltage

V_Comp,min0.8

–

_COMPincreasing;

Monitor UG

5.6.11 Bootstrap under voltage lockout V_BTS,off

V_BUO

+ 3.0

–

V_{BTS_BUO}voltage

decreasing

–

threshold for UG turn-off

5.6.12 Bootstrap under voltage lockout, V_BTS,hyst

–

300

150

µA

hysteresis

5.6.13 Bootstrap capacitor discharge

current

I_{BTS_BUO}

_{BTS_BUO}= 4.5V

5.6.14 Bootstrap diode forward voltage V_DBTS,fwd

–

0.8

–

I_DBTS= 20mA

5.6.15 Minimum on time Upper Gate

5.6.16 Minimum off time Upper Gate

5.6.17 Soft start ramp

T_UGON,min

T_UGOFF,min

t_start

100

µs

512 x

1/f

f = f_FREQ, FREQ-mode;

f = f_SYNC, SYNC-mode

5.6.18 Input under voltage shutdown

threshold

V_S,off

3.7

–

V_Sdecreasing

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Regulator

Electrical Characteristics:

V_S= 6.0 V to 40 V, T_j= -40°C to +150°C, all voltages with respect to ground (unless otherwise specified)

Pos.

Parameter

Symbol

Limit Values

Unit Conditions

Min. Typ. Max.

5.6.19 Input voltage startup threshold

V_S,on

–

4.75

–

V_Sincreasing

5.6.20 Input under voltage shutdown

hysteresis

V_S,hyst

300

–

Gate Driver for upper Switch

5.6.21 Upper Gate Driver Peak Sourcing I_UG,SRC

–

-380

550

–

_UG= 3.5V;

_UG= 1.5V;

Current

5.6.22 Upper Gate Driver Peak Sinking I_UG,SNK

–

Current

5.6.23 Upper Gate Driver Output Rise

Time

t_R,UG

t_F,UG

5.2

_L,UG= 3.3nF;

_UG= 1V to 4V

_L,UG= 3.3nF;

_UG= 1V to 4V

_L,UG= 3.3nF

5.6.24 Upper Gate Driver Output Fall

Time

5.6.25 Upper Gate Driver Output Voltage V_UG

4.4

Gate Driver for lower Switch

5.6.26 Lower Gate Driver Peak Sourcing I_LG,SRC

–

-380

550

–

_LG= 3.5V;

_LG= 1.5V;

Current

5.6.27 Lower Gate Driver Peak Sinking I_LG,SNK

–

Current

5.6.28 Lower Gate Driver Output Rise

Time

t_R,LG

t_F,LG

–

5.75

101

_L,LG= 3.3nF;

_LG= 1V to 4V

_L,LG= 3.3nF;

_LG= 1V to 4V

_L,LG= 3.3nF;

V_S≥ 7V

_COMP= 3V

5.6.29 Lower Gate Driver Output Fall

Time

–

5.6.30 Lower Gate Driver Output Voltage V_LG

5.05

5.40

5.6.31 Overcurrent limitation

I_{OC_lim,ref}89

μA

sensehigh-senselow

decreasing;

monitor max current on

sensehigh

5.6.32 Overcurrent comparator offset

voltage

V_OCComp,-15

–

+15

_FB= 1V;

_COMP= 4V;

Offset

sensehigh-senselow

increasing

1) Not subject to production test, specified by design.

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Module Oscillator

6.1

Description

The oscillator supplies the device with a constant frequency. When the device is not operating in pulse skipping

mode, the external MOSFETs are switched on and off with the same constant frequency. Some safety functions

are synchronized also to this frequency.

The internal oscillator is used to determine the switching frequency of the buck regulator. The switching frequency

can be selected from 100 kHz to 700 kHz with an external resistor connected at pin SYNC/FREQ to GND. To set

the switching frequency with an external resistor the following formula can be applied

R _FREQ

−

(

2.0 ×10 ³

[Ω

])

[Ω ]

149 ×10 ⁻¹²[_Ω]

)

× f _FREQ[_s]

(

)

(

100

200

300

400

500

600

700

Switching Frequency f_FREQ(kHz)

Figure 10 Resistor R_FREQversus Switching Frequency f_FREQ

The turn-on frequency can optionally be set externally via the pin SYNC/FREQ. In this case the synchronization

of the PWM-on signal refers to the falling edge of the pin SYNC/FREQ input signal.

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Module Oscillator

6.2

Electrical Characteristics Module Oscillator

Electrical Characteristics: Module Oscillator

V_S= 6.0 V to 40 V, T_j= -40°C to +150°C, all voltages with respect to ground (unless otherwise specified)

Pos.

Parameter

Symbol

Limit Values

Unit

Conditions

Min.

Typ.

Max.

Oscillator:

6.2.1

6.2.2

Oscillator Frequency

f_FREQ

250

100

300

–

350

700

kHz

R_FREQ= 20kΩ

Oscillator Frequency

Adjustment Range

17% internal

tolerance+external

resistor tolerance

6.2.3

FREQ Supply Current

I_FREQ

–

800

700

µA

_FREQ= 0 V

Synchronization

6.2.4

Synchronization Frequency

Capture Range

Synchronization Signal Duty cycle D_SYNC

f_SYNC

350

kHz

6.2.5

6.2.6

–

Synchronization Signal

High Logic Level Valid

V_SYNC,H3.0

–

6.2.7

Synchronization Signal

Low Logic Level Valid

V_SYNC,L

–

0.8

1) Synchronization frequency out of the specified range leads to complete malfunction of the device

2) Synchronization of external UG ON signal to falling edge

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Linear Regulator

7.1

Description

The internal linear voltage regulator supplies the low-side gate driver directly (typical voltage 5.4 V) and through

a diode the high-side gate driver. The current capability is up to 50 mA. An external output capacitor with low ESR

is required on pin IVCC for stability and buffering transient load currents. During normal operation the gate drivers

will draw transient currents from the linear regulator and its output capacitor. Proper sizing of the output capacitor

must be considered to supply sufficient peak current to the gate of the external MOSFETs. An integrated power-

on reset circuit monitors the linear regulator output voltage and resets the device in case the output voltage falls

below the power-on reset threshold. The power-on reset helps protect the external MOSFETs from excessive

power dissipation by ensuring the gate drive voltage is sufficient to enhance the gate of an external logic level n-

channel MOSFET. For IVCC voltage lower than 5V the proper charging of the bootstrap capacitor is not

guaranteed.

The internal linear voltage regulator is implemented to supply the gate drivers, therefore a large voltage ripple may

be present on this output due to the pulsed current sinked by internal drivers and bootstrap diode. This output

should not be used to supply loads than the internal ones.

IVCC

Linear Regulator

HS Gate

Driver

LS Gate

Driver

Figure 11 Linear Regulator Block Diagram and Simplified Application Circuit

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Linear Regulator

7.2

Electrical Characteristics

Electrical Characteristics: Linear Regulator

V_S= 6V to 40V; T_j= -40°C to +150°C, all voltages with respect to ground, positive current flowing into pin; (unless

otherwise specified)

Pos.

Parameter

Symbol

Limit Values

Unit Conditions

Min.

Typ.

Max.

7.2.1

7.2.2

Output Voltage

V_IVCC

I_LIM

5.05

5.4

5.75

7 V ≤ V_S≤ 40 V;

0.1 mA ≤ I_IVCC≤ 50 mA

Output Current Limitation

110

V_S= 13.5 V;

_IVCC= 5.1V

7.2.3

7.2.4

7.2.5

7.2.6

Drop out Voltage

V_DR

800

µF

_IVCC= 50mA ¹⁾

Output Capacitor

C_IVCC

0.47

Output Capacitor ESR

R_IVCC,ESR

0.5

–

f = 10kHz

Undervoltage Reset Headroom V_IVCC,HDRM100

–

_IVCCdecreasing;

_IVCC- V_IVCC,RTH,d

7.2.7

7.2.8

Undervoltage Reset Threshold V_IVCC,RTH,d4.0

–

_IVCCdecreasing

_IVCCincreasing

Undervoltage Reset Threshold V_IVCC,RTH,i

–

4.5

1) Measured when the output voltage V_IVCChas dropped 100 mV from its nominal value.

2) Minimum value given is needed for regulator stability; application might need higher capacitance than the minimum.

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Module Enable and Thermal Shutdown

8.1

Description

With the enable pin the device can be set in off-state reducing the current consumption to less than 2µA.

The enable function features an integrated pull down resistor which ensures that the IC is shut down and the

external MOSFETs are off in case the pin EN is left open.

The integrated thermal shutdown function turns the external MOSFETs off in case of overtemperature. The typical

junction shutdown temperature is 175°C, with a minimum of 160°C. After cooling down, the IC will automatically

restart with soft start. The thermal shutdown is an integrated protection function designed to prevent IC destruction

when operating under fault conditions.

8.2

Electrical Characteristics Module Enable, Bias and Thermal Shutdown

Electrical Characteristics: Enable, Bias and Thermal Shutdown

V_S= 6.0 V to 40 V, T_j= -40°C to +150°C, all voltages with respect to ground (unless otherwise specified)

Pos.

Parameter

Symbol

Limit Values

Unit

Conditions

Min.

Typ.

Max.

8.2.1

8.2.2

Current Consumption,

shut down mode

I_q,OFF

I_q,ON

–

0.1

µA

_EN= 0.8V;

T_j< 105°C; V_s= 16V

_EN= 5.0V;

_IVCC= 0mA;

Current Consumption,

active mode

–

V_S= 16V

8.2.3

8.2.4

8.2.5

8.2.6

8.2.7

8.2.8

8.2.9

Enable high signal valid

Enable low signal valid

Enable hysteresis

V_EN,lo

V_EN,hi

V_EN,HY

I_EN,hi

3.0

–

0.8

400

200

–

300

–

µA

°C

Enable high input current

Enable low input current

_EN= 16V

I_EN,lo

–

0.1

175

_EN= 0.5V

Over temperature shutdown T_j,sd

160

–

190

–

Overtemperatureshutdown T_{j,sd_hyst}

hysteresis

1) Not subject to production test, specified by design.

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Application Information

Note:The following information is given as a hint for the implementation of the device only and shall not be

regarded as a description or warranty of a certain functionality, condition or quality of the device.

9.1

Application Diagram

CIVCC

DBOOT

V_S

Rsense

IVCC

sensehigh

senselow

CIN1

CIN2

CIN

LDO

V_ls

Enable

BTS

CBTS

Softstart

Temp .SD

GND

HIGH

SYNC/ FREQ

COMP

Osc

Sync

BUO

V_CC

GND

Step Down

Regulator

V_ls

LOW

COUT1

COUT2

PGND

TLF51801ELV

GND

RFREQ

CCF

Parts in grey are optional

Parts suggested for suppresion of EME

Figure 12 Application Diagram (Current limitation with Rdson-configuration)

Note:This is a very simplified example of an application circuit. The function must be verified in the real application

CIVCC

DBOOT

V_S

Rsense

IVCC

sensehigh

senselow

CIN1

CIN2

CIN

R shunt

LDO

V_ls

Enable

BTS

CBTS

Softstart

Temp .SD

GND

HIGH

LOW

SYNC/ FREQ

COMP

Osc

Sync

BUO

V_CC

GND

Step Down

Regulator

V_ls

COUT1

COUT2

PGND

TLF51801ELV

GND

RFREQ

CCF

Parts in grey are optional

Parts suggested for suppresion of EME

Figure 13 Application Diagram (Current limitation with Shunt-configuration)

Note:This is a very simplified example of an application circuit. The function must be verified in the real application

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Application Information

Ref

L₁

LOW, HIGH

_OUT1, C_OUT2

C_IN2

C_IN1

R_FREQ

R₁

Value

5.6μH

N-ch, 60 V, 12 mΩ

100μF - 10mΩ ESR

22μF

Manufacturer

Coilcraft

Infineon

Rubycon

Kemet

Part number

MSS1278T-562ML_

IPD50N06S4L-12

6SW100M

Type

Inductor

Transistor

Qty

Capacitor, Poly Al, 6.3V

Capacitor, X7R, 50V

C2220C226M5R2CTU

470μF

20kΩ

100kΩ

27.3kΩ

6.65kΩ

1.1kΩ

10mΩ

12pF

Panasonic

Vishay Dale

Kemet

EEEFK1H471AM

ERJ3EKF2002V

Capacitor, Al, 50V

Resistor, ±1%, 0.1W

Resistor, ±1%, 3W

Capacitor, C0G

ERJ3EKF1003V

R₂

ERJ3EKF2742V

R_F

ERJ3EKF6651V

R_sense

R_shunt

C_CF

ERJ3EKF1101V

WSL3637R0100FEB

C0603C120J5GACTU

C0603C121J5GACTU

C0603C153K5RACTU

C1206C105K4RACTU

C1206C105K5RACTU

C1206C273K5RACTU

C_L

120pF

15nF

Kemet

Capacitor, C0G

C_F

Kemet

Capacitor, X7R, 50V

Capacitor, X7R, 16V

Capacitor, X7R, 50V

C_IVCC

C_IN

1μF

Kemet

1μF

Kemet

C_BTS

270nF

Kemet

Figure 14 Bill of Material for Application Diagram

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Performance Graphs

Typical Performance Characteristics

Efficiency and Power Losses

versus Load Current

Efficiency versus Load Current

100

T = 25°C; f = 300kHz

V_S= 12V; R_DS,on-Config

V_S= 24V

V_S= 12V

V_S= 12V; Shunt-Config

V_S= 24V; R_DS,on-Config

P_LOSS@ V_S= 24V

V_S= 24V; Shunt-Config

P_LOSS@ V_S= 12V

0,1

LOAD CURRENT (A)

Efficiency versus Load Current

_CCversus Temperature

5,70

f = 300kHz; V_S= 12V

I_CC= 5A; V_S= 12V

T = -40°C

5,65

5,60

5,55

5,50

T = 25°C

T = 150°C

-50

-30

-10

110

130

150

TEMPERATURE (°C)

LOAD CURRENT (A)

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Performance Graphs

Typical Performance Characteristics

IVCC versus Temperature

IVCC Undervoltage versus Temperature

5,75

4,30

4,25

4,20

4,15

4,10

4,05

4,00

V_S= 12V

5,65

5,55

5,45

5,35

5,25

5,15

5,05

I_IVCC= 50mA

-50

-30

-10

110

130

150

-50

-30

-10

110

130

150

TEMPERATURE (°C)

IVCC versus V_S

Bootstrap Diode drop versus Temperature

5,75

1,1

1,0

T = 20°C

5,65

5,55

5,45

5,35

5,25

5,15

5,05

I_BTS= 50mA

0,9

I_BTS= 20mA

0,8

I_BTS= 10mA

I_IVCC= 50mA

0,7

0,6

0,5

-50

-25

100

125

150

TEMPERATURE (°C)

V_S(V)

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Performance Graphs

Typical Performance Characteristics

Load Regulation

V_S= 12 V

Line Regulation

I_CC= 5 A

5,70

V_S= 12V

I_CC= 5A

Temperature forced for the entire application

5,65

5,60

5,55

5,50

5,65

150°C

5,60

5,55

5,50

25°C

-40°C

V_S(V)

LOAD (A)

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Performance Graphs

Load Step

V_S= 12 V

V_CC= 5.6 V

I_CC= 5 A

I_CC= 0 A

Line Step

I_CC= 5 A

V_CC= 5.6 V

V_S= 24 V

V_S= 12 V

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Package Outlines

0.35 x 45˚

0.1 C D

0.1

3.9

+0.06

0.19

0.08

0.64

0.25

0.65

0.05

0.2

0.25

0.2

D 8x

0.15

C A-B D 14x

Bottom View

0.2

Exposed

Diepad

0.1 C A-B 2x

0.1

4.9

Index Marking

1) Does not include plastic or metal protrusion of 0.15 max. per side

2) Does not include dambar protrusion

PG-SSOP-14-1,-2,-3-PO V02

Figure 15 Package Drawing

Green Product (RoHS compliant)

To meet the world-wide customer requirements for environmentally friendly products and to be compliant with

government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e

Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).

For further package information, please visit our website:

Dimensions in mm

http://www.infineon.com/packages.

Data sheet

Rev. 1.0.1, 2013-04-15

TLF51801ELV

Revision History

Version

Date

Changes

Rev 1.0.1 2013-04-15 Page 21: Editorial change

Rev 1.0

2013-02-25 Initial data sheet

Data sheet

Rev. 1.0.1, 2013-04-15

Edition 2013-04-15

Published by

Infineon Technologies AG

81726 Munich, Germany

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or

characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any

information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties

and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights

of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest

Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in

question, please contact the nearest Infineon Technologies Office.

Infineon Technologies components may be used in life-support devices or systems only with the express written

approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure

of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support

devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain

and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may

be endangered.

TLF51801ELV [INFINEON]

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