IW4093B [INTEGRAL]

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS; 四2输入与非施密特触发器高压硅栅CMOS
IW4093B
型号: IW4093B
厂家: INTEGRAL CORP.    INTEGRAL CORP.
描述:

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS
四2输入与非施密特触发器高压硅栅CMOS

触发器 高压 栅
文件: 总5页 (文件大小:137K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TECHNICAL DATA  
IW4093B  
Quad 2-Input NAND Schmitt Triggers  
High-Voltage Silicon-Gate CMOS  
The IW4093B consists of four Schmitt-trigger circuits. Each circuit  
functions as a two-input NAND gate with Schmitt-trigger action on  
both inputs. The gate switches at different points for positive- and  
negative- going signals. The difference between the positive voltage  
(VP) and the negative voltage (VN) is defined as hysteresis voltage (VH)  
(see Fig.1).  
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 µA at 18 V over full package-  
temperature range; 100 nA at 18 V and 25°C  
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
ORDERING INFORMATION  
IW4093BN Plastic  
IW4093BD SOIC  
TA = -55° to 125° C for all packages  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
LOGIC DIAGRAM  
PIN ASSIGNMENT  
FUNCTION TABLE  
Inputs  
Output  
A
L
B
L
H
L
H
Y
H
H
H
L
PIN 14 =VCC  
PIN 7 = GND  
L
H
H
142  
IW4093B  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
-0.5 to +20  
-0.5 to VCC +0.5  
-0.5 to VCC +0.5  
±10  
Unit  
V
VCC  
VIN  
VOUT  
IIN  
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
V
V
mA  
mW  
PD  
Power Dissipation in Still Air, Plastic DIP+  
SOIC Package+  
750  
500  
PD  
Tstg  
TL  
Power Dissipation per Output Transistor  
Storage Temperature  
100  
-65 to +150  
260  
mW  
°C  
Lead Temperature, 1 mm from Case for 10 Seconds  
(Plastic DIP or SOIC Package)  
°C  
*Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C  
SOIC Package: : - 7 mW/°C from 65° to 125°C  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
VCC  
Parameter  
Min  
3.0  
0
Max  
Unit  
V
DC Supply Voltage (Referenced to GND)  
DC Input Voltage, Output Voltage (Referenced to GND)  
Operating Temperature, All Package Types  
18  
VIN, VOUT  
TA  
VCC  
+125  
V
-55  
°C  
This device contains protection circuitry to guard against damage due to high static voltages or electric  
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated  
voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range  
GND(VIN or VOUT)VCC.  
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).  
Unused outputs must be left open.  
143  
IW4093B  
DC ELECTRICAL CHARACTERISTICS  
(Voltages Referenced to GND)  
VCC  
V
Guaranteed Limit  
Symbol  
Parameter  
Test Conditions  
Unit  
V
-55°C  
25°C  
125  
°C  
VT+min Minimum Positive-  
Going Input  
Input on terminals A or B;  
other inputs to VCC  
5.0  
10  
15  
2.2  
4.6  
6.8  
2.2  
4.6  
6.8  
2.2  
4.6  
6.8  
Threshold Voltage  
Input on terminals A and B;  
other inputs to VCC  
5.0  
10  
15  
2.6  
5.6  
6.3  
2.6  
5.6  
6.3  
2.6  
5.6  
6.3  
VT+max Maximum Positive-  
Going Input  
Input on terminals A or B;  
other inputs to VCC  
5.0  
10  
15  
3.6  
7.1  
10.8  
3.6  
7.1  
10.8  
3.6  
7.1  
10.8  
V
V
Threshold Voltage  
Input on terminals A and B;  
other inputs to VCC  
5.0  
10  
15  
4
8.2  
12.7  
4
8.2  
12.7  
4
8.2  
12.7  
VT-min Minimum Negative-  
Going Input  
Input on terminals A or B;  
other inputs to VCC  
5.0  
10  
15  
0.9  
2.5  
4
0.9  
2.5  
4
0.9  
2.5  
4
Threshold Voltage  
Input on terminals A and B;  
other inputs to VCC  
5.0  
10  
15  
1.4  
3.4  
4.8  
1.4  
3.4  
4.8  
1.4  
3.4  
4.8  
VT-max Maximum Negative-  
Going Input  
Input on terminals A or B;  
other inputs to VCC  
5.0  
10  
15  
2.8  
5.2  
7.4  
2.8  
5.2  
7.4  
2.8  
5.2  
7.4  
V
Threshold Voltage  
Input on terminals A and B;  
other inputs to VCC  
5.0  
10  
15  
3.2  
6.6  
9.6  
3.2  
6.6  
9.6  
3.2  
6.6  
9.6  
VHmin  
Note  
Minimum Hysteresis  
Voltage  
Input on terminals A or B;  
other inputs to VCC  
5.0  
10  
15  
0.3  
1.2  
1.6  
0.3  
1.2  
1.6  
0.3  
1.2  
1.6  
V
Input on terminals A and B;  
other inputs to VCC  
5.0  
10  
15  
0.3  
1.2  
1.6  
0.3  
1.2  
1.6  
0.3  
1.2  
1.6  
VHmax Maximum Hysteresis Input on terminals A or B;  
5.0  
10  
15  
1.6  
3.4  
5
1.6  
3.4  
5
1.6  
3.4  
5
V
Note  
Voltage  
other inputs to VCC  
Input on terminals A and B;  
other inputs to VCC  
5.0  
10  
15  
1.6  
3.4  
5
1.6  
3.4  
5
1.6  
3.4  
5
IIN  
Maximum Input  
Leakage Current  
VIN= GND or VCC  
18  
±0.1  
±0.1  
±1.0  
µA  
144  
IW4093B  
DC ELECTRICAL CHARACTERISTICS  
(Voltages Referenced to GND) - continued  
VCC  
V
Guaranteed Limit  
Symbol  
ICC  
Parameter  
Test Conditions  
VIN= GND or VCC  
Unit  
-55°C  
25°C  
125  
°C  
Maximum Quiescent  
Supply Current  
(per Package)  
5.0  
10  
15  
20  
1
2
1
2
30  
60  
µA  
4
20  
4
20  
120  
600  
IOL  
Minimum Output Low VIN= GND or VCC  
mA  
mA  
(Sink) Current  
UOL=0.4 V  
UOL=0.5 V  
UOL=1.5 V  
5.0  
10  
15  
0.64  
1.6  
4.2  
0.51  
1.3  
3.4  
0.36  
0.9  
2.4  
IOH  
Minimum Output  
VIN= GND or VCC  
High (Source) Current UOH=2.5 V  
5.0  
5.0  
10  
-2.0  
-0.64  
-1.6  
-1.6  
-0.51  
-1.3  
-1.15  
-0.36  
-0.9  
U
U
U
OH=4.6 V  
OH=9.5 V  
OH=13.5 V  
15  
-4.2  
-3.4  
-2.4  
VOH  
Minimum High-Level VIN=GND or VCC  
Output Voltage  
5.0  
10  
15  
4.95  
9.95  
14.95  
4.95  
9.95  
14.95 14.95  
4.95  
9.95  
V
V
VOL  
Maximum Low-Level VIN= VCC  
Output Voltage  
5.0  
10  
15  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
0.05  
Note. VHmin>(VT+min)-(VT-max); VHmax=(VT+max)+(VT-min).  
AC ELECTRICAL CHARACTERISTICS  
(CL=50pF, RL=200k , Input tr=tf=20 ns)  
VCC  
V
Guaranteed Limit  
Symbol  
Parameter  
Unit  
ns  
-55°C  
25°C  
125°C  
tPLH, tPHL Maximum Propagation Delay, Input A or B to  
Output Y (Figure 2)  
5.0  
10  
15  
380  
180  
130  
380  
180  
130  
760  
360  
260  
tTLH, tTHL Maximum Output Transition Time, Any Output  
(Figure 2)  
5.0  
10  
15  
200  
100  
80  
200  
100  
80  
400  
200  
160  
ns  
CIN  
Maximum Input Capacitance  
-
7.5  
pF  
145  
IW4093B  
a) Definition of VT+, VT-, VH  
c) Test setup  
b) Transfer characteristic of 1 of 4 gates  
Figure 1. Hysteresis definition, characteristic, and test setup  
Figure 2. Switching Waveforms  
EXPANDED LOGIC DIAGRAM  
(1/4 of the Device)  
146  

相关型号:

IW4093BD

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS
INTEGRAL

IW4093BD

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS
IKSEMICON

IW4093BN

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS
INTEGRAL

IW4093BN

Quad 2-Input NAND Schmitt Triggers High-Voltage Silicon-Gate CMOS
IKSEMICON

IW4098B

Two Multivibrators (flip-flop) High-Voltage Silicon-Gate CMOS
IKSEMICON

IW4098BD

Two Multivibrators (flip-flop) High-Voltage Silicon-Gate CMOS
IKSEMICON

IW4098BN

Two Multivibrators (flip-flop) High-Voltage Silicon-Gate CMOS
IKSEMICON

IW416

Dual-band 1x1 Wi-Fi 4 and Bluetooth 5.1 Combo SoC
NXP

IW416HN/A1CK

Dual-band 1x1 Wi-Fi 4 and Bluetooth 5.1 Combo SoC
NXP

IW416HN/A1CMP

Dual-band 1x1 Wi-Fi 4 and Bluetooth 5.1 Combo SoC
NXP

IW416HN/A1IK

Dual-band 1x1 Wi-Fi 4 and Bluetooth 5.1 Combo SoC
NXP

IW416HN/A1IMP

Dual-band 1x1 Wi-Fi 4 and Bluetooth 5.1 Combo SoC
NXP