EL5128CY-T7 [INTERSIL]
Dual VCOM Amplifier & Gamma Reference Buffer; 双VCOM放大器和伽玛参考缓冲器
| 型号： | EL5128CY-T7 |
| 厂家： | 
Intersil |
| 描述： | Dual VCOM Amplifier & Gamma Reference Buffer |
| 文件： | 总11页 (文件大小：637K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL5128
®
Data Sheet
July 26, 2004
FN7000.2
Dual V
Buffer
Amplifier & Gamma Reference
Features
• Dual VCOM amplifier
COM
The EL5128 integrates two V
amplifiers with a single gamma
reference buffer. Operating on
COM
• Single gamma reference buffer
• 12MHz -3dB bandwidth
• Supply voltage = 4.5V to 16.5V
• Low supply current = 2.0mA
• High slew rate = 10V/µs
• Unity-gain stable
supplies ranging from 5V to 15V, while consuming only
2.0mA, the EL5128 has a bandwidth of 12MHz (-3dB) and
provides common mode input ability beyond the supply rails,
as well as rail-to-rail output capability. This enables the
amplifier to offer maximum dynamic range at any supply
voltage. The EL5128 also features fast slewing and settling
times, as well as a high output drive capability of 30mA (sink
and source).
• Beyond the rails input capability
• Rail-to-rail output swing
• Ultra-small package
The EL5128 is targeted at TFT-LCD applications, including
notebook panels, monitors, and LCD-TVs. It is available in
the 10-pin MSOP package and is specified for operation
over the -40°C to +85°C temperature range.
• Pb-free available
Applications
Pinout
• TFT-LCD drive circuits
• Notebook displays
• LCD desktop monitors
• LCD-TVs
EL5128
(10-PIN MSOP)
TOP VIEW
VOUTA
VINA-
VINA+
VS+
1
2
3
4
5
10 VOUTB
Ordering Information
9
8
7
6
VINB-
VINB+
VS-
-
+
+ -
PART
NUMBER
EL5128CY
PACKAGE
10-Pin MSOP
10-Pin MSOP
TAPE & REEL PKG. DWG. #
-
7”
13”
-
MDP0043
MDP0043
MDP0043
MDP0043
VINC
VOUTC
EL5128CY-T7
EL5128CY-T13 10-Pin MSOP
EL5128CYZ
(See Note)
10-Pin MSOP
(Pb-free)
EL5128CYZ-T7 10-Pin MSOP
7”
MDP0043
MDP0043
(See Note)
(Pb-free)
EL5128CYZ-
10-Pin MSOP
(Pb-free)
13”
T13 (See Note)
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
1
Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners.
EL5128
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage between V + and V -. . . . . . . . . . . . . . . . . . . .+18V
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
S
S
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . V - - 0.5V, V + 0.5V
S
S
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . 30mA
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at
the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = -5V, R = 10kΩ and C = 10pF to 0V, T = 25°C unless otherwise specified
S
S
L
L
A
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
12
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 0V
2
5
mV
µV/°C
nA
OS
TCV
CM
(Note 1)
= 0V
Average Offset Voltage Drift
Input Bias Current
OS
I
V
2
50
B
CM
R
C
Input Impedance
1
GΩ
pF
IN
Input Capacitance
1.35
IN
CMIR
Common-Mode Input Range
(V
(V
amps)
-5.5
50
+5.5
V
COM
COM
CMRR
Common-Mode Rejection Ratio
Open-Loop Gain
amps) for V from -5.5V to +5.5V
IN
70
95
dB
A
-4.5V ≤ V
≤ +4.5V (V
≤ +4.5V
amps)
COM
75
dB
VOL
AV
OUT
OUT
Voltage Gain
-4.5V ≤ V
0.995
1.005
-4.85
V/V
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
Output Swing High
Short Circuit Current
Output Current
I = -5mA
-4.92
4.92
±120
±30
V
V
OL
L
I = 5mA
4.85
60
OH
L
I
I
mA
mA
SC
OUT
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current (per amplifier)
DYNAMIC PERFORMANCE
SR Slew Rate (Note 2)
V
is moved from ±2.25V to ±7.75V
80
dB
µA
S
I
No load
660
1000
S
-4.0V ≤ V
≤ +4.0V, 20% to 80%
10
500
12
8
V/µs
ns
OUT
t
Settling to +0.1% (A = +1)
V
(A = +1), V = 2V step
V O
S
BW
-3dB Bandwidth
R
R
R
= 10kΩ, C = 10pF
MHz
MHz
°
L
L
L
L
GBWP
PM
Gain-Bandwidth Product
Phase Margin
= 10kΩ, C = 10pF (V
amps)
amps)
L
COM
COM
= 10kΩ, C = 10pF (V
50
75
L
CS
Channel Separation
f = 5MHz
dB
NOTES:
1. Measured over operating temperature range.
2. Slew rate is measured on rising and falling edges.
2
EL5128
Electrical Specifications V + = +5V, V - = 0V, R = 10kΩ and C = 10pF to 2.5V, T = 25°C unless otherwise specified
S
S
L
L
A
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 2.5V
2
5
10
mV
µV/°C
nA
OS
TCV
CM
(Note 1)
= 2.5V
Average Offset Voltage Drift
Input Bias Current
OS
I
V
2
50
B
CM
R
Input Impedance
1
GΩ
pF
IN
IN
C
Input Capacitance
1.35
CMIR
Common-Mode Input Range
-0.5
45
+5.5
V
CMRR
Common-Mode Rejection Ratio
Open-Loop Gain
for V from -0.5V to +5.5V
IN
66
95
dB
A
A
0.5V ≤ V
0.5V ≤ V
≤+ 4.5V
≤+ 4.5V
75
dB
VOL
V
OUT
OUT
Voltage Gain
0.995
1.005
150
V/V
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
Output Swing High
Short Circuit Current
Output Current
I = -5mA
80
mV
V
OL
L
I = +5mA
4.85
60
4.92
±120
±30
OH
L
I
I
mA
mA
SC
OUT
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current (per amplifier)
DYNAMIC PERFORMANCE
SR Slew Rate (Note 2)
V
is moved from 4.5V to 15.5V
80
dB
µA
S
I
No load
660
1000
S
1V ≤ V
≤ 4V, 20% to 80%
10
500
12
8
V/µs
ns
OUT
(A = +1), V = 2V step
t
Settling to +0.1% (A = +1)
V
S
V
O
BW
-3dB Bandwidth
R
R
R
= 10kΩ, C = 10pF
MHz
MHz
°
L
L
L
L
GBWP
PM
Gain-Bandwidth Product
Phase Margin
= 10kΩ, C = 10pF
L
= 10kΩ, C = 10pF
50
75
L
CS
Channel Separation
f = 5MHz
dB
NOTES:
1. Measured over operating temperature range.
2. Slew rate is measured on rising and falling edges.
3
EL5128
Electrical Specifications
V + = +15V, V - = 0V, R = 10kΩ and C = 10pF to 7.5V, T = 25°C unless otherwise specified
S
S
L
L
A
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 7.5V
2
5
14
mV
µV/°C
nA
OS
TCV
CM
(Note 1)
= 7.5V
Average Offset Voltage Drift
Input Bias Current
OS
I
V
2
50
B
CM
R
Input Impedance
1
GΩ
pF
IN
IN
C
Input Capacitance
1.35
CMIR
Common-Mode Input Range
Common-Mode Rejection Ratio
Open-Loop Gain
-0.5
53
+15.5
V
CMRR
for V from -0.5V to +15.5V
IN
72
95
dB
A
A
0.5V ≤ V
0.5V ≤ V
≤ 14.5V
≤ 14.5V
75
dB
VOL
V
OUT
OUT
Voltage Gain
0.995
1.005
150
V/V
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
Output Swing High
Short Circuit Current
Output Current
I = -5mA
80
mV
V
OL
L
I = +5mA
14.85
60
14.92
±120
±30
OH
L
I
I
mA
mA
SC
OUT
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current (per amplifier)
DYNAMIC PERFORMANCE
SR Slew Rate (Note 2)
V
is moved from 4.5V to 15.5V
80
dB
µA
S
I
No load
660
1000
S
1V ≤ V
≤ 14V, 20% to 80%
10
500
12
8
V/µs
ns
OUT
(A = +1), V = 2V step
t
Settling to +0.1% (A = +1)
V
S
V
O
BW
-3dB Bandwidth
R
R
R
= 10kΩ, C = 10pF
MHz
MHz
°
L
L
L
L
GBWP
PM
Gain-Bandwidth Product
Phase Margin
= 10kΩ, C = 10pF
L
= 10kΩ, C = 10pF
50
75
L
CS
Channel Separation
f = 5MHz
dB
NOTES:
1. Measured over operating temperature range.
2. Slew rate is measured on rising and falling edges.
4
EL5128
Typical Performance Curves
1800
70
60
50
40
30
20
10
0
TYPICAL
V =±5V
V =±5V
S
S
TYPICAL
1600
1400
1200
1000
800
600
400
200
0
PRODUCTION
DISTRIBUTION
T =25°C
A
PRODUCTION
DISTRIBUTION
INPUT OFFSET VOLTAGE DRIFT, TCV
(µV/°C)
INPUT OFFSET VOLTAGE (mV)
OS
FIGURE 1. INPUT OFFSET VOLTAGE DISTRIBUTION
FIGURE 2. INPUT OFFSET VOLTAGE DRIFT
V =±5V
S
V =±5V
10
5
S
2.0
0.0
0
-5
-2.0
-50
0
50
100
150
-50
0
50
100
150
DIE TEMPERATURE (°C)
DIE TEMPERATURE (°C)
FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE
FIGURE 4. INPUT BIAS CURRENT vs TEMPERATURE
-4.91
4.97
V =±5V
S
V =±5V
S
I
=5mA
I
=-5mA
OUT
OUT
-4.92
-4.93
-4.94
-4.95
-4.96
-4.97
4.96
4.95
4.94
4.93
-50
0
50
100
150
-50
0
50
100
150
DIE TEMPERATURE (°C)
DIE TEMPERATURE (°C)
FIGURE 5. OUTPUT HIGH VOLTAGE vs TEMPERATURE
FIGURE 6. OUTPUT LOW VOLTAGE vs TEMPERATURE
5
EL5128
Typical Performance Curves (Continued)
V =±5V
S
10.40
10.35
10.30
10.25
V =±5V
S
100
90
R =10kΩ
L
80
-50
0
50
100
150
-50
0
50
100
150
DIE TEMPERATURE (°C)
DIE TEMPERATURE (°C)
FIGURE 7. OPEN-LOOP GAIN vs TEMPERATURE
FIGURE 8. SLEW RATE vs TEMPERATURE
700
V =±5V
S
T =25°C
A
0.55
0.5
600
500
400
300
0.45
-50
0
50
100
150
0
5
10
15
20
DIE TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
FIGURE 9. SUPPLY CURRENT PER AMPLIFIER vs
TEMPERATURE
FIGURE 10. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY
VOLTAGE
5
200
20
10kΩ
150
-30
0
PHASE
1kΩ
100
50
-80
560Ω
-5
150Ω
-130
-180
-230
GAIN
-10
C =10pF
L
0
A =1
V
V =±5V, T =25°C R =10kΩ to
S
A
L
V =±5V
S
GND C =12pF to GND
L
-15
100K
-50
10
1M
FREQUENCY (Hz)
100M
100
1K
10K 100K 1M
FREQUENCY (Hz)
10M 100M
10M
FIGURE 11. OPEN LOOP GAIN AND PHASE vs FREQUENCY
FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS R
L
6
EL5128
Typical Performance Curves (Continued)
20
200
160
120
80
R =10kΩ
L
A =1
V
A =1
V
V =±5V
S
V =±5V
S
10
0
T =25°C
A
12pF
50pF
-10
-20
-30
100pF
40
1000pF
0
10K
100K
1M
10M
1M
FREQUENCY (Hz)
100M
100K
10M
FREQUENCY (Hz)
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS C
FIGURE 14. CLOSED LOOP OUTPUT IMPEDANCE vs
FREQUENCY
L
12
10
8
80
60
40
20
6
V =±5V
S
T =25°C
A
4
2
0
A =1
V
R =10kΩ
L
C =12pF
L
V =±5V
S
DISTORTION <1%
T =25°C
A
0
10K
100K
1M
10M
1K
10K
100K
FREQUENCY (Hz)
100
1M
10M
FREQUENCY (Hz)
FIGURE 15. MAXIMUM OUTPUT SWING vs FREQUENCY
FIGURE 16. CMRR vs FREQUENCY
80
600
PSRR+
PSRR-
60
100
10
1
40
20
V =±5V
S
T =25°C
A
0
1K
100
1K
10K
100K
1M
10M
100M
10K
100K
1M
100
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 17. PSRR vs FREQUENCY
FIGURE 18. INPUT VOLTAGE NOISE SPECTRAL DENSITY vs
FREQUENCY
7
EL5128
Typical Performance Curves (Continued)
-60
-80
0.010
0.009
0.008
0.007
0.006
0.005
0.004
MEASURED CHANNEL A TO B
V =±5V
S
R =10kΩ
L
A =1
V
IN
V
=220mV
RMS
-100
-120
-140
V =±5V
S
0.003
0.002
0.001
R =10kΩ
L
A =1
V
V
=1V
IN
RMS
1K
10K
100K
FREQUENCY (Hz)
1M
6M
1K
10K
100K
FREQUENCY (Hz)
FIGURE 19. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
FIGURE 20. CHANNEL SEPARATION vs FREQUENCY
RESPONSE
V =±5V
S
V =±5V
S
90
70
50
30
10
4
3
2
1
0
-1
-2
-3
-4
A =1
V
A =1
V
R =10kΩ
L
R =10kΩ
L
V
=±50mV
IN
C =12pF
L
0.1%
T =25°C
A
T =25°C
A
0.1%
600
10
100
1K
0
200
400
SETTLING TIME (ns)
800
LOAD CAPACITANCE (pF)
FIGURE 21. SMALL-SIGNAL OVERSHOOT vs LOAD
CAPACITANCE
FIGURE 22. SETTLING TIME vs STEP SIZE
V =±5V
1V
1µs
S
50mV
200ns
T =25°C
A
A =1
V
R =10kΩ
L
C =12pF
L
V =±5V
S
T =25°C
A
A =1
V
R =10kΩ
L
C =12pF
L
FIGURE 23. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 24. SMALL SIGNAL TRANSIENT RESPONSE
8
EL5128
Pin Descriptions
PIN
NUMBER
PIN NAME
PIN FUNCTION
Amplifier A Output
EQUIVALENT CIRCUIT
1
VOUTA
V
S+
V
S-
GND
CIRCUIT 1
2
VINA-
Amplifier A Inverting Input
V
V
S+
S-
CIRCUIT 2
3
4
VINA+
VS+
Amplifier A Non-Inverting Input
Positive Power Supply
Amplifier C
(Reference Circuit 2)
5
VINC
(Reference Circuit 2)
(Reference Circuit 2)
6
VOUTC
VS-
Amplifier C Output
7
Negative Power Supply
Amplifier B Non-Inverting Input
Amplifier B Inverting Input
Amplifier B Output
8
VINB+
VINB-
VOUTB
(Reference Circuit 2)
(Reference Circuit 2)
(Reference Circuit 1)
9
10
9
EL5128
diodes placed in the input stage of the device begin to
conduct and over-voltage damage could occur.
Applications Information
Product Description
The EL5128 voltage feedback amplifier/buffer combination is
fabricated using a high voltage CMOS process. It exhibits
rail-to-rail input and output capability, it is unity gain stable,
and has low power consumption (500µA per amplifier).
These features make the EL5128 ideal for a wide range of
general-purpose applications. Connected in voltage follower
mode and driving a load of 10kΩ and 12pF, the EL5128 has
a -3dB bandwidth of 12MHz while maintaining a 10V/µs slew
rate.
1V
100µs
V =±2.5V
S
T =25°C
A
A =1
V
IN
1V
V
=6V
P-P
Operating Voltage, Input, and Output
The EL5128 is specified with a single nominal supply voltage
from 5V to 15V or a split supply with its total range from 5V
to 15V. Correct operation is guaranteed for a supply range of
4.5V to 16.5V. Most EL5128 specifications are stable over
both the full supply range and operating temperatures of
-40°C to +85°C. Parameter variations with operating voltage
and/or temperature are shown in the typical performance
curves.
FIGURE 26. OPERATION WITH BEYOND-THE-RAILS INPUT
Short Circuit Current Limit
The EL5128 will limit the short circuit current to ±120mA if
the output is directly shorted to the positive or the negative
supply. If an output is shorted indefinitely, the power
dissipation could easily increase such that the device may
be damaged. Maximum reliability is maintained if the output
continuous current never exceeds ±30mA. This limit is set by
the design of the internal metal interconnects.
The input common-mode voltage range of the amplifiers
extends 500mV beyond the supply rails. The output swings
of the EL5128 typically extend to within 80mV of positive and
negative supply rails with load currents of 5mA. Decreasing
load currents will extend the output voltage range even
closer to the supply rails. Figure 25 shows the input and
output waveforms for the device in the unity-gain
Driving Capacitive Loads
The EL5128 can drive a wide range of capacitive loads. As
load capacitance increases, however, the -3dB bandwidth of
the device will decrease and the peaking increase. The
amplifiers drive 10pF loads in parallel with 10kΩ with just
1.5dB of peaking, and 100pF with 6.4dB of peaking. If less
peaking is desired in these applications, a small series
resistor (usually between 5Ω and 50Ω) can be placed in
series with the output. However, this will obviously reduce
the gain slightly. Another method of reducing peaking is to
add a “snubber” circuit at the output. A snubber is a shunt
load consisting of a resistor in series with a capacitor. Values
of 150Ω and 10nF are typical. The advantage of a snubber is
that it does not draw any DC load current or reduce the gain.
configuration. Operation is from ±5V supply with a 10kΩ load
connected to GND. The input is a 10V
sinusoid. The
.
P-P
P-P
output voltage is approximately 9.985V
V =±5V A =1
S
V
IN
T =25°C
V
=10V
P-P
A
Power Dissipation
With the high-output drive capability of the EL5128 amplifier,
it is possible to exceed the 125°C “absolute-maximum
junction temperature” under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for the application to determine if load
conditions need to be modified for the amplifier to remain in
the safe operating area.
FIGURE 25. OPERATION WITH RAIL-TO-RAIL INPUT AND
OUTPUT
Output Phase Reversal
The EL5128 is immune to phase reversal as long as the
input voltage is limited from (V -) -0.5V to (V +) +0.5V.
The maximum power dissipation allowed in a package is
determined according to:
S
S
Figure 26 shows a photo of the output of the device with the
input voltage driven beyond the supply rails. Although the
device's output will not change phase, the input's over-
voltage should be avoided. If an input voltage exceeds
supply voltage by more than 0.6V, electrostatic protection
T
- T
AMAX
JMAX
P
= --------------------------------------------
DMAX
Θ
JA
10
EL5128
where:
• T
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
= Maximum junction temperature
= Maximum ambient temperature
0.6
0.5
0.4
0.3
0.2
0.1
0
JMAX
• T
AMAX
486mW
• θ = Thermal resistance of the package
JA
• P
DMAX
= Maximum power dissipation in the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
P
= Σi × [V × I
+ (V + - V
i) × I
i]
LOAD
DMAX
S
SMAX
S
OUT
0
25
50
75 85 100
125
when sourcing, and:
AMBIENT TEMPERATURE (°C)
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
P
= Σi × [V × I
+ (V
i - V -) × I
i]
LOAD
DMAX
S
SMAX
OUT
S
when sinking.
where:
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1
0.9
• V = Total supply voltage
S
870mW
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
• I
= Maximum supply current per amplifier
SMAX
• V
i = Maximum output voltage of the application
OUT
• I
i = Load current
LOAD
If we set the two P
can solve for R
equations equal to each other, we
DMAX
i to avoid device overheat. Figures 27
LOAD
and 28 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be
found graphically, based on the package type and the
ambient temperature. By using the previous equation, it is a
0
25
50
75 85 100
125
AMBIENT TEMPERATURE (°C)
simple matter to see if P
exceeds the device's power
DMAX
FIGURE 28. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
derating curves. To ensure proper operation, it is important
to observe the recommended derating curves in Figures 27
and 28.
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5128 can provide gain at high frequency. As with any
high-frequency device, good printed circuit board layout is
necessary for optimum performance. Ground plane
construction is highly recommended, lead lengths should be
as short as possible and the power supply pins must be well
bypassed to reduce the risk of oscillation. For normal single
supply operation, where the V - pin is connected to ground,
S
a 0.1µF ceramic capacitor should be placed from V + to pin
S
to V - pin. A 4.7µF tantalum capacitor should then be
S
connected in parallel, placed in the region of the amplifier.
One 4.7µF capacitor may be used for multiple devices. This
same capacitor combination should be placed at each
supply pin to ground if split supplies are to be used.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
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