EL5153IW-T7A [INTERSIL]
300MHz Amplifiers; 300MHz的放大器
| 型号： | EL5153IW-T7A |
| 厂家： | 
Intersil |
| 描述： | 300MHz Amplifiers |
| 文件： | 总14页 (文件大小：356K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL5152, EL5153, EL5252, EL5455
®
Data Sheet
February 17, 2005
FN7385.3
PRELIMINARY
300MHz Amplifiers
Features
• 270MHz -3dB bandwidth
The EL5152, EL5153, EL5252, and EL5455 are 300MHz
bandwidth -3dB voltage mode feedback amplifiers with DC
accuracy of < 0.01%, 1mV offsets and 50kV/V open loop
gains. These amplifiers are ideally suited for applications
ranging from precision measurement instrumentation to
high-speed video and monitor applications demanding
higher linearity at higher frequency. Capable of operating
with as little as 3.0mA of current from a single supply ranging
from 5V to 12V dual supplies ranging from ±2.5V to ±5.0V
these amplifiers are also well suited for handheld, portable
and battery-powered equipment.
• 180V/µs slew rate
• ±1mV maximum V
OS
• Very high open loop gains 50kV/V
• Low supply current = 3mA
• 105mA output current
• Single supplies from 5V to 12V
• Dual supplies from ±2.5V to ±5V
• Fast disable on the EL5152 and EL5252
• Low cost
Single amplifiers are offered in SOT-23 packages and duals
in a 10-pin MSOP package for applications where board
space is critical. Quad amplifiers are available in a 14-pin SO
package. Additionally, singles and duals are available in the
industry-standard 8-pin SO. All parts operate over the
industrial temperature range of -40°C to +85°C.
• Pb-Free available (RoHS compliant)
Applications
• Imaging
Ordering Information
• Instrumentation
• Video
PART
NUMBER
PACKAGE
8-Pin SO
8-Pin SO
8-Pin SO
TAPE & REEL PKG. DWG. #
EL5152IS
-
7”
13”
-
MDP0027
MDP0027
MDP0027
MDP0027
• Communications devices
EL5152IS-T7
EL5152IS-T13
EL5152ISZ
(See Note)
8-Pin SO
(Pb-free)
EL5152ISZ-T7
(See Note)
8-Pin SO
(Pb-free)
7”
MDP0027
MDP0027
EL5152ISZ-
T13 (See Note)
8-Pin SO
(Pb-free)
13”
EL5153IW-T7
5-Pin SOT-23
7” (3K pcs)
7” (250 pcs)
7” (3K pcs)
MDP0038
MDP0038
MDP0038
EL5153IW-T7A 5-Pin SOT-23
EL5153IWZ-T7 5-Pin SOT-23
(See Note)
(Pb-free)
EL5153IWZ-
T7A (See Note)
5-Pin SOT-23
(Pb-free)
7” (250 pcs)
MDP0038
EL5252IY
10-Pin MSOP
10-Pin MSOP
10-Pin MSOP
14-Pin SO
-
MDP0043
MDP0043
MDP0043
MDP0027
MDP0027
MDP0027
EL5252IY-T7
EL5252IY-T13
EL5455IS
7”
13”
-
EL5455IS-T7
EL5455IS-T13
14-Pin SO
7”
14-Pin SO
13”
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish,
which are RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at Pb-free
peak reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EL5152, EL5153, EL5252, EL5455
Pinouts
EL5152
EL5153
(5-PIN SOT-23)
TOP VIEW
(8-PIN SO)
TOP VIEW
NC
IN-
1
2
3
4
8
7
6
5
CE
OUT
VS-
IN+
1
2
3
5
4
VS+
IN-
VS+
OUT
NC
-
+
+
-
IN+
VS-
EL5252
(10-PIN MSOP)
TOP VIEW
EL5455
(14-PIN SO)
TOP VIEW
INA+
CEA
VS-
INA-
OUTA
INA-
1
2
3
4
5
10
9
1
2
3
4
5
6
7
14 OUTD
13 IND-
12 IND+
11 VS-
-
OUTA
VS+
-
+
+
+
+
-
+
8
INA+
VS+
+
-
OUTB
INB-
CEB
INB+
7
6
INB+
INB-
10 INC+
-
-
9
8
INC-
OUTB
OUTC
FN7385.3
2
February 17, 2005
EL5152, EL5153, EL5252, EL5455
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage between V and GND. . . . . . . . . . . . . . . . . . . 13.2V
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
S
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA
Pin Voltages. . . . . . . . . . . . . . . . . . . . . . . . . GND -0.5V to V +0.5V
S
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Current into I +, I -, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
N N
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications
PARAMETER
V + = +5V, V - = ±5V, R = R = 750Ω, R = 150Ω, T = 25°C, unless otherwise specified.
S
S
F
G
L
A
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
BW
-3dB Bandwidth
A
= +1, R = 500Ω, C = 5.0pF
300
85
MHz
MHz
MHz
MHz
V/µs
V/µs
ns
V
L
L
A
= +2, R = 150Ω
V
L
GBWP
BW1
SR
Gain Bandwidth Product
0.1dB Bandwidth
Slew Rate
R
= 150Ω
165
50
L
A
= +1, R = 500Ω
L
V
V
= -3V to +3V, A = +2
120
155
180
30
O
V
V
V
= -3V to +3V, A = 1, R = 500Ω
V L
O
t
0.1% Settling Time
= -1V to +1V, A = +2
OUT V
S
dG
dP
Differential Gain Error
A
= +2, R = 150Ω
0.06
0.045
12
%
V
L
Differential Phase Error
Input Refered Voltage Noise
Input Refered Current Noise
A
= +2, R = 150Ω
°
V
L
V
nV/√Hz
pA/√Hz
N
I
1.8
N
DC PERFORMANCE
Offset Voltage
V
-1
0.5
-2
1
mV
OS
T V
Input Offset Voltage Temperature
Coefficient
Measured from T
MIN
to T
MAX
µV/°C
C
OS
A
Open Loop Gain
V
V
is from -2.5V to 2.5V (EL5152 & EL5153)
10
15
20
50
kV/V
kV/V
VOL
O
O
is from -2.5V to 2.5V (EL5252 & EL5455)
INPUT CHARACTERISTICS
CMIR
Common Mode Input Range
Guaranteed by CMRR test
-2.5
85
2.5
V
CMRR
Common Mode Rejection Ratio
Bias Current
V
= 2.5 to -2.5
110
0.12
12
dB
µA
nA
MΩ
pF
CM
I
I
-0.4
-80
25
+0.6
80
B
Input Offset Current
Input Resistance
OS
R
60
IN
IN
C
Input Capacitance
1
OUTPUT CHARACTERISTICS
V
Output Voltage Swing
Output Current
R
R
R
= 150Ω to GND
= 500Ω to GND
= 10Ω to GND
±3.0
±3.4
60
±3.3
±3.7
105
V
V
OUT
L
L
L
I
mA
OUT
ENABLE (SELECTED PACKAGES ONLY)
t
t
Enable Time
Disable Time
200
300
ns
ns
EN
DIS
FN7385.3
3
February 17, 2005
EL5152, EL5153, EL5252, EL5455
Electrical Specifications
V + = +5V, V - = ±5V, R = R = 750Ω, R = 150Ω, T = 25°C, unless otherwise specified. (Continued)
S
S
F
G
L
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
0
MAX
-1
UNIT
µA
µA
V
I
I
CE Pin Input High Current
CE Pin Input Low Current
CE = V +
S
IHCE
ILCE
CE = V -
5
13
25
S
V
V
CE Input High Voltage for Power-down
CE Input Low Voltage for Power-up
V + -1
S
IHCE
ILCE
V + -3
S
V
SUPPLY
I
I
Supply Current - Enabled (per amplifier) No load, V = 0V, CE = +5V
IN
2.46
5
3.0
13
3.43
25
mA
µA
dB
dB
SON
Supply Current - Disabled (per amplifier) No load, V = 0V, CE = 5V
IN
SOFF
PSRR
Power Supply Rejection Ratio
DC, V = ±3.0V to ±6.0V (EL5152 & EL5153)
85
80
116
95
S
DC, V = ±3.0V to ±6.0V (EL5252 & EL5455)
S
Typical Performance Curves
90
4
60
30
0
A =+5
V
3
2
1
0
-1
A =+2
V
A =+1
V
A =+1
V
-30
-60
A =+2
V
A =+5
-90
V
-2
-3
-4
-5
-6
-120
-150
-180
-210
Supply=±5.0V
INPUT=-30dBm=20mV
R =500Ω
Supply=±5.0V
INPUT=-30dBm=20mV
R =500Ω
L
L
C =5pF
L
C =5pF
L
100M
100K
1M
10M
FREQUENCY (Hz)
500M
100M
100K
1M
10M
500M
FREQUENCY (Hz)
FIGURE 2. EL5152 SMALL SIGNAL FREQUENCY PHASE
FOR VARIOUS GAINS
FIGURE 1. EL5152 SMALL SIGNAL FREQUENCY FOR
VARIOUS GAINS
5
5
10Ω
A =+1
V
12pF
10pF
C =5pF
L
4
3
2
1
0
4
3
2
1
0
R =500Ω
L
A =+1
V
50Ω
4.7pF
3.3pF
500Ω
150Ω
-1
-1
2.2pF
-2
-3
-4
-5
-2
-3
-4
-5
1pF
100M
100M
100K
1M
10M
FREQUENCY (Hz)
500M
100K
1M
10M
500M
FREQUENCY (Hz)
FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS C
FIGURE 3. FREQUENCY RESPONSE FOR VARIOUS R
L
L
FN7385.3
4
February 17, 2005
EL5152, EL5153, EL5252, EL5455
Typical Performance Curves (Continued)
5
4
A =+2
V
22pF
18pF
A =+2
V
4
3
2
1
0
3
2
1
0
-1
50Ω
R =500Ω
C =5pF
L
L
R =500Ω
100Ω
R =500Ω
F
F
200Ω
12pF
250Ω
500Ω
-1
-2
4.7pF
2.7pF
-2
-3
-4
-5
-3
-4
-5
-6
100M
100M
100K
1M
10M
FREQUENCY (Hz)
500M
100K
1M
10M
800M
FREQUENCY (Hz)
FIGURE 6. FREQUENCY RESPONSE FOR VARIOUS C
FIGURE 5. FREQUENCY RESPONSE FOR VARIOUS R
L
L
4
4
87pF
A =+5
V
R =500Ω
L
3
2
1
0
-1
3
2
1
0
-1
C =5pF
L
A =+5
V
68pF
50pF
R =102Ω
R =102Ω
F
F
50Ω
200Ω
39pF
27pF
500Ω
250Ω
-2
-2
-3
-4
-5
-6
-3
-4
-5
-6
18pF
100M
100K
1M
10M
500M
100M
100K
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 8. FREQUENCY RESPONSE FOR VARIOUS C
L
FIGURE 7. FREQUENCY RESPONSE FOR VARIOUS R
L
5
5
R =500Ω
1500Ω
R =R
F
=
L
G
R =150Ω
4.7pF
4
3
2
1
0
L
4
3
2
1
0
C =5pF
L
A =+2
V
A =+2
V
R =500Ω
F
1000Ω
750Ω
500Ω
3.3pF
3.2pF
1pF
-1
-1
-2
-3
-4
-5
-2
-3
-4
-5
100M
100K
1M
10M
500M
100M
100K
1M
10M
500M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 10. FREQUENCY RESPONSE vs R /R
F
G
FIGURE 9. FREQUENCY RESPONSE FOR
VARIOUS C
IN
FN7385.3
5
February 17, 2005
EL5152, EL5153, EL5252, EL5455
Typical Performance Curves (Continued)
-5
5
R =500Ω
Supply=±5.0V
L
-4
-3
-2
-1
0
4
3
2
1
0
A =+5
V
R =500Ω
L
34pF
22pF
R =102Ω
A =+2
V
F
R =500Ω
F
±2.0V
±3.0V
±4.0V
-1
-1
±5.0V
0pF
-2
-3
-4
-5
-2
-3
-4
-5
100M 300M
100K
1M
10M
FREQUENCY (Hz)
100M
100K
1M
10M
500M
FREQUENCY (Hz)
FIGURE 11. FREQUENCY RESPONSE FOR VARIOUS C
FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS POWER
SUPPLY
IN
-30
-0
-40
-50
-60
A =+1
V
-10
-20
-30
-40
-50
±2.5
±3.0
-70
-80
±5.0
-90
-100
-110
-120
-130
-60
-70
-80
-90
-100
1M
10M
100
1K
10K
100K
100M
1M
1K
10K
100K
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 14. CMRR FOR VARIOUS POWER SUPPLY VALUES
FIGURE 13. PSRR
A =+1
V
1000
A =+1
V
R =500Ω
L
100
10
1
C =0
L
CH 1
CH 2
0.01
328ns
216ns
DISABLE
ENABLE
0.001
1M
100M
10M
1K
10K
100K
FREQUENCY (Hz)
TIME (400ns/DIV)
FIGURE 16. ENABLE/DISABLE RESPONSE
FIGURE 15. OUTPUT IMPEDANCE
FN7385.3
February 17, 2005
6
EL5152, EL5153, EL5252, EL5455
Typical Performance Curves (Continued)
A =+1
V
R =500Ω
A =+1
V
L
C =5pF
L
R =500Ω
L
C =5pF
L
0V
0V
TIME (4ns/DIV)
TIME (4ns/DIV)
FIGURE 18. FALL TIME - LARGE SIGNAL RESPONSE
FIGURE 17. RISE TIME - LARGE SIGNAL RESPONSE
A =+1
V
A =+1
V
R =500Ω
R =500Ω
L
L
C =5pF
C =5pF
L
L
0V
0V
TIME (2ns/DIV)
TIME (2ns/DIV)
FIGURE 20. FALL TIME - SMALL SIGNAL RESPONSE
FIGURE 19. RISE TIME - SMALL SIGNAL RESPONSE
90
80
-10
A =+1
V
-20
-30
-40
-50
-60
R -500Ω
L
0
70
60
50
40
30
20
GAIN
C =0pF
L
45
IN #2
OUT #1
IN #1
90
-70
-80
-90
OUT #2
PHASE
135
180
10
0
-10
-100
10K
100K
FREQUENCY (Hz)
1M
10M
100M 500M
1K
100M
100K
1M
10M
FREQUENCY (Hz)
1G
FIGURE 21. EL5152 SMALL SIGNAL OPEN LOOP GAIN vs
FREQUENCY INVERTING
FIGURE 22. EL5252 SMALL SIGNAL FREQUENCY vs
CROSSTALK
FN7385.3
February 17, 2005
7
EL5152, EL5153, EL5252, EL5455
Typical Performance Curves (Continued)
4
7
R =500Ω
L
3
2
1
C =0pF
L
6
5
±2.0V
±3.0V
±4.0V
±5.0V
0
-1
4
3
2
-2
A =+2
-3
-4
-5
-6
V
R =500Ω
L
C =5pF
L
1
0
100M
100K
1M
10M
FREQUENCY (Hz)
800M
±1 ±1.5 ±2 ±2.5 ±3 ±3.5 ±4
VOLTAGE (V)
±4.5 ±5
FIGURE 24. FREQUENCY RESPONSE FOR VARIOUS
VOLTAGE SUPPLY LEVELS
FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE
5
A =+1
V
4
3
2
1
0
R -500Ω
L
C =0pF
L
CHANNEL #1
CHANNEL #2
-1
-2
-3
-4
-5
100M
100K
1M
10M
1G
FREQUENCY (Hz)
FIGURE 25. EL5252 SMALL SIGNAL FREQUENCY - CHANNEL TO CHANNEL
JEDEC JESD51-3 LOW EFFECTIVE
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
THERMAL CONDUCTIVITY TEST BOARD
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.4
1.2
1
833mW
SO14
SO14
1.136W
θ
=88°C/W
θ
=120°C/W
JA
JA
0.8
0.6
0.4
0.2
0
909mW
625mW
SO8
=160°C/W
SO8
θ
JA
θ
=110°C/W
JA
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
TEMPERATURE
FN7385.3
February 17, 2005
8
EL5152, EL5153, EL5252, EL5455
Typical Performance Curves (Continued)
JEDEC JESD51-3 LOW EFFECTIVE
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
THERMAL CONDUCTIVITY TEST BOARD
0.45
0.4
0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
391mW
435mW
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
SOT
SOT23-5/6
23-
56°
5/6
C/W
θ
=2
θ
=230°C/W
JA
JA
0.05
0
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 29. PACKAGE POWER DISSIPATION vs AMBIENT
FIGURE 28. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
0.6
THERMAL CONDUCTIVITY TEST BOARD
1
0.9
0.5
870mW
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
486mW
MSOP8/10
MSOP8/10
=115°C/W
0.4
0.3
0.2
0.1
0
θ
=206°C/W
JA
θ
JA
0
25
50
75 85 100
125
0
25
50
75 85 100
125
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
TEMPERATURE
FN7385.3
February 17, 2005
9
EL5152, EL5153, EL5252, EL5455
position of the pole shifts in the frequency domain, the
EL5152 Product Description
amplifier's phase margin is reduced and the amplifier
becomes less stable. Peaking in the frequency domain and
ringing in the time domain are symptomatic of this shift in
pole location. So we want to keep the feedback resistor as
small as possible. You may want to use a large feedback
resistor for some reason; in this case to compensate the shift
of the pole and maintain stability a small capacitor in the few
Pico farad range in parallel with the feedback resistor is
recommended.
The EL5152, EL5153, EL5252, and EL5253 are wide
bandwidth, low power, low offset voltage feedback
operational amplifiers capable of operating from a single or
dual power supplies. This family of operational amplifiers are
internally compensated for closed loop gain of +1 or greater.
Connected in voltage follower mode, driving a 500W load
members of this amplifier family demonstrate a -3dB
bandwidth of about 300MHz. With the loading set to
accommodate typical video application, 150Ω load and gain
set to +2, bandwidth reduces to about 180MHz with a
600V/µs slew rate. Power down pins on the EL5152 and
EL5252 reduce the already low power demands of this
amplifier family to 17µA typical while the amplifier is
disabled.
For the gains greater than unity, it has been determined a
feedback resistance ranging from 500W to 750W provides
optimal response.
Gain Bandwidth Product
The EL5156 and EL5157 families have a gain bandwidth
product of 210MHz for a gain of +5. Bandwidth can be
predicted by the following equation:
Input, Output and Supply Voltage Range
The EL5152 and EL5153 families have been designed to
operate with supply voltage ranging from 5V to 12V. Supply
voltages range from ±2.5V to ±5V for split supply operation.
Of course split supply operation can easily be achieved
using single supplies by splitting off half of the single supply
with a simple voltage divider as illustrated in the application
circuit section.
(Gain) x (BW) = GainBandwidthProduct
Video Performance
For good video performance, an amplifier is required to
maintain the same output impedance and same frequency
response as DC levels are changed at the output; this
characteristic is widely referred to as “diffgain-diffphase”.
Many amplifiers have a difficult time with this especially while
driving standard video loads of 150Ω, as the output current
has a natural tendency to change with DC level. The EL5152
dG and dP for these families is a respectable 0.006% and
0.04%, while driving 150W at a gain of 2. Driving high
impedance loads would give a similar or better dG and dP
performance as the current output demands placed on the
amplifier lessen with increased load.
Input Common Mode Range
These amplifiers have an input common mode voltage
ranging from 1.5V above the negative supply (V - pin) to
S
1.5V below the positive supply (V + pin). If the input signal is
S
driven beyond this range the output signal will exhibit
distortion.
Maximum Output Swing & Load Resistance
The outputs of the EL5152 and EL5153 families maximum
output swing ranges from -4V to 4V for V = ±5V with a load
S
Driving Capacitive Loads
resistance of 500Ω. Naturally, as the load resistance
becomes lower, the output swing lowers accordingly; for
instance, if the load resistor is 150W, the output swing
ranges from -3.5V to 3.5V. This response is a simple
application of Ohms law indicating a lower value resistance
results in greater current demands of the amplifier.
Additionally, the load resistance affects the frequency
response of this family as well as all operational amplifiers,
as clearly indicated by the Gain Vs Frequency For Various
RL curves clearly indicate. In the case of the frequency
response reduced bandwidth with decreasing load
resistance is a function of load resistance in conjunction with
the output zero response of the amplifier.
The EL5152 and EL5153 families can easily drive capacitive
loads as demanding as 27pF in parallel with 500Ω while
holding peaking to within 5dB of peaking at unity gain. Of
course if less peaking is desired, a small series resistor
(usually between 5W to 50W) can be placed in series with
the output to eliminate most peaking. However, there will be
a small sacrifice of gain which can be recovered by simply
adjusting the value of the gain resistor.
Driving Cables
Both ends of all cables must always be properly terminated;
double termination is absolutely necessary for reflection-free
performance. Additionally, a back-termination series resistor
at the amplifier's output will isolate the amplifier from the
cable and allow extensive capacitive drive. However, other
applications may have high capacitive loads without a back-
termination resistor. Again, a small series resistor at the
output can help to reduce peaking.
Choosing A Feedback Resistor
A feedback resistor is required to achieve unity gain; simply
short the output pin to the inverting input pin. Gains greater
than +1 require a feedback and gain resistor to set the
desired gain. This gets interesting because the feedback
resistor forms a pole with the parasitic capacitance at the
inverting input. As the feedback resistance increases the
FN7385.3
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February 17, 2005
EL5152, EL5153, EL5252, EL5455
For sinking:
Disable/Power-Down
n
The EL5152 and EL5253 can be disabled with their output
placed in a high impedance state. The turn off time is about
330ns and the turn on time is about 130ns. When disabled,
the amplifier's supply current is reduced to 17µA typically;
essentially eliminating power consumption. The amplifier's
power down is controlled by standard TTL or CMOS signal
levels at the ENABLE pin. The applied logic signal is relative
PD
= V × I
+
(V
– V ) × I
OUTi S LOADi
MAX
S
SMAX
∑
i = 1
Where:
V = Supply voltage
S
IS
= Maximum quiescent supply current
MAX
OUT
to V - pin. Letting the ENABLE pin float or the application of
S
V
= Maximum output voltage of the application
a signal that is less than 0.8V above V - enables the
S
amplifier. The amplifier is disabled when the signal at
R
= Load resistance tied to ground
LOAD
= Load current
ENABLE pin is above V + -1.5V.
S
I
LOAD
N = number of amplifiers (Max = 2)
By setting the two PD equations equal to each other, we
Output Drive Capability
The EL5152 and EL5153 families do not have internal short
circuit protection circuitry. Typically, short circuit currents as
high as 95mA and 70mA can be expected and naturally, if
the output is shorted indefinitely the part can easily be
damaged from overheating, or excessive current density
may eventually compromise metal integrity. Maximum
reliability is maintained if the output current is always held
below ±40mA. This limit is set and limited by the design of
the internal metal interconnect. Note that in transient
applications, the part is extremely robust.
MAX
can solve the output current and R
overheat.
to avoid the device
LOAD
Power Supply Bypassing Printed Circuit Board
Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as short as possible. The power supply
pin must be well bypassed to reduce the risk of oscillation.
Power Dissipation
For normal single supply operation, where the V - pin is
S
connected to the ground plane, a single 4.7µF tantalum
With the high output drive capability of the EL5152 and
EL5153 families, it is possible to exceed the 125°C absolute
maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the
maximum junction temperature for an application to
determine if load conditions or package types need to be
modified to assure operation of the amplifier in a safe
operating area.
capacitor in parallel with a 0.1µF ceramic capacitor from V +
S
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the V - pin becomes the negative
supply rail. See Figure 1 for a complete tuned power supply
bypass methodology.
S
Printed Circuit Board Layout
The maximum power dissipation allowed in a package is
determined according to:
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
T
– T
AMAX
JMAX
PD
= --------------------------------------------
MAX
Θ
JA
Where:
T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
T
AMAX
q
= Thermal resistance of the package
JA
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
For sourcing:
n
V
OUTi
R
Li
-----------------
PD
= V × I
+
(V – V
) ×
MAX
S
SMAX
S
OUTi
∑
i = 1
FN7385.3
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February 17, 2005
EL5152, EL5153, EL5252, EL5455
Application Circuits
Sullen Key Low Pass Filter
Sullen Key High Pass Filter
Again this useful filter benefits from the characteristics of the
EL5152. The transfer function is very similar to the low pass
so only the results are presented. (See Figure 33)
A common and easy to implement filter taking advantage of
the wide bandwidth, low offset and low power demands of
the EL5152. A derivation of the transfer function is provided
for convenience. (See Figure 32)
RB
RA
K = 1+
1
Vo = K
V1
R2C2s +1
Vo
V1− Vi
R1
Vo − Vi
1
K − V1
1+
+
= 0
R2
C1s
K
H(s) =
2
R1C1R2C2s + ((1− K)R1C1+ R1C2 + R21C2)s +1
1
H(jw) =
2
1− w R1C1R2C2 + jw((1− K)R1C1+ R1C2 + R2C2)
Holp = K
1
wo =
R1C1R2C2
1
Q =
R1C1
R2C2
R1C2
R2C1
R2C2
R1C1
(1− K)
+
+
Holp = K
Equations simplify if we let all
components be equal R=C
1
RC
1
Q =
wo =
3 − K
FIGURE 32. SULLEN KEY LOW PASS FILTER
FN7385.3
February 17, 2005
12
EL5152, EL5153, EL5252, EL5455
Holp = K
1
wo =
R1C1R2C2
1
Q =
R1C1
R2C2
R1C2
R2C1
R2C2
R1C1
(1− K)
+
+
K
4 − K
Holp =
wo =
Equations simplify if we let
all components be equal R=C
2
RC
2
4 − K
Q =
FIGURE 33. SULLEN KEY HIGH PASS FILTER
Differential Output Instrumentation Amplifier
A
+
1
R
R
3
3
e
1
The addition of a third amplifier to the conventional three
amplifier Instrumentation Amplifier introduces the benefits of
differential signal realization, specifically the advantage of
using common mode rejection to remove coupled noise and
ground –potential errors inherent in remote transmission.
This configuration also provides enhanced bandwidth, wider
output swing and faster slew rate than conventional three
amplifier solutions with only the cost of an additional
amplifier and few resistors.
-
A
3
R
G
e 3
2
o
-
+
+
R
R
3
3
REF
R
e
o
R
R
3
3
A
4
R
2
-
+
-
e 4
o
A
2
R
R
3
3
-
+
e
2
e
e
= –(1 + 2R ⁄ R )(e – e )
e
= (1 + 2R ⁄ R )(e – e )
o4 2 G 1 2
o3
o
2
G
1
2
= –2(1 + 2R ⁄ R )(e – e )
2
G
1
2
2f
C1, 2
A
= –2(1 + 2R ⁄ R )
2 G
Di
BW = -----------------
A
Di
FN7385.3
February 17, 2005
13
EL5152, EL5153, EL5252, EL5455
resulting in an imbalance in the bridge. A voltage variation
Strain Gauge
from the referenced high accuracy source is generated and
translated to the difference amplifier through the buffer
stage. This voltage difference as a function of the strain is
converted into an output voltage.
The strain gauge is an ideal application to take advantage of
the moderate bandwidth and high accuracy of the EL5152.
The operation of the circuit is very straight forward. As the
strain variable component resistor in the balanced bridge is
subjected to increasing strain its resistance changes
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7385.3
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February 17, 2005
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