EL5811IREZ [INTERSIL]
60MHz Rail-to-Rail Input-Output VCOM Amplifiers; 60MHz的轨至轨输入输出VCOM放大器
| 型号： | EL5811IREZ |
| 厂家： | 
Intersil |
| 描述： | 60MHz Rail-to-Rail Input-Output VCOM Amplifiers |
| 文件： | 总12页 (文件大小：251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL5611, EL5811
®
Data Sheet
August 3, 2005
FN7355.1
60MHz Rail-to-Rail Input-Output V
Amplifiers
Features
• 60MHz -3dB bandwidth
COM
The EL5611 and EL5811 are low power, high voltage rail-to-
rail input-output amplifiers targeted primarily at V
• Supply voltage = 4.5V to 16.5V
• Low supply current (per amplifier) = 2.5mA
• High slew rate = 75V/µs
COM
applications in TFT-LCD displays. The EL5611 contains six
amplifiers, and the EL5811 contains eight amplifiers.
Operating on supplies ranging from 5V to 15V, while
consuming only 2.5mA per amplifier, the EL5611 and
EL5811 have a bandwidth of 60MHz (-3dB). They also
provide common mode input ability beyond the supply rails,
as well as rail-to-rail output capability. This enables these
amplifiers to offer maximum dynamic range at any supply
voltage.
• Unity-gain stable
• Beyond the rails input capability
• Rail-to-rail output swing
• ±180mA output short current
• Pb-Free plus anneal available (RoHS compliant)
The EL5611 and EL5811 also feature fast slewing and
settling times, as well as a high output drive capability of
Applications
• TFT-LCD panels
65mA (sink and source). In addition to V
applications,
COM
these features make these amplifiers ideal for high speed
filtering and signal conditioning application. Other
applications include battery power, portable devices, and
anywhere low power consumption is important.
• V
COM
amplifiers
• Drivers for A-to-D converters
• Data acquisition
The EL5611 is available in 8-pin MSOP and 8-pin HMSOP
packages. The EL5811 is available in space-saving 28-pin
HTSSOP packages.These amplifiers operate over a
temperature range of -40°C to +85°C.
• Video processing
• Audio processing
• Active filters
• Test equipment
• Battery-powered applications
• Portable equipment
Ordering Information (Continued)
Ordering Information
TAPE &
TAPE &
PART NUMBER
PACKAGE
REEL
PKG. DWG. #
PART NUMBER
EL5611IRE
PACKAGE
REEL
PKG. DWG. #
MDP0048
MDP0048
MDP0048
MDP0048
EL5811IREZ-T13 28-Pin HTSSOP
(See Note) (Pb-Free)
13”
MDP0048
24-Pin HTSSOP
24-Pin HTSSOP
24-Pin HTSSOP
-
7”
13”
-
EL5611IRE-T7
EL5611IRE-T13
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
EL5811IREZ
(See Note)
28-Pin HTSSOP
(Pb-free)
EL5811IREZ-T7
(See Note)
28-Pin HTSSOP
(Pb-free)
7”
13”
-
MDP0048
MDP0048
MDP0048
MDP0048
EL5811IREZ-T13 28-Pin HTSSOP
(See Note)
(Pb-free)
EL5811IREZ
(See Note)
28-Pin HTSSOP
(Pb-Free)
EL5811IREZ-T7
(See Note)
28-Pin HTSSOP
(Pb-Free)
7”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved
1
All other trademarks mentioned are the property of their respective owners.
EL5611, EL5811
Pinouts
EL5611
(24-PIN HTSSOP)
TOP VIEW
EL5811
(28-PIN HTSSOP)
TOP VIEW
VINH+
VINH-
VOUTH
VOUTG
VING-
VING+
VSS
VOUTA
VINA-
VINA+
VSS
VDD
VDD
VINA+
VINA-
1
2
24
1
2
28
VOUTF
VINF-
23
22
21
20
19
18
17
16
15
14
13
27
26
25
24
23
22
21
20
19
18
17
16
15
3
3
VINF+
VOUTE
VINE-
VINE+
VSS
VOUTA
VOUTB
VINB-
4
4
VOUTB
VINB-
VINB+
VDD
5
5
6
6
VINB+
VINC+
VINC-
7
7
VSS
8
8
VINF+
VINF-
VINC+
VINC-
VOUTC
NC
VOUTD+
VOUTD-
VOUTD
NC
9
9
VOUTC
VOUTD
VIND-
10
11
12
10
11
12
13
14
VOUTF
VOUTE
VINE-
VINE+
VIND+
VDD
FN7355.1
2
August 3, 2005
EL5611, EL5811
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage between V + and V -. . . . . . . . . . . . . . . . . . . .+18V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
S
S
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . V - - 0.5V, V +0.5V
S
S
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 65mA
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = -5V, R = 1kΩ to 0V, T = 25°C, Unless Otherwise Specified
S
S
L
A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
15
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 0V
= 0V
3
7
2
1
2
mV
µV/°C
nA
OS
TCV
CM
CM
Average Offset Voltage Drift (Note 1)
Input Bias Current
OS
I
V
60
B
R
Input Impedance
GΩ
pF
IN
IN
C
Input Capacitance
CMIR
Common-Mode Input Range
Common-Mode Rejection Ratio
Open-Loop Gain
-5.5
50
+5.5
V
CMRR
for V from -5.5V to 5.5V
IN
70
70
dB
A
-4.5V ≤ V
≤ 4.5V
OUT
62
dB
VOL
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
Output Swing High
Short-Circuit Current
Output Current
I = -5mA
-4.92
4.92
±180
±65
-4.85
V
V
OL
L
I = 5mA
4.85
60
OH
L
I
I
mA
mA
SC
OUT
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current (Per Amplifier)
DYNAMIC PERFORMANCE
SR Slew Rate (Note 2)
V
is moved from ±2.25V to ±7.75V
80
dB
S
I
No load
2.5
3.75
mA
S
-4.0V ≤ V
≤ 4.0V, 20% to 80%
75
80
V/µs
ns
OUT
t
Settling to +0.1% (A = +1)
V
(A = +1), V = 2V step
S
V
O
BW
-3dB Bandwidth
60
MHz
MHz
°
GBWP
PM
Gain-Bandwidth Product
Phase Margin
32
50
CS
Channel Separation
Differential Gain (Note 3)
Differential Phase (Note 3)
f = 5MHz
110
0.17
0.24
dB
%
d
d
R
R
= R = 1kΩ and V
= 1.4V
= 1.4V
G
P
F
F
G
OUT
OUT
= R = 1kΩ and V
°
G
NOTES:
1. Measured over operating temperature range.
2. Slew rate is measured on rising and falling edges.
3. NTSC signal generator used.
FN7355.1
3
August 3, 2005
EL5611, EL5811
Electrical Specifications V + = +5V, V - = 0V, R = 1kΩ to 2.5V, T = 25°C, Unless Otherwise Specified
S
S
L
A
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
15
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
V
= 2.5V
= 2.5V
3
7
2
1
2
mV
µV/°C
nA
OS
TCV
CM
Average Offset Voltage Drift (Note 4)
Input Bias Current
OS
I
60
B
CM
R
Input Impedance
GΩ
pF
IN
IN
C
Input Capacitance
CMIR
Common-Mode Input Range
Common-Mode Rejection Ratio
Open-Loop Gain
-0.5
45
+5.5
150
V
CMRR
for V from -0.5V to 5.5V
IN
66
70
dB
A
0.5V ≤ V
≤ 4.5V
OUT
62
dB
VOL
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
Output Swing High
Short-circuit Current
Output Current
I = -5mA
80
mV
V
OL
L
I = 5mA
4.85
60
4.92
±180
±65
OH
L
I
I
mA
mA
SC
OUT
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current (Per Amplifier)
DYNAMIC PERFORMANCE
SR Slew Rate (Note 5)
V
is moved from 4.5V to 15.5V
80
dB
S
I
No load
2.5
3.75
mA
S
1V ≤ V
≤ 4V, 20% to 80%
75
80
V/µs
ns
OUT
t
Settling to +0.1% (A = +1)
V
(A = +1), V = 2V step
S
V
O
BW
-3dB Bandwidth
60
MHz
MHz
°
GBWP
PM
Gain-Bandwidth Product
Phase Margin
32
50
CS
Channel Separation
Differential Gain (Note 6)
Differential Phase (Note 6)
f = 5MHz
110
0.17
0.24
dB
%
d
d
R
R
= R = 1kΩ and V
= 1.4V
= 1.4V
G
P
F
F
G
OUT
OUT
= R = 1kΩ and V
°
G
NOTES:
4. Measured over operating temperature range.
5. Slew rate is measured on rising and falling edges.
6. NTSC signal generator used.
FN7355.1
4
August 3, 2005
EL5611, EL5811
Electrical Specifications V + = +15V, V - = 0V, R = 1kΩ to 7.5V, T = 25°C, Unless Otherwise Specified
S
S
L
A
PARAMETER
DESCRIPTION
CONDITION
MIN
TYP
MAX
15
UNIT
INPUT CHARACTERISTICS
V
Input Offset Voltage
V
= 7.5V
= 7.5V
3
7
2
1
2
mV
µV/°C
nA
OS
TCV
CM
Average Offset Voltage Drift (Note 7)
Input Bias Current
OS
I
V
60
B
CM
R
C
Input Impedance
GΩ
pF
IN
IN
Input Capacitance
CMIR
Common-Mode Input Range
Common-Mode Rejection Ratio
Open-Loop Gain
-0.5
53
+15.5
150
V
CMRR
for V from -0.5V to 15.5V
IN
72
70
dB
A
0.5V ≤ V
≤ 14.5V
OUT
62
dB
VOL
OUTPUT CHARACTERISTICS
V
V
Output Swing Low
Output Swing High
Short-circuit Current
Output Current
I = -5mA
80
mV
V
OL
L
I = 5mA
14.85
60
14.92
±180
±65
OH
L
I
I
mA
mA
SC
OUT
POWER SUPPLY PERFORMANCE
PSRR Power Supply Rejection Ratio
Supply Current (Per Amplifier)
DYNAMIC PERFORMANCE
SR Slew Rate (Note 8)
V
is moved from 4.5V to 15.5V
80
dB
S
I
No load
2.5
3.75
mA
S
1V ≤ V
≤ 14V, 20% to 80%
75
80
V/µs
ns
OUT
t
Settling to +0.1% (A = +1)
V
(A = +1), V = 2V step
S
V
O
BW
-3dB Bandwidth
60
MHz
MHz
°
GBWP
PM
Gain-Bandwidth Product
Phase Margin
32
50
CS
Channel Separation
Differential Gain (Note 9)
Differential Phase (Note 9)
f = 5MHz
110
0.16
0.22
dB
%
d
d
R
R
= R = 1kΩ and V
= 1.4V
= 1.4V
G
P
F
F
G
OUT
OUT
= R = 1kΩ and V
°
G
NOTES:
7. Measured over operating temperature range
8. Slew rate is measured on rising and falling edges
9. NTSC signal generator used
FN7355.1
5
August 3, 2005
EL5611, EL5811
Typical Performance Curves
500
25
20
15
10
5
V =±5V
TYPICAL
V =±5V
TYPICAL
S
S
T =25°C
PRODUCTION
DISTRIBUTION
PRODUCTION
DISTRIBUTION
A
400
300
200
100
0
0
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE DRIFT, TCV
(µV/°C)
OS
FIGURE 1. INPUT OFFSET VOLTAGE DISTRIBUTION
FIGURE 2. INPUT OFFSET VOLTAGE DRIFT
2
1.5
1
0.008
V =±5V
S
0.004
0
0.5
0
-0.004
-0.008
-0.012
-0.5
-50
-10
30
70
110
150
-50
-10
30
70
110
150
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE
4.96
FIGURE 4. INPUT BIAS CURRENT vs TEMPERATURE
-4.85
V =±5V
V =±5V
S
S
I
=5mA
OUT
I
=5mA
OUT
-4.87
-4.89
-4.91
-4.93
-4.95
4.94
4.92
4.90
4.88
4.86
-50
-10
30
70
110
150
-50
-10
30
70
110
150
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 5. OUTPUT HIGH VOLTAGE vs TEMPERATURE
FIGURE 6. OUTPUT LOW VOLTAGE vs TEMPERATURE
FN7355.1
August 3, 2005
6
EL5611, EL5811
Typical Performance Curves (Continued)
75
78
77
76
75
74
73
72
V =±5V
V =±5V
S
S
R =1kΩ
L
70
65
60
-50
-10
30
70
110
150
-50
-10
30
70
110
150
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 7. OPEN-LOOP GAIN vs TEMPERATURE
2.9
FIGURE 8. SLEW RATE vs TEMPERATURE
2.7
T =25°C
V =±5V
S
A
2.7
2.5
2.3
2.1
1.9
1.7
1.5
2.65
2.6
2.55
2.5
2.45
2.4
4
8
12
16
20
-50
-10
30
70
110
150
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 9. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY
VOLTAGE
FIGURE 10. SUPPLY CURRENT PER AMPLIFIER vs
TEMPERATURE
0
-0.02
-0.04
-0.06
-0.08
-0.1
0.3
0.25
0.2
0.15
0.1
-0.12
-0.14 V =±5V
S
0.05
0
A =2
V
-0.16
-0.18
R =1kΩ
L
0
100
IRE
200
0
100
IRE
200
FIGURE 11. DIFFERENTIAL GAIN
FIGURE 12. DIFFERENTIAL PHASE
FN7355.1
August 3, 2005
7
EL5611, EL5811
Typical Performance Curves (Continued)
-30
80
60
40
20
0
250
190
130
70
V =±5V
S
A =2
-40
-50
-60
-70
-80
-90
V
R =1kΩ
L
GAIN
FREQ=1MHz
2nd HD
PHASE
10
3rd HD
4
-20
-50
0
2
6
8
10
1K
10K
100K
1M
10M
100M
V
(V)
FREQUENCY (Hz)
OP-P
FIGURE 13. HARMONIC DISTORTION vs V
FIGURE 14. OPEN LOOP GAIN AND PHASE
25
OP-P
5
V =±5V
S
100pF
A =1
V
1000pF
15
C
=0pF
3
1
LOAD
1kΩ
47pF
10pF
5
-5
-1
-3
-5
560Ω
150Ω
V =±5V
S
-15
-25
A =1
V
R =1kΩ
L
100K
1M
10M
100M
100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS R
FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS C
L
L
400
350
300
250
200
150
100
50
12
10
8
6
4
V =±5V
S
A =1
V
2
R =1kΩ
L
DISTORTION <1%
0
0
10K
100K
1M
10M
100M
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (kHz)
FIGURE 17. CLOSED LOOP OUTPUT IMPEDANCE
FIGURE 18. MAXIMUM OUTPUT SWING vs FREQUENCY
FN7355.1
August 3, 2005
8
EL5611, EL5811
Typical Performance Curves (Continued)
-15
-25
-35
-45
-55
-65
-80
-60
-40
-20
0
PSRR+
PSRR-
V =±5V
S
T =25°C
A
1K
10K
100K
1M
10M
100M
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 19. CMRR
FIGURE 20. PSRR
-60
-80
1K
DUAL MEASURED CH A TO B
QUAD MEASURED CH A TO D OR B TO C
OTHER COMBINATIONS YIELD
IMPROVED REJECTION
100
10
1
-100
-120
-140
-160
V =±5V
S
R =1kΩ
L
A =1
V
IN
V
=110mV
RMS
100
1K
10K
100K
1M
10M
100M
1K
10K
100K
FREQUENCY (Hz)
1M
10M
30M
FREQUENCY (Hz)
FIGURE 21. INPUT VOLTAGE NOISE SPECTRAL DENSITY
100
FIGURE 22. CHANNEL SEPARATION
5
4
3
2
1
V =±5V
S
V =±5V
S
A =1
V
A =1
V
R =1kΩ
R =1kΩ
L
80
60
40
20
0
L
0.1%
V
=±50mV
IN
T =25°C
A
0
-1
-2
-3
-4
-5
0.1%
10
100
1K
55
65
75
85
95
105
LOAD CAPACITANCE (pF)
SETTLING TIME (ns)
FIGURE 23. SMALL-SIGNAL OVERSHOOT vs LOAD
CAPACITANCE
FIGURE 24. SETTLING TIME vs STEP SIZE
FN7355.1
August 3, 2005
9
EL5611, EL5811
Typical Performance Curves (Continued)
V =±5V
S
V =±5V
S
T =25°C
A
T =25°C
A
A =1
V
A =1
V
R =1kΩ
R =1kΩ
L
L
100mV STEP
1V STEP
50ns/DIV
50ns/DIV
FIGURE 25. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 26. SMALL SIGNAL TRANSIENT RESPONSE
Pin Descriptions
EL5611
EL5811
NAME
FUNCTION
Amplifiers output
EQUIVALENT CIRCUIT
1, 5, 9, 14, 20, 23 4, 5, 10, 11, 17,
18, 25, 26
VOUTx
V
S+
V
S-
GND
CIRCUIT 1
2, 3, 6, 7, 9, 10, 2, 3, 6, 7, 8, 9, 12.
VINx
Amplifiers input
V
V
S+
S-
15, 16, 21, 22
13, 15, 16, 19, 20,
23, 24, 27, 28
CIRCUIT 2
8, 24
24, 17
12, 13
1, 14
VS+
VS-
NC
Positive power supply
Negative power supply
Not connected
21, 22
FN7355.1
10
August 3, 2005
EL5611, EL5811
continuous current never exceeds ±65mA. This limit is set by
Applications Information
Product Description
the design of the internal metal interconnects.
Output Phase Reversal
The EL5611 and EL5811 voltage feedback amplifiers are
fabricated using a high voltage CMOS process. They exhibit
rail-to-rail input and output capability, are unity gain stable
and have low power consumption (2.5mA per amplifier).
These features make the EL5611, and EL5811 ideal for a
wide range of general-purpose applications. Connected in
voltage follower mode and driving a load of 1kΩ, the EL5611
and EL5811 have a -3dB bandwidth of 60MHz while
maintaining a 75V/µs slew rate. The EL5611 a six channel
amplifier, and the EL5811 an 8 channel amplifier.
The EL5611 and EL5811 are immune to phase reversal as
long as the input voltage is limited from V - -0.5V to V +
S
S
+0.5V. Figure 28 shows a photo of the output of the device
with the input voltage driven beyond the supply rails.
Although the device's output will not change phase, the
input's overvoltage should be avoided. If an input voltage
exceeds supply voltage by more than 0.6V, electrostatic
protection diodes placed in the input stage of the device
begin to conduct and overvoltage damage could occur.
Operating Voltage, Input, and Output
V
= ±2.5V, T = 25°C, A = 1, V = 6V
IN P-P
S
A
V
The EL5611and EL5811 are specified with a single nominal
supply voltage from 5V to 15V or a split supply with its total
range from 5V to 15V. Correct operation is guaranteed for a
supply range of 4.5V to 16.5V. Most EL5611 and EL5811
specifications are stable over both the full supply range and
operating temperatures of -40°C to +85°C. Parameter
variations with operating voltage and/or temperature are
shown in the typical performance curves.
1V
10µs
The input common-mode voltage range of the EL5611 and
EL5811 extends 500mV beyond the supply rails. The output
swings of the EL5611 and EL5811 typically extend to within
100mV of positive and negative supply rails with load
currents of 5mA. Decreasing load currents will extend the
output voltage range even closer to the supply rails. Figure
27 shows the input and output waveforms for the device in
the unity-gain configuration. Operation is from ±5V supply
1V
FIGURE 28. OPERATION WITH BEYOND-THE-RAILS INPUT
Power Dissipation
With the high-output drive capability of the EL5611 and
EL5811 amplifiers, it is possible to exceed the 125°C
'absolute-maximum junction temperature' under certain load
current conditions. Therefore, it is important to calculate the
maximum junction temperature for the application to
determine if load conditions need to be modified for the
amplifier to remain in the safe operating area.
with a 1kΩ load connected to GND. The input is a 10V
P-P
sinusoid. The output voltage is approximately 9.8V
.
P-P
V
= ±5V, T = 25°C, A = 1, V = 10V
IN P-P
S
A
V
5V
10µs
The maximum power dissipation allowed in a package is
determined according to:
T
– T
AMAX
JMAX
--------------------------------------------
P
=
DMAX
Θ
JA
where:
5V
• T
• T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
AMAX
FIGURE 27. OPERATION WITH RAIL-TO-RAIL INPUT AND
OUTPUT
• Θ = Thermal resistance of the package
JA
• P
DMAX
= Maximum power dissipation in the package
Short Circuit Current Limit
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
The EL5611 and EL5811 will limit the short circuit current to
±180mA if the output is directly shorted to the positive or the
negative supply. If an output is shorted indefinitely, the power
dissipation could easily increase such that the device may
be damaged. Maximum reliability is maintained if the output
P
= Σi[V × I
+ (V + – V
i) × I
i]
LOAD
DMAX
S
SMAX
S
OUT
FN7355.1
11
August 3, 2005
EL5611, EL5811
when sourcing, and:
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
P
= Σi[V × I
+ (V
i – V -) × I
i]
LOAD
DMAX
S
SMAX
OUT
S
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
909mW
when sinking,
where:
833mW
HTSSOP28
JA
θ
=110°C/W
• i = 1 to 6 for EL5611 and 1 to 8 for EL5811
• V = Total supply voltage
HTSSOP24
=120°C/W
θ
JA
S
• I
= Maximum supply current per amplifier
i = Maximum output voltage of the application
i = Load current
SMAX
• V
• I
OUT
0
25
50
75 85 100
125
150
LOAD
AMBIENT TEMPERATURE (°C)
If we set the two P
equations equal to each other, we
DMAX
i to avoid device overheat. Figures 29
can solve for R
LOAD
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
and 30 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be
found graphically, based on the package type and the
ambient temperature. By using the previous equation, it is a
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and
a quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
simple matter to see if P
exceeds the device's power
DMAX
derating curves. To ensure proper operation, it is important
to observe the recommended derating curves shown in
Figures 29 & 30.
Power Supply Bypassing and Printed Circuit
Board Layout
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - HTSSOP
EXPOSED DIEPAD SOLDERED TO PCB PER
JESD51-5
The EL5611 and EL5811 can provide gain at high frequency.
As with any high-frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended, lead lengths
should be as short as possible and the power supply pins
must be well bypassed to reduce the risk of oscillation. For
3.5
3.333W
3
3.030W
2.5
HTSSOP28
θ
=30°C/W
2
1.5
1
JA
normal single supply operation, where the V - pin is
S
HTSSOP24
=33°C/W
connected to ground, a 0.1µF ceramic capacitor should be
θ
JA
placed from V + to pin to V - pin. A 4.7µF tantalum
S
S
capacitor should then be connected in parallel, placed in the
region of the amplifier. One 4.7µF capacitor may be used for
multiple devices. This same capacitor combination should be
placed at each supply pin to ground if split supplies are to be
used.
0.5
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 29. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7355.1
12
August 3, 2005
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