HA-2546/883 [INTERSIL]
Wideband Two Quadrant Analog Multiplier (Voltage Output); 宽带两个象限模拟乘法器(电压输出)型号: | HA-2546/883 |
厂家: | Intersil |
描述: | Wideband Two Quadrant Analog Multiplier (Voltage Output) |
文件: | 总19页 (文件大小:537K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HA2546/883
Wideband Two Quadrant Analog
Multiplier (Voltage Output)
July 1994
Features
Description
• This Circuit is Processed in Accordance to MIL-STD- The HA-2546/883 is a monolithic, high speed, two quadrant,
883 and is Fully Conformant Under the Provisions of analog multiplier constructed in the Intersil Dielectrically Iso-
Paragraph 1.2.1.
lated High Frequency Process. The HA-2546/883 has a volt-
age output with a 30MHz signal bandwidth, 300V/µs slew
rate and a 17MHz control input bandwidth. High bandwidth
and slew rate make this part an ideal component for use in
video systems. The suitability for precision video applica-
tions is demonstrated further by the 0.1dB gain flatness at
5MHz, 1.6% multiplication error, -52dB feedthrough and dif-
ferential inputs with 1.2µA bias currents. The HA-2546/883
also has low differential gain (0.1% typ.) and phase (0.1o
typ.) errors.
• High Speed Voltage Output. . . . . . . . . . . 300V/µs (Min)
• Low Multiplication Error . . . . . . . . . . . . . . . .3.0% (Max)
1.6% (Typ)
• Input Bias Currents . . . . . . . . . . . . . . . . . . . . 5µA (Max)
1.2µA (Typ)
• Signal Input Feedthrough . . . . . . . . . . . . . .-52dB (Typ)
• Wide Signal Bandwidth . . . . . . . . . . . . . . . 30MHz (Typ)
• Wide Control Bandwidth . . . . . . . . . . . . . . 17MHz (Typ)
• Gain Flatness to 5MHz. . . . . . . . . . . . . . . . 0.10dB (Typ)
The HA-2546/883 is well suited for AGC circuits as well as
mixer applications for sonar, radar, and medical imaging
equipment. The voltage output of the HA-2546/883 simplifies
many designs by eliminating the current-to-voltage conver-
sion stage required for current output multipliers.
Applications
• Military Avionics
Ordering Information
• Missile Guidance Systems
• Medical Imaging Displays
• Video Mixers
TEMPERATURE
PART NUMBER
HA1-2546/883
HA4-2546/883
RANGE
PACKAGE
o
o
-55 C to +125 C 16 Lead CerDIP
• Sonar AGC Processors
• Radar Signal Conditioning
• Voltage Controlled Amplifier
• Vector Generator
o
o
-55 C to +125 C 20 Lead Ceramic LCC
Pinouts
HA-2546/883
(CERDIP)
HA-2546/883
(CLCC)
TOP VIEW
TOP VIEW
GND
VREF
1
2
3
4
5
6
7
8
16 GA A
15 GA C
14 GA B
13 VX+
12 VX-
REF
3
2
1
20 19
VYIO
B
+
GA B
VX+
18
17
VYIO
B
4
5
6
7
8
VYIO
A
X
Z
+
VYIO
A
VY+
VY-
-
-
Y
11 V+
16 NC
15 VX-
NC
VY+
VY-
-
+
Σ
10 VZ-
V-
-
9
VZ+
VOUT
+
V+
14
9
10 11 12 13
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 511050-883
File Number 2444.1
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 19998-3
Specifications HA2546/883
Absolute Maximum Ratings
Thermal Information
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60mA
Thermal Resistance
CerDIP Package . . . . . . . . . . . . . . . . . . . . . 80 C/W
Ceramic LCC. . . . . . . . . . . . . . . . . . . . . . . . 61 C/W
Maximum Package Power Dissipation
CerDIP Package at +75 C. . . . . . . . . . . . . . . . . . . . . . . . . . 1.25W
Ceramic LCC Package at +75 C. . . . . . . . . . . . . . . . . . . . . 1.64W
Package Power Dissipation Derating Factor above +75 C
CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12mW/ C
θ
θ
JA
JC
o
o
25 C/W
o
o
12 C/W
o
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C
o
o
o
Storage Temperature Range . . . . . . . . . . . . . .-65 C ≤ T ≤ +150 C
A
o
ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2000V
o
o
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300 C
o
o
Ceramic LCC Package . . . . . . . . . . . . . . . . . . . . . . . . . 16mW/ C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
o
o
Operating Temperature Range. . . . . . . . . . . . . . . . -55 C to +125 C Operating Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . ±8V to ±15V
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: V
= ±15V, R
= 1kΩ, C = 50pF, Unless Otherwise Specified.
LOAD
SUPPLY
LOAD
GROUP A
SUBGROU
LIMITS
PARAMETERS
SYMBOL
CONDITIONS
PS
TEMPERATURE MIN MAX UNITS
o
Multiplication Error
ME
V
= ±5V
1
+25 C
o
-3
-5
-5
-5
5
3
5
%FS
%FS
%
Y
o
2, 3
1
+125 C, -55 C
o
Scale Factor Error
SF
+25 C
5
o
o
2, 3
1
+125 C, -55 C
5
%
o
Common Mode Range
+CMR
-CMR
+25 C
-
V
o
o
2, 3
1
+125 C, -55 C
5
-
V
o
+25 C
-
-5
-5
10
15
15
20
2
V
o
o
2, 3
1
+125 C, -55 C
-
V
o
Input Offset Voltage (V )
V
(V )
V
V
V
V
V
V
V
V
V
V
V
V
V
= 0V
= 0V
= 0V
+25 C
-10
-15
-15
-20
-2
-3
60
60
60
60
-2
-15
-2
-5
-2
-3
-15
-15
5
mV
mV
µA
µA
µA
µA
dB
dB
dB
dB
mV
mV
µA
µA
µA
µA
mV
mV
V
Y
IO
Y
CM
CM
CM
o
o
2, 3
1
+125 C, -55 C
o
Input Bias Current (V )
I (V )
+25 C
Y
B
Y
o
o
2, 3
1
+125 C, -55 C
o
Input Offset Current (V )
I
(V )
+25 C
Y
IO
Y
o
o
2, 3
1
+125 C, -55 C
3
o
Common Mode (V )
+CMRR(V )
= 0 to +5V, V = +2V
+25 C
-
Y
Y
Y
X
o
o
Rejection Ratio
2, 3
1
+125 C, -55 C
-
o
-CMRR(V )
= 0 to -5V, V = +2V
+25 C
-
Y
Y
X
o
o
2, 3
1
+125 C, -55 C
-
o
Input Offset Voltage (V )
V
(V )
= 0V
= 0V
= 0V
+25 C
2
X
IO
X
CM
CM
CM
o
o
2, 3
1
+125 C, -55 C
15
2
o
Input Bias Current (V )
I (V )
+25 C
X
B
X
o
o
2, 3
1
+125 C, -55 C
5
o
Input Offset Current (V )
I
(V )
+25 C
2
X
IO
X
o
o
2, 3
1
+125 C, -55 C
3
o
Input Offset Voltage (V )
V
(V )
= 0V, V = 0V
+25 C
15
15
-
Z
IO
Z
X
Y
Y
Y
Y
Y
o
o
2, 3
1
+125 C, -55 C
o
Output Voltage Swing
+V
= +5V, V = +2.5V
+25 C
OUT
OUT
OUT
OUT
X
o
o
2, 3
1
+125 C, -55 C
5
-
V
o
-V
= -5V, V = +2.5V
+25 C
-
-5
-5
-
V
X
o
o
2, 3
1
+125 C, -55 C
-
V
o
Output Current
+I
= +5V, V = +2.5V
+25 C
20
20
-
mA
mA
mA
mA
X
o
o
2, 3
1
+125 C, -55 C
-
o
-I
= -5V, V = +2.5V
+25 C
-20
-20
X
o
o
2, 3
+125 C, -55 C
-
Spec Number 511050-883
8-4
Specifications HA2546/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: V
= ±15V, R
= 1kΩ, C = 50pF, Unless Otherwise Specified.
LOAD
SUPPLY
LOAD
GROUP A
SUBGROU
LIMITS
PARAMETERS
SYMBOL
CONDITIONS
PS
TEMPERATURE MIN MAX UNITS
o
Power Supply Rejection
Ratio
+PSRR
∆ V = 3V, V+ = +15V, V- = -15V,
V+ = +12V, V- = -15V
1
+25 C
o
58
58
58
58
29
29
-
-
dB
dB
S
o
2, 3
1
+125 C, -55 C
-
o
-PSRR
∆ V = 3V, V+ = +15V, V- = -15V,
+25 C
-
-
dB
S
o
o
V+ = +15V, V- = -12V
2, 3
1
+125 C, -55 C
dB
o
Quiescent Power Supply
Current
+I
V
= V = 0V, I
= 0mA
+25 C
-
mA
mA
mA
mA
CC
X
X
Y
OUT
o
o
2, 3
1
+125 C, -55 C
-
o
-I
V
= V = 0V, I
= 0mA
+25 C
-29
-29
CC
Y
OUT
o
o
2, 3
+125 C, -55 C
-
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Table 2 Intentionally Left Blank. See AC Specifications in Table 3.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
= ±15V, R = 1kΩ, C = 50pF, Unless Otherwise Specified.
Device Tested at: V
SUPPLY
LOAD
LOAD
LIMITS
PARAMETER
Slew Rate
SYMBOL
CONDITIONS
= -5V to +5V, V = 2V
NOTES
TEMPERATURE
MIN
MAX
UNITS
V/µs
V/µs
V/µs
V/µs
ns
o
+SR
V
V
1
1
+25 C
300
-
OUT
OUT
OUT
X
DC
DC
o
o
+125 C, -55 C
300
-
o
-SR
TR
= +5V to -5V, V = 2V
1
+25 C
300
-
X
o
o
1
+125 C, -55 C
300
-
o
Rise and Fall Time
Overshoot
V
V
= -100mV to +100mV
1, 3
1, 3
1, 3
1, 3
1
+25 C
-
15
17
15
17
30
30
30
30
-
= 2V
o
o
X
DC
+125 C, -55 C
-
ns
o
TF
V
V
= +100mV to -100mV
+25 C
-
ns
OUT
X
= 2V
o
o
DC
+125 C, -55 C
-
ns
o
+OS
-OS
FPBW
V
V
= -100mV to +100mV
+25 C
-
-
%
OUT
= 2V
o
o
X
DC
1
+125 C, -55 C
%
o
V
V
= +100mV to -100mV
1
+25 C
-
%
OUT
X
= 2V
o
o
DC
1
+125 C, -55 C
-
%
o
Full Power Bandwidth
NOTES:
V
= 5V, V = 2V
DC
1, 2
1, 2
+25 C
9.5
9.5
MHz
MHz
PEAK
X
o
o
+125 C, -55 C
-
1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These param-
eters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization
based upon data from multiple production runs which reflect lot to lot and within lot variation.
2. Full Power Bandwidth guarantee based on Slew Rate measurement using FPBW = Slew Rate/(2πV
).
PEAK
3. Measured between 10% and 90% points.
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
Interim Electrical Parameters (Pre Burn-in)
Final Electrical Test Parameters
Group A Test Requirements
SUBGROUPS (SEE TABLE 1)
1
1(Note 1), 2, 3
1, 2, 3
Groups C and D Endpoints
1
NOTE:
1. PDA applies to Subgroup 1 only.
Spec Number 511050-883
8-5
HA2546/883
Die Characteristics
DIE DIMENSIONS:
79.9mils x 119.7mils x 19mils ± 1mils
METALLIZATION:
Type: Al, 1%Cu
Thickness: 16kÅ ± 2kÅ
GLASSIVATION:
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos)
Silox Thickness: 12kÅ ± 1.5kÅ
Nitride Thickness: 3.5kÅ ± 1.5kÅ
WORST CASE CURRENT DENSITY:
0.72 x 105 A/cm2
TRANSISTOR COUNT: 87
Metallization Mask Layout
HA-2546/883
VREF GND
GA A GA C
(2)
(1)
(16)
(15)
(14) GA B
(13) VX+
V
YIOB (3)
VYIO
A
(4)
VY+ (5)
(12) VX-
VY- (6)
(11) V+
(7)
V-
(8)
(9)
(10)
VZ-
VOUT
VZ+
Spec Number 511050-883
8-6
Specifications HA2546/883
Test Circuit
L
MSR
H
GADJA
GND
VREF
M2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GADJC
GADJB
K5
K6
VADJB
V2
V1
K3
K4
K1
K2
V2
VADJA
VY+
VX+
VX-
VCC
VZ-
DUT
VY-
+15V
K9
10
0.001
VEE
- 15V
K7A
µF
µF
VOUT
VZ+
10
µF
1000
pF
1000
pF
0.001
µF
50Ω
50Ω
K8
K11
K10
1K
K7B
1K
25
µF
50Ω
100Ω
50pF
M1
For Detailed Information, Refer to HA-2546/883 Test Tech Brief
LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT
Test Waveforms
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
REF
NC
NC
NC
+
VX
V+
+
X
Z
+
VY
+
-
-
Y
-
+
Σ
V-
-
+
VOUT
50Ω
1K
50pF
Spec Number 511050-883
8-7
HA2546/883
Test Waveforms (Continued)
V
LARGE SIGNAL RESPONSE
V SMALL SIGNAL RESPONSE
Y
Y
Vertical Scale: 5V/Div. Horizontal Scale: 50ns/Div.
Vertical Scale: 100mV/Div. Horizontal Scale: 50ns/Div.
100mV
IN
+5V
IN
0
0
-5V
-100mV
+5V
100mV
OUT
0
OUT
0
-5V
-100mV
V
LARGE SIGNAL RESPONSE
V SMALL SIGNAL RESPONSE
X
X
Vertical Scale: 2V/Div. Horizontal Scale: 50ns/Div.
Vertical Scale: 200mV/Div. Horizontal Scale: 50ns/Div.
2V
0
200mV
0
IN
IN
500mV
5V
0
OUT
OUT
0
Spec Number 511050-883
8-8
HA2546/883
Burn-In Circuits
HA-2546/883 CERDIP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V+
D1
D2
V-
C2
C1
NOTES:
C1 = 0.01µF/Socket Min.
C2 = 0.01µF/Socket Min.
D1 = D2 = IN4002 or Equivalent/Board
(V+) - (V-) = 31V ± 1V
HA-2546/883 CERAMIC LCC
3
2
1
20 19
GA B
VX+
18
17
VYIO
B
4
5
6
7
8
VYIO
A
16 NC
NC
VY+
VX-
15
V+
14
VY-
+V
9
10 11 12 13
C1
D1
C2
D2
-V
NOTES:
C1 = C2 = 0.01µF/Socket Min.
D1 = D2 = IN4002 or Equivalent/Board
(V+) - (V-) = 31V ± 1V
Spec Number 511050-883
8-9
HA2546/883
Simplified Schematic
V +
VBIAS
VBIAS
+
+
VX
-
VX
+
VZ
+
VZ -
-
-
GA A
GA B
REF
GA C
OUT
1.67kΩ
VY
+
VY -
GND
V -
VYIO
A
VYIO B
Spec Number 511050-883
8-10
HA2546/883
Packaging
F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A)
16 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE
INCHES MILLIMETERS
MIN
c1 LEAD FINISH
-D-
E
-A-
-B-
BASE
METAL
SYMBOL
MAX
0.200
0.026
0.023
0.065
0.045
0.018
0.015
0.840
0.310
MIN
-
MAX
5.08
0.66
0.58
1.65
1.14
0.46
0.38
21.34
7.87
NOTES
(c)
A
b
-
-
2
3
-
b1
0.014
0.014
0.045
0.023
0.008
0.008
-
0.36
0.36
1.14
0.58
0.20
0.20
-
M
M
b1
b2
b3
c
(b)
SECTION A-A
S
S
S
D
bbb
C A - B
D
4
2
3
5
5
-
BASE
PLANE
Q
c1
D
A
-C-
SEATING
PLANE
L
α
E
0.220
5.59
S1
e
0.100 BSC
2.54 BSC
eA
A A
e
b2
eA
eA/2
L
0.300 BSC
0.150 BSC
7.62 BSC
3.81 BSC
-
eA/2
b
c
-
0.125
0.200
3.18
5.08
-
M
S
S
M
S
S
D
ccc
C A - B
D
aaa
C A - B
Q
0.015
0.005
0.005
0.060
0.38
0.13
0.13
1.52
6
7
-
NOTES:
S1
S2
-
-
-
-
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
o
o
o
o
90
105
90
105
-
α
aaa
bbb
ccc
M
-
-
-
-
0.015
0.030
0.010
0.0015
-
-
-
-
0.38
0.76
0.25
0.038
-
-
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
-
2
8
N
16
16
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b1.
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling Dimension: Inch.
11. Materials: Compliant to MIL-I-38535.
Spec Number 511050-883
8-11
HA2546/883
Packaging (Continued)
J20.A MIL-STD-1835 CQCC1-N20 (C-2)
20 PAD METAL SEAL LEADLESS CERAMIC CHIP CARRIER
D
D3
INCHES MILLIMETERS
MIN
j x 45o
SYMBOL
A
MAX
0.100
0.088
-
MIN
1.52
1.27
-
MAX
2.54
2.23
-
NOTES
0.060
0.050
-
6, 7
7
4
2, 4
-
A1
B
E3
E
B1
B2
B3
D
0.022
0.028
0.56
0.71
B
0.072 REF
1.83 REF
0.006
0.342
0.022
0.358
0.15
8.69
0.56
9.09
-
-
D1
D2
D3
E
0.200 BSC
0.100 BSC
5.08 BSC
2.54 BSC
-
h x 45o
-
-
0.358
0.358
-
9.09
9.09
2
-
A
A1
0.342
8.69
E1
E2
E3
e
0.200 BSC
0.100 BSC
0.358
0.050 BSC
0.015
5.08 BSC
2.54 BSC
9.09
1.27 BSC
0.38
1.02 REF
0.51 REF
-
PLANE 2
PLANE 1
-
-
-
2
-
e1
h
-
-
2
5
5
-
0.040 REF
0.020 REF
L3
L
e
j
L
0.045
0.045
0.075
0.003
0.055
0.055
0.095
0.015
1.14
1.14
1.91
0.08
1.40
1.40
2.41
0.38
L1
L2
L3
ND
NE
N
-
-
-
B3
B1
5
5
5
5
3
3
3
E1
E2
20
20
L2
B2
NOTES:
1. Metallized castellations shall be connected to plane 1 terminals
and extend toward plane 2 across at least two layers of ceramic
or completely across all of the ceramic layers to make electrical
connection with the optional plane 2 terminals.
L1
D2
e1
D1
2. Unless otherwise specified, a minimum clearance of 0.015 inch
(0.381mm) shall be maintained between all metallized features
(e.g., lid, castellations, terminals, thermal pads, etc.)
3. Symbol “N” is the maximum number of terminals. Symbols “ND”
and “NE” are the number of terminals along the sides of length
“D” and “E”, respectively.
4. The required plane 1 terminals and optional plane 2 terminals
shall be electrically connected.
5. The corner shape (square, notch, radius, etc.) may vary at the
manufacturer’s option, from that shown on the drawing.
6. Chip carriers shall be constructed of a minimum of two ceramic
layers.
7. Maximum limits allows for 0.007 inch solder thickness on pads.
8. Materials: Compliant to MIL-I-38535.
Spec Number 511050-883
8-12
Semiconductor
HA2546
Wideband Two Quadrant
Analog Multiplier
DESIGN INFORMATION
August 1999
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
o
Typical Performance Curves
V
= ±15V, T = +25 C, See Test Circuit For Multiplier Configuration.
S
A
V
GAIN AND PHASE vs FREQUENCY
V GAIN AND PHASE vs FREQUENCY
X
Y
9
6
RL = 1K, VX+ = 200mVrms, VY = 5VDC, VX- = -1VDC
RL = 1K, VX = 2VDC, VY = 200mVrms
15
10
5
CL = 50pF
CL = 0pF
3
0
0
-3
-6
-5
0
-10
0
CL = 0pF
45
90
135
180
45
90
135
180
CL = 50pF
10M
10K
100K
1M
10M
100M
10K
100K
1M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
V
FEEDTHROUGH vs FREQUENCY
V FEEDTHROUGH vs FREQUENCY
X
Y
-10
RL = 1K, VX+ = 200mVrms, VY = 0V
VX = 0V, RL = 1K, VY = 200mVrms
-20
-30
-40
-50
-60
-70
-80
-90
0
-10
-20
-30
-40
-50
VX = -2.0VDC
VX = -1.0VDC
VX = -0.5VDC
10K
100K
1M
10M
100M
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
VARIOUS V FREQUENCY RESPONSES
VARIOUS V FREQUENCY RESPONSES
X
Y
9
6
VX+ = 200mVrms, RL = 1K, VX- = -1VDC
RL = 1K, CL = 50pF, VY = 200mVrms
15
10
5
3
VX = 2.0VDC
VY = 5VDC
0
0
-3
-6
-9
VY = 2VDC
VY = 1VDC
VX = 1.0VDC
VX = 0.5VDC
-5
-10
-15
-20
VY = 0.5VDC
-12
-15
10K
100K
1M
10M
100M
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Spec Number 511050-883
8-13
HA2546
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
o
Typical Performance Curves
V
= ±15V, T = +25 C, See Test Circuit For Multiplier Configuration. (Continued)
S
A
NOISE CHARACTERISTICS
V OFFSET AND BIAS CURRENT vs TEMPERATURE
Y
14
12
10
8
VX = 0V, VY = 0V
975
900
825
750
675
600
525
450
375
300
225
150
75
BIAS CURRENT
6
4
2
0
OFFSET CURRENT
-2
0
-4
1
10
100
1K
10K
100K
-55
-25
0
25
50
75
100
125
TEMPERATURE (oC)
FREQUENCY (Hz)
OFFSET VOLTAGE vs TEMPERATURE
V
OFFSET AND BIAS CURRENT vs TEMPERATURE
X
10
8
3
6
2
4
VY
VX
2
BIAS CURRENT
0
1
-2
-4
-6
-8
-10
VZ
OFFSET CURRENT
0
-1
-55
-55
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
TEMPERATURE (oC)
TEMPERATURE (oC)
V
vs V
V CMRR vs FREQUENCY
Y
OUT
SUPPLY
120
100
80
60
40
20
0
VYCM = 200mVrms
7
6
5
4
3
2
1
0
VX = 0V
-VOUT
+VOUT
VX = 2V
-10
±5
±7 ±8
±12
±15
±17
100
1K
10K
100K
1M
10M
100M
VSUPPLY
FREQUENCY (Hz)
Spec Number 511050-883
8-14
HA2546
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
o
Typical Performance Curves
V
= ±15V, T = +25 C, See Test Circuit For Multiplier Configuration. (Continued)
S
A
V
COMMON MODE REJECTION RATIO vs FREQUENCY
PSRR vs FREQUENCY
X
120
100
80
60
40
20
0
VY = VX = 0V
VX = 200mVrms
100
80
60
40
20
0
+PSSR
-PSSR
VY = 0V
VY = 2V
100
1K
10K
100K
1M
10M
100M
100
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
SUPPLY CURRENT vs TEMPERATURE
-ICC
COMMON MODE RANGE vs V
SUPPLY
25
14
12
10
8
+ICC
CMR(-)
20
6
CMR(+)
4
2
0
15
-55
±5
±7 ±8
±12
±15
±17
-25
0
25
50
75
100
125
VSUPPLY
TEMPERATURE (oC)
PSRR vs TEMPERATURE
MULTIPLIER ERROR
100
80
60
40
20
0
1.5
1
X = 1
X = 1.2
X = 1.4
+PSRR
-PSRR
0.5
0
-0.5
-1
X = 1.6
X = 1.8
X = 2
-1.5
-6
-4
-2
0
2
4
6
-55
-25
0
25
50
75
100
125
Y INPUT (V)
TEMPERATURE (oC)
Spec Number 511050-883
8-15
HA2546
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
o
Typical Performance Curves
V
= ±15V, T = +25 C, See Test Circuit For Multiplier Configuration. (Continued)
S
A
MULTIPLIER ERROR
MULTIPLIER ERROR
2
2
X = 0.8
X = 0.4, 0.6
Y = -5
1.5
1
1.5
Y = -4
1
X = 0.2
X = 1
Y = -3
0.5
0
0.5
0
X = 0
-0.5
-1
Y = -2
-0.5
Y = -1
Y = 0
-1
-1.5
-1.5
-2
0
0.5
1
1.5
2
2.5
-6
-4
-2
0
2
4
6
X INPUT (V)
Y INPUT (V)
MULTIPLIER ERROR
WORST CASE MULTIPLICATION ERROR vs
TEMPERATURE
1
0.5
0
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Y = 0
Y = 1
-0.5
-1
Y = 2
Y = 3
Y = 4
Y = 5
-1.5
-2
0
0.5
1
1.5
2
2.5
X INPUT (V)
-55
-25
0
25
50
75
100
125
TEMPERATURE (oC)
MULTIPLICATION ERROR vs TEMPERATURE
GAIN VARIATION vs FREQUENCY
0.5
0.4
0.3
0.2
0.1
0.0
RL = 1K, VX = 2VDC, VY = 200mVrms
0.6
0.4
0.2
0
CL = 50pF
CL = 0pF
-0.2
10K
100K
1M
FREQUENCY (Hz)
10M
100M
-55
-25
0
25
50
75
100
125
TEMPERATURE (oC)
Spec Number 511050-883
8-16
HA2546
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
o
Typical Performance Curves
V
= ±15V, T = +25 C, See Test Circuit For Multiplier Configuration. (Continued)
S
A
SCALE FACTOR vs TEMPERATURE
OUTPUT VOLTAGE SWING vs LOAD RESISTANCE
2.010
2.008
2.006
2.004
2.002
2.000
1.998
1.996
1.994
1.992
1.990
7.0
fO = 10kHz, VX = 2VDC, THD < 0.1%
6.0
VS = ±15
VS = ±12
5.0
VS = ±10
4.0
3.0
VS = ±8
2.0
1.0
0.0
-25
0
25
50
75
100
125
-55
10
100
1K
10K
100K
TEMPERATURE (oC)
LOAD RESISTANCE (Ω)
SLEW RATE vs TEMPERATURE
VY CHANNEL
RISE TIME vs TEMPERATURE
VX CHANNEL
500
400
300
200
100
0
24
22
20
18
16
14
12
10
8
VY CHANNEL
6
VX CHANNEL
4
2
0
-60 -40
-20
0
20
40
60
80
100 120
-60 -40
-20
0
20
40
60
80
100 120
TEMPERATURE (oC)
TEMPERATURE (oC)
SUPPLY CURRENT vs SUPPLY VOLTAGE
28
26
24
22
20
18
16
14
12
10
8
-ICC
+ICC
6
4
2
0
2
4
6
8
10
12
14
16
18
20
SUPPLY VOLTAGE (±V)
Spec Number 511050-883
8-17
HA2546
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Application Information
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
REF
Theory of Operation
NC
NC
NC
The HA-2546 is a two quadrant multiplier with the following
three differential inputs; the signal channel, VY+ and VY-, the
control channel, VX+ and VX-, and the summed channel,
VZ+ and VZ-, to complete the feedback of the output ampli-
fier. The differential voltages of channel X and Y are con-
verted to differential currents. These currents are then
multiplied in a circuit similar to a Gilbert Cell multiplier, pro-
ducing a differential current product. The differential voltage
of the Z channel is converted into a differential current which
then sums with the products currents. The differential “prod-
uct/sum” currents are converted to a single-ended current
and then converted to a voltage output by a transimpedance
amplifier.
+
VX
V+
+
X
Z
+
VY
+
-
-
Y
-
+
Σ
V-
-
+
VOUT
50Ω
1K
50pF
FIGURE 1.
The open loop transfer equation for the HA-2546 is:
The VX- pin is usually connected to ground so that when VX+
is negative there is no signal at the output, i.e. two quadrant
operation. If the VX input is a negative going signal the VX+
pin maybe grounded and the VX- pin used as the control
input.
(VX+ - VX-) (VY+ - VY-)
- (VZ+ - VZ-)
VOUT = A
SF
where;
The VY- terminal is usually grounded allowing the VY+ to
swing ±5V. The VZ+ terminal is usually connected directly to
VOUT to complete the feedback loop of the output amplifier
while VZ- is grounded. The scale factor is normally set to 2
by connecting GA B to GA C. Therefore the transfer equation
simplifies to VOUT = (VX VY) / 2.
A = Output Amplifier Open Loop Gain
SF = Scale Factor
VX, VY, VZ = Differential Inputs
The scale factor is used to maintain the output of the multi-
plier within the normal operating range of ±5V. The scale fac-
tor can be defined by the user by way of an optional external
Offset Adjustment
resistor, REXT, and the Gain Adjust pins, Gain Adjust A (GA The signal channel offset voltage may be nulled by using a
A), Gain Adjust B (GA B), and Gain Adjust C (GA C). The 20kΩ potentiometer between VYIO Adjust pins A and B and
scale factor is determined as follows:
connecting the wiper to -V. Reducing the signal channel off-
set will reduce VX AC feedthrough. Output offset voltage can
also be nulled by connecting VZ- to the wiper of a 20kΩ
potentiometer which is tied between +V and -V.
SF = 2, when GA B is shorted to GA C
SF 1.2 REXT, when REXT is connected between
GA A and GA C (REXT is in kΩ)
Capacitive Drive Capability
SF 1.2 (REXT + 1.667kΩ), when REXT is
connected to GA B and GA C (REXT is in kΩ)
When driving capacitive loads >20pF, a 50Ω resistor is rec-
ommended between VOUT and VZ+, using VZ+ as the output
(See Figure 1). This will prevent the multiplier from going
unstable.
The scale factor can be adjusted from 2 to 5. It should be
noted that any adjustments to the scale factor will affect the
AC performance of the control channel, VX. The normal input
operating range of VX is equal to the scale factor voltage.
Power Supply Decoupling
Power supply decoupling is essential for high frequency cir-
cuits. A 0.01µF high quality ceramic capacitor at each supply
pin in parallel with a 1µF tantalum capacitor will provide
excellent decoupling. Chip capacitors produce the best
results due to the close spacing with which they may be
placed to the supply pins minimizing lead inductance.
The typical multiplier configuration is shown in Figure 1. The
ideal transfer function for this configuration is:
(VX+ - VX-) (VY+ - VY-)
VOUT
=
+ VZ- , when VX ≥ 0V
2
0
Adjusting Scale Factor
, when VX < 0V
The HA-2546 two quadrant multiplier may be configured for
many uses. Following are examples of a few typical applica-
tions.
Spec Number 511050-883
8-18
HA2546
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
Adjusting the scale factor will tailor the control signal, VX,
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
input voltage range to match your needs. Referring to the
simplified schematic and looking for the VX input stage, you
will notice the unusual design. The internal reference sets up
a 1.2mA current sink for the VX differential pair. The control
signal applied to this input will be forced across the scale
factor setting resistor and set the current flowing in the VX+
side of the differential pair. When the current through this
resistor reaches 1.2mA, all the current available is flowing in
the one side and full scale has been reached. Normally the
1.67kΩ internal resistor sets the scale factor to 2V when the
Gain Adjust pins B and C are connected together, but you
may set this resistor to any convenient value using pins 16
(GA A) and 15 (GA C).
REF
NC
NC
NC
+
X
Z
+
VY
+
-
-
Y
V+
-
+
V-
-
Σ
+
VOUT
50Ω
10kΩ
0.1µF
1N914
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
REF
10kΩ
0.01µF
NC
NC
NC
-
+15V
+
5kΩ
+
HA-5127
VX
V+
+
3.3V
X
Z
20kΩ
+
VY
+
-
-
Y
0.1µF
-
+
Σ
V-
-
+
VOUT
FIGURE 3. AUTOMATIC GAIN CONTROL
50Ω
1K
In Figure 3, the HA-2546 is configured in a true Automatic
Gain Control or AGC application. The HA-5127, low noise op
amp, provides the gain control level to the X input. This level
will set the peak output voltage of the multiplier to match the
reference level. The feedback network around the HA-5127
provides stability and a response time adjustment for the
gain control circuit.
FIGURE 2A. MULTIPLIER, V
= V V / 2, SCALE FACTOR = 2V
X Y
OUT
1
16
15
14 NC
REF
4.167K
2
3
4
5
6
7
8
NC
NC
NC
+
13
12
11
10
9
VX
+
X
+
VY
+
-
-
Y
V+
-
+
Σ
V-
-
Z
+
VOUT
50Ω
1K
FIGURE 2B. MULTIPLIER, V
= V V / 5, SCALE FACTOR = 5V
X Y
OUT
Spec Number 511050-883
8-19
HA2546
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
.
REF LEVEL
0.000dB
180.000DEG
/DIV
20.000dB
45.000DEG
MARKET 1000 000.00Hz
MAG (UDF) 56.431dB
MARKER 1000 000.000Hz
PHASE (UDF) 177.646deg
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
REF
NC
NC
NC
100
+
80
60
0.126V
0.4V
X
Z
VGAIN = 0.030V
+
-
-
Y
V+
40
-
+
Σ
V-
-
20
0.902V
+
0
180
135
90
45
0
-20
-40
-60
-80
-100
HFA0002
5kΩ
-
VOUT
+
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 4A. VOLTAGE CONTROLLED AMPLIFIER
FIGURE 4B. VOLTAGE CONTROLLED AMPLIFIER
This multiplier has the advantage over other AGC circuits, in
that the signal bandwidth is not affected by the control signal
gain adjustment.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
REF
NC
NC
NC
A wide range of gain adjustment is available with the Voltage
Controlled Amplifier configuration shown in Figure 4A. and
Figure 4B. Here the gain of the HFA0002 is swept from 20V/
V at a control voltage of 0.902V to a gain of almost 1000V/V
with a control voltage of 0.03V.
+
VMIX (0V TO 2V)
X
Z
+
CH A
CH B
-
-
Y
V+
-
+
Σ
V-
-
The Video Fader circuit provides a unique function as shown
in Figure 5. Here Ch B is applied to the minus Z input in
addition to the minus Y input. VMIX will control the percent-
age of Ch A and Ch B that are mixed together to produce a
resulting video image or other signal.
+
VOUT
50Ω
Many other applications are possible including division,
squaring, square-root, percentage calculations, etc. Please
refer to the HA-2556 four quadrant multiplier for additional
applications.
V
= Ch B + (Ch A - Ch B) V
/ Scale Factor
OUT
MIX
Scale Factor = 2
V
V
V
= All Ch B; if V
= 0V
OUT
OUT
OUT
MIX
= All Ch A; if V
= 2V (Full Scale)
MIX
= Mix of Ch A and Ch B; if 0V < V
< 2V
MIX
FIGURE 5. VIDEO FADER
Spec Number 511050-883
8-20
HA2546
DESIGN INFORMATION(Continued)
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
TYPICAL PERFORMANCE CHARACTERISTICS
Device Tested at: Supply Voltage = ±15V, R
= 1kΩ, C
= 50pF, Unless Otherwise Specified.
LOAD
LOAD
PARAMETER
Multiplication Error Drift
Differential Gain
CONDITIONS
TEMP
TYP
0.002
0.1
UNITS
o
Full
%/ C
o
V
V
V
= 2V, V = 300mV , f = 3.58MHz
+25 C
%
Degrees
dB
X
X
X
Y
P-P
O
o
Differential Phase
= 2V, V = 300mV , f = 3.58MHz
+25 C
0.1
Y
P-P
O
o
Gain Tolerance
DC to 5MHz
= 2V
+25 C
0.1
o
5MHz to 8MHz
+25 C
0.18
6
dB
o
1% Amplitude Error
1% Vector Error
THD+N
+25 C
MHz
kHz
o
+25 C
260
0.03
400
150
75
o
f
= 10kHz, V = 1Vrms, V = 2V
+25 C
%
O
Y
X
o
Voltage Noise
f
f
f
= 10Hz
= 100Hz
= 1kHz
V
= 0V, V = 0V
+25 C
nV/Hz
nV/Hz
nV/Hz
V
O
O
O
X
Y
o
+25 C
o
+25 C
o
Common Mode Range
+25 C
±9
SIGNAL INPUT, V
Y
o
Average Offset Voltage Drift
Differential Input Resistance
Small Signal Bandwidth (-3dB)
Feedthrough
Full
45
720
40
µV/ C
o
+25 C
KΩ
MHz
dB
o
V
= 2V
+25 C
X
Y
o
f
= 5MHz, V = 0V, V = 200mVrms
+25 C
-52
O
X
Y
V
TRANSIENT RESPONSE
Y
o
Propagation Delay
Settling Time
+25 C
25
ns
ns
o
V
= ±5V, V = 2V
+25 C
200
X
CONTROL INPUT, V
X
o
Average Offset Voltage Drift
Differential Input Resistance
Small Signal Bandwidth (-3dB)
Feedthrough
Full
10
360
17
µV/ C
o
+25 C
kΩ
MHz
dB
o
V
= 5V, V = -1V
+25 C
Y
X
X
o
f
= 100kHz, V = 0V, V = 200mVrms
+25 C
-40
80
O
Y
X
o
Common Mode Rejection Ratio
V
= 0V to 2V, V = 5V
+25 C
dB
Y
V
TRANSIENT RESPONSE
X
o
Propagation Delay
Settling Time
+25 C
50
ns
ns
o
V
= 0 to 2V, V = 5V
+25 C
200
X
Y
V CHARACTERISTICS
Z
o
Open Loop Gain
+25 C
70
dB
o
Differential Input Resistance
OUTPUT CHARACTERISTICS
Output Resistance
+25 C
900
kΩ
o
+25 C
1
Ω
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 511050-883
8-21
相关型号:
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