HCTS75KMSR [INTERSIL]
Radiation Hardened Dual 2-Bit Bistable Transparent Latch; 抗辐射双路2位双稳态透明锁存器
| 型号： | HCTS75KMSR |
| 厂家： | 
Intersil |
| 描述： | Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
| 文件： | 总9页 (文件大小：140K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HCTS75MS
Radiation Hardened
Dual 2-Bit Bistable Transparent Latch
September 1995
Features
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
Q0 1
D0 1
D1 1
E 2
1
2
3
4
5
6
7
8
16 1 Q0
15 1 Q1
14 1 Q1
13 1 E
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
VCC
12
11
GND
Q0
D0 2
D1 2
Q1 2
2
10 2 Q0
2 Q1
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
9
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
• LSTTL Input Compatibility
- VIL = 0.8V Max
Q0 1
D0 1
D1 1
E 2
1
1
1
1
Q0
Q1
Q1
E
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
VCC
GND
Description
D0 2
D1 2
Q1 2
Q0
Q0
Q1
2
2
2
The Intersil HCTS75MS is a Radiation Hardened dual 2-bit
bistable transparent latch. Each of the two latches are controlled
by a separate enable input (E) which are active low. E low latches
the output state.
Functional Diagram
The HCTS75MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
LATCH 0
2(6)
16(10
1(11
D0
D
Q
The HCTS75MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
LE
LE
13(4)
E
Ordering Information
14(8
15(9
PART
NUMBER
TEMPERATURE SCREENING
RANGE LEVEL
LE
D
LE
Q
PACKAGE
3(7)
D1
o
o
HCTS75DMSR
-55 C to +125 C Intersil Class
S Equivalent
16 Lead SBDIP
LATCH 1
5
VCC
GND
o
o
HCTS75KMSR
-55 C to +125 C Intersil Class
S Equivalent
16 Lead Ceramic
Flatpack
12
TRUTH TABLE
o
HCTS75D/
Sample
+25 C
Sample
Sample
Die
16 Lead SBDIP
INPUTS
OUTPUTS
D
E
H
H
L
Q
L
Q
H
o
HCTS75K/
Sample
+25 C
16 Lead Ceramic
Flatpack
L
H
X
H
L
o
HCTS75HMSR
+25 C
Die
Q0
Q0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 518625
File Number 3189.1
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999470
Specifications HCTS75MS
Absolute Maximum Ratings
Reliability Information
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Thermal Resistance
θ
θ
JA
JC
o
o
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .±25mA
(All Voltage Reference to the VSS Terminal)
SBDIP Package. . . . . . . . . . . . . . . . . . . .
Ceramic Flatpack Package . . . . . . . . . . . 114 C/W
Maximum Package Power Dissipation at +125 C Ambient
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
73 C/W
24 C/W
o
o
29 C/W
o
o
o
Storage Temperature Range (TSTG) . . . . . . . . . . . -65 C to +150 C
o
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265 C
o
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C
o
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/ C
o
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/ C
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . 100ns/V Max Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
o
o
Operating Temperature Range (T ) . . . . . . . . . . . . -55 C to +125 C
A
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
A SUB-
LIMITS
(NOTE 1)
PARAMETER
SYMBOL
CONDITIONS
GROUPS
TEMPERATURE
MIN
-
MAX
UNITS
µA
o
Quiescent Current
ICC
VCC = 5.5V,
VIN = VCC or GND
1
2, 3
1
+25 C
20
o
o
+125 C, -55 C
-
400
µA
o
Output Current
(Sink)
IOL
IOH
VOL
VCC = VIH = 4.5V,
VOUT = 0.4V, VIL = 0V
+25 C
4.8
4.0
-4.8
-4.0
-
-
mA
mA
mA
mA
V
o
o
2, 3
1
+125 C, -55 C
-
-
o
Output Current
(Source)
VCC = VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V
+25 C
o
o
2, 3
1, 2, 3
+125 C, -55 C
-
o
o
Output Voltage Low
VCC = 5.5V, VIH = 2.75V,
VIL = 0.8V, IOL = 50µA
+25 C, +125 C,
0.1
o
-55 C
o
o
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, IOL = 50µA
1, 2, 3
1, 2, 3
1, 2, 3
+25 C, +125 C,
-
0.1
V
V
V
o
-55 C
o
o
Output Voltage High
VOH
VCC = 5.5V, VIH = 2.75V,
VIL = 0.8V, IOH = -50µA
+25 C, +125 C,
VCC -0.1
VCC -0.1
-
-
o
-55 C
o
o
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, IOH = -50µA
+25 C, +125 C,
o
-55 C
o
Input Leakage
Current
IIN
FN
VCC = 5.5V, VIN = VCC or
GND
1
+25 C
-0.5
-5.0
-
+0.5
+5.0
-
µA
µA
V
o
o
2, 3
+125 C, -55 C
o
o
Noise Immunity
Functional Test
VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2)
7, 8A, 8B
+25 C, +125 C,
o
-55 C
NOTES:
1. All voltages referenced to device GND.
2. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
Spec Number 518625
471
Specifications HCTS75MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP
LIMITS
MIN
(NOTES 1, 2)
A SUB-
PARAMETER
SYMBOL
CONDITIONS
GROUPS
TEMPERATURE
MAX
19
24
27
35
23
29
19
22
21
25
20
23
24
29
28
34
UNITS
ns
o
Propagation Delay
D to Q
TPLH
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
9
10, 11
9
+25 C
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
o
o
+125 C, -55 C
ns
o
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
TPHL
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
Propagation Delay
D to Q
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
Propagation Delay
E to Q
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
Propagation Delay
E to Q
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
+25 C
ns
o
o
10, 11
9
+125 C, -55 C
ns
o
VCC = 4.5V, VIH = 3.0V,
VIL = 0V
+25 C
ns
o
o
10, 11
+125 C, -55 C
ns
NOTES:
1. All voltages referenced to device GND.
2. Measurements made with RL = 500Ω, CL = 50pF, Input TR = TF = 3ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
36
51
10
10
16
24
12
18
12
18
15
22
UNITS
pF
pF
pF
pF
ns
o
Capacitance Power
Dissipation
CPD
VCC = 5.0V, f = 1MHz
1
1
1
1
1
1
1
1
1
1
1
1
+25 C
-
-
-
-
-
-
-
-
-
-
o
o
+125 C, -55 C
o
Input Capacitance
Pulse Width Time
Setup Time
CIN
TW
TSU
TH
VCC = 5.0V, f = 1MHz
+25 C
o
o
+125 C, -55 C
o
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
+25 C
o
o
+125 C, -55 C
ns
o
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
+25 C
ns
o
o
+125 C, -55 C
ns
o
Hold Time
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
+25 C
ns
o
o
+125 C, -55 C
ns
o
Output Transition
Time
TTHL,
TTLH
VCC = 4.5V, VIH = 4.5V,
VIL = 0.0V
+25 C
ns
o
o
+125 C, -55 C
ns
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Number 518625
472
Specifications HCTS75MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
200K RAD
LIMITS
(NOTE 1)
PARAMETERS
SYMBOL
ICC
CONDITIONS
TEMPERATURE
MIN
MAX
0.4
-
UNITS
mA
o
Supply Current
VCC = 5.5V, VIN = VCC or GND
+25 C
-
o
Output Current
(Sink)
IOL
VCC = VIH = 4.5V, VOUT = 0.4V, VIL = 0V
+25 C
4.0
mA
o
Output Current
(Source)
IOH
VCC = VIH = 4.5V, VOUT = VCC - 0.4V,
VIL = 0V
+25 C
-4.0
-
0.1
0.1
-
mA
V
o
Output Voltage Low
Output Voltage High
VOL
VCC = 5.5V, VIH = 2.75V, VIL = 0.8V,
IOL = 50µA
+25 C
-
-
o
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V,
IOL = 50µA
+25 C
V
o
VOH
VCC = 5.5V, VIH = 2.75V, VIL = 0.8V,
IOH = -50µA
+25 C
VCC
-0.1
V
o
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V,
IOH = -50µA
+25 C
VCC
-0.1
-
V
o
Input Leakage
Current
IIN
FN
VCC = 5.5V, VIN = VCC or GND
+25 C
-5
-
+5
-
µA
o
Noise Immunity
Functional Test
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V,
(Note 3)
+25 C
o
Propagation Delay
D to Q
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
TPHL
TPLH
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
VCC = 4.5V, VIH = 3.0V, VIL = 0V
+25 C
2
2
2
2
2
2
2
2
35
24
22
29
23
25
34
29
ns
ns
ns
ns
ns
ns
ns
ns
o
+25 C
o
Propagation Delay
D to Q
+25 C
o
+25 C
o
Propagation Delay
E to Q
+25 C
o
+25 C
o
Propagation Delay
E to Q
+25 C
o
+25 C
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
o
TABLE 5. BURN-IN AND OPERATING LIFE DELTA PARAMETERS (+25 C)
GROUP B
PARAMETER
SUBGROUP
DELTA LIMIT
±6µA
ICC
5
5
IOL/IOH
-15% of 0 Hour
Spec Number 518625
473
Specifications HCTS75MS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Initial Test (Preburn-In)
METHOD
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
100%/5004
Sample/5005
Sample/5005
GROUP A SUBGROUPS
READ AND RECORD
ICC, IOL/H
1, 7, 9
1, 7, 9
Interim Test I (Postburn-In)
Interim Test II (Postburn-In)
PDA
ICC, IOL/H
ICC, IOL/H
1, 7, 9
1, 7, 9, Deltas
Interim Test III (Postburn-In)
PDA
1, 7, 9
ICC, IOL/H
1, 7, 9, Deltas
Final Test
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Group A (Note 1)
Group B
Subgroup B-5
Subgroups 1, 2, 3, 9, 10, 11,
(Note 2)
Subgroup B-6
Sample/5005
Sample/5005
1, 7, 9
1, 7, 9
Group D
NOTES:
1. Alternate group A inspection in accordance with method 5005 of MIL-STD-883 may be exercised.
2. Table 5 parameters only.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
READ AND RECORD
CONFORMANCE
GROUPS
METHOD
PRE RAD
POST RAD
PRE RAD
POST RAD
Group E Subgroup 2
NOTE:
5005
1, 7, 9
Table 4
1, 9
Table 4 (Note 1)
1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OSCILLATOR
OPEN
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
1, 8, 9, 10, 11, 14, 15, 16 2, 3, 4, 6, 7, 12, 13
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
1, 8, 9, 10, 11, 14, 15, 16 12
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2)
12
GROUND
1/2 VCC = 3V ± 0.5V
VCC = 6V ± 0.5V
50kHz
25kHz
-
5
-
-
-
-
2, 3, 4, 5, 6, 7, 13
-
-
1, 8, 9, 10, 11, 14, 15, 16
5
4, 13
2, 3, 6, 7
NOTES:
1. Each pin except VCC and GND will have a resistor of 10KΩ ± 5% for static burn-in
2. Each pin except VCC and GND will have a resistor of 1KΩ ± 5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN
GROUND
VCC = 5V ± 0.5V
1, 8, 9, 14, 15, 16
12
2, 3, 4, 5, 6, 7, 10, 11, 13
NOTE: Each pin except VCC and GND will have a resistor of 47KΩ ± 5% for irradiation testing. Group
E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 518625
474
HCTS75MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% PIND, Method 2020, Condition A
100% External Visual
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quan-
tity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
Spec Number 518625
475
HCTS75MS
Propagation Delay Timing Diagram and Load Circuit
VIH
DUT
50pF
TEST
500Ω
INPUT
VS
VSS
VOH
VOL
TPLH
TPHL
VS
OUTPUT
Transition Timing Diagram
VOLTAGE LEVELS
TTLH
VOH
TTHL
PARAMETER
VCC
HCTS
4.50
3.00
1.30
0
UNITS
80%
80%
V
V
V
V
V
20%
20%
OUTPUT
VIH
VS
VOL
VIL
GND
0
Pulse Width, Setup, Hold Timing Diagram and Load Circuit
DUT
TEST
500Ω
D INPUT
VIH
VS
50pF
VIL
TH
TSU
E INPUT
VIH
TW
VOLTAGE LEVELS
PARAMETER
VCC
HCTS
4.50
4.50
2.25
0
UNITS
VS
V
V
V
V
V
VIL
VIH
VS
TH = Hold Time
TSU = Setup Time
TW = Pulse Width
VIL
GND
0
Pulse Width, Setup, Hold Timing Diagram Negative Edge Trigger and Load Circuit
DUT
50pF
TEST
500Ω
TW
INPUT
VIH
VS
VIL
TH
TSU
INPUT CP
VIH
TW
VOLTAGE LEVELS
PARAMETER
VCC
HCTS
4.50
4.50
2.25
0
UNITS
VS
V
V
V
V
V
VIL
VIH
VS
TH = Hold Time
TSU = Setup Time
TW = Pulse Width
VIL
GND
0
Spec Number 518625
476
HCTS75MS
Die Characteristics
DIE DIMENSIONS:
89 x 88 mils
2.25 x 2.24mm
METALLIZATION:
Type: SiAl
Metal Thickness: 11kÅ ± 1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ± 2.6kÅ
WORST CASE CURRENT DENSITY:
<2.0 x 105A/cm2
BOND PAD SIZE:
100µm x 100µm
4 x 4 mils
Metallization Mask Layout
HCTS75MS
D0 1
(2)
Q0 1
(1)
Q0 1
(16)
(15) 1 Q1
D1 1 (3)
(14) 1 Q1
E 2 (4)
VCC (5)
(13) 1 E
D0 2 (6)
(12) GND
(11) 2 Q0
D1 2 (7)
(8)
Q1 2
(9)
Q1 2
(10)
Q0 2
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location.
The mask series for the HCTS75 is TA14442A.
Spec Number 518625
477
HCTS75MS
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Spec Number
478
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