HFA1112MJ/883_技术文档

TM

HFA1112/883

Ultra High Speed

Programmable Gain Buffer Amplifier

June 1994

Features

Description

• This Circuit is Processed in Accordance to MIL-STD- The HFA1112/883 is a closed loop buffer that achieves a

883 and is Fully Conformant Under the Provisions of high degree of gain accuracy, wide bandwidth, and low dis-

Paragraph 1.2.1.

tortion. Manufactured on the Intersil proprietary complemen-

tary bipolar UHF-1 process, the HFA1112/883 also offers

very fast slew rates, and high output current.

• User Programmable For Closed-Loop Gains of +1, -1

or +2 Without Use of External Resistors

A unique feature of the pinout allows the user to select a

voltage gain of +1, -1, or +2, without the use of any external

components. The result is a more flexible product, fewer part

types in inventory, and more efficient use of board space.

• Low Differential Gain and Phase . . . . .0.02%/0.04 Deg.

• Low Distortion (HD3, 30MHz) . . . . . . . . . . -73dBc (Typ)

• Wide -3dB Bandwidth . . . . . . . . . . . . . . . 850MHz (Typ)

• Very High Slew Rate . . . . . . . . . . . . . . . 2400V/µs (Typ)

• Fast Settling (0.1%) . . . . . . . . . . . . . . . . . . . . 13ns (Typ)

• Excellent Gain Flatness (to 100MHz) . . . . 0.07dB (Typ)

• Excellent Gain Accuracy. . . . . . . . . . . . . . 0.99V/V (Typ)

• High Output Current . . . . . . . . . . . . . . . . . . 60mA (Typ)

• Fast Overdrive Recovery . . . . . . . . . . . . . . <10ns (Typ)

Component and composite video systems will also benefit

from this buffer’s performance, as indicated by the excellent

gain flatness, and 0.02%/0.04 Deg. Differential Gain/Phase

specifications (R = 150Ω).

L

Compatibility with existing op amp pinouts provides flexibility

to upgrade low gain amplifiers, while decreasing component

count. Unlike most buffers, the standard pinout provides an

upgrade path should a higher closed loop gain be needed at

a future date.

This amplifier is available with programmable output clamps

as the HFA1113/883. For applications requiring a standard

buffer pinout, please refer to the HFA1110/883 datasheet.

Applications

• Video Switching and Routing

• Pulse and Video Amplifiers

• Wideband Amplifiers

• RF/IF Signal Processing

• Flash A/D Driver

Ordering Information

TEMPERATURE

PART NUMBER

RANGE

PACKAGE

HFA1112MJ/883

-55^oC to +125^oC

8 Lead Ceramic DIP

• Medical Imaging Systems

Pinout

HFA1112/883

(CERDIP)

TOP VIEW

300

NC

-IN

+IN

V-

1

2

3

4

8

7

6

5

NC

V+

300

-

OUT

NC

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.

Spec Number 511084-883

184

FN3610.1

Specifications HFA1112/883

Absolute Maximum Ratings

Thermal Information

Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V

Thermal Resistance

θ_JA

θ_JC

CerDIP Package . . . . . . . . . . . . . . . . . 115^oC/W

30^oC/W

Voltage at Either Input Terminal. . . . . . . . . . . . . . . . . . . . . . V+ to V- Maximum Package Power Dissipation at +75^oC

Output Current (50% Duty Cycle) . . . . . . . . . . . . . . . . . . . . . . . .±55mA

Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175^oC

ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2000V

Storage Temperature Range . . . . . . . . . . . . . .-65^oC ≤ T_A≤ +150^oC

Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300^oC

CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.87W

Package Power Dissipation Derating Factor above +75^oC

CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mW/^oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Operating Conditions

Operating Supply Voltage (±V_S) . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5V

Operating Temperature Range. . . . . . . . . . . . .-55^oC ≤ T_A≤ +125^oC

R_LŠ≥ 50Ω

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

Device Tested at V_SUPPLY= ±5V, R_SOURCE= 0Ω, R_L= 100Ω, V_OUT= 0V, Unless Otherwise Specified.

LIMITS

GROUP A

D.C. PARAMETERS

SYMBOL

CONDITIONS

V_CM= 0V

SUBGROUPS

TEMPERATURE

+25^oC

+125^oC, -55^oC

+25^oC

MIN

MAX

UNITS

mV

Output Offset Voltage

V_OS

1

-25

-40

39

25

40

-

2, 3

1

mV

Power Supply

Rejection Ratio

PSRRP

PSRRN

∆V_SUP= ±1.25V

V+ = 6.25V, V- = -5V

V+ = 3.75V, V- = -5V

dB

2, 3

+125^oC, -55^oC

35

-

dB

∆V_SUP= ±1.25V

V+ = 5V, V- = -6.25V

V+ = 5V, V- = -3.75V

1

+25^oC

+125^oC, -55^oC

39

35

-

dB

2, 3

Non-Inverting Input

(+IN) Current

I_BSP

V_CM= 0V

1

+25^oC

+125^oC, -55^oC

+25^oC

-40

-65

-

40

65

40

50

µA

2, 3

1

+IN Common

Mode Rejection

CMS_IBP

∆V_CM= ±2V

V+ = 3V, V- = -7V

V+ = 7V, V- = -3V

µA/V

2, 3

+125^oC, -55^oC

-

+IN Resistance

+R_IN

A_VP1

Note 1

1

2, 3

1

+25^oC

+125^oC, -55^oC

+25^oC

+125^oC, -55^oC

+25^oC

+125^oC, -55^oC

+25^oC

+125^oC, -55^oC

+25^oC

+125^oC, -55^oC

+25^oC

+125^oC, -55^oC

+25^oC, +125^oC

-55^oC

25

20

-

kΩ

V/V

V

Gain

A_V= +1

V_IN= -1V to +1V

0.980

0.975

0.980

0.975

1.960

1.950

3

1.020

1.025

1.020

1.025

2.040

2.050

-

(V_OUT= 2V_P-P

Gain

)

2, 3

1

A_VM1

A_V= -1

V_IN= -1V to +1V

(V_OUT= 2V_P-P

)

2, 3

1

Gain

(V_OUT= 4V_P-P

A_VP2

A_V= +2

V_IN= -1V to +1V

2, 3

1

Output Voltage

Swing

V_OP100

V_ON100

V_OP50

V_ON50

A_V= -1

R_L= 100Ω

V_IN= -3.2V

V_IN= -2.7V

V_IN= +3.2V

V_IN= +2.7V

V_IN= -2.7V

V_IN= -2.25V

V_IN= +2.7V

V_IN= +2.25V

2, 3

1

2.5

-

V

A_V= -1

R_L= 100Ω

-3

V

2, 3

1, 2

3

-

-2.5

-

V

Output Voltage

Swing

A_V= -1

R_L= 50Ω

2.5

1.5

-

V

-

V

A_V= -1

R_L= 50Ω

1, 2

3

+25^oC, +125^oC

-55^oC

-2.5

-1.5

V

-

V

Spec Number 511084-883

185

Specifications HFA1112/883

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

Device Tested at V_SUPPLY= ±5V, R_SOURCE= 0Ω, R_L= 100Ω, V_OUT= 0V, Unless Otherwise Specified.

LIMITS

GROUP A

D.C. PARAMETERS

SYMBOL

CONDITIONS

SUBGROUPS

TEMPERATURE

+25^oC, +125^oC

-55^oC

+25^oC, +125^oC

-55^oC

+25^oC

+125^oC, -55^oC

+25^oC

MIN

MAX

-

UNITS

mA

Output Current

+I_OUT

Note 2

1, 2

3

50

30

-

mA

-I_OUT

1, 2

3

-50

-30

26

33

-14

-

mA

-

mA

Quiescent Power

Supply Current

I_CC

R_L= 100Ω

1

14

-

mA

2, 3

1

mA

I_EE

-26

-33

mA

2, 3

+125^oC, -55^oC

mA

NOTES:

1. Guaranteed from +IN Common Mode Rejection Test, by: +R_IN= 1/CMS_IBP

.

2. Guaranteed from V_OUTTest with R_L= 50Ω, by: I_OUT= V_OUT/50Ω.

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

Table 2 Intentionally Left Blank.

Device Characterized at V_SUPPLY= ±5V, R_L= 100Ω, Unless Otherwise Specified.

LIMITS

PARAMETERS

SYMBOL

BW(-1)

BW(+1)

BW(+2)

GF30

CONDITIONS

NOTES

TEMPERATURE

+25^oC

MIN

450

500

350

-

MAX

UNITS

MHz

dB

-3dB Bandwidth

A_V= -1, V_OUT= 200mV_P-P

A_V= +1, V_OUT= 200mV_P-P

A_V= +2, V_OUT= 200mV_P-P

1

-

+25^oC

-

Gain Flatness

A_V= +2, f ≤ 30MHz

V_OUT= 200mV_P-P

±0.04

GF50

A

_V= +2, f ≤ 50MHz

1

+25^oC

-

±0.08

±0.22

dB

V_OUT= 200mV_P-P

GF100

A

_V= +2, f ≤ 100MHz

V_OUT= 200mV_P-P

Slew Rate

+SR(-1)

-SR(-1)

A

_V= -1, V_OUT= 5V_P-P

1, 2

+25^oC

1500

1800

900

800

1200

1100

-

V/µs

ps

A_V= -1, V_OUT= 5V_P-P

-

+SR(+1) A_V= +1, V_OUT= 5V_P-P

-SR(+1) A_V= +1, V_OUT= 5V_P-P

+SR(+2) A_V= +2, V_OUT= 5V_P-P

-

-SR(+2)

T_R(-1)

T_F(-1)

A_V= +2, V_OUT= 5V_P-P

A_V= -1, V_OUT= 0.5V_P-P

-

Rise and Fall Time

750

800

-

ps

T_R(+1)

T_F(+1)

T_R(+2)

T_F(+2)

A_V= +1, V_OUT= 0.5V_P-P

A_V= +2, V_OUT= 0.5V_P-P

1, 2

+25^oC

-

750

ps

1000

Spec Number 511084-883

186

Specifications HFA1112/883

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

Device Characterized at V_SUPPLY= ±5V, R_L= 100Ω, Unless Otherwise Specified.

LIMITS

PARAMETERS

Overshoot

SYMBOL

+OS(-1)

-OS(-1)

CONDITIONS

A_V= -1, V_OUT= 0.5V_P-P

NOTES

1, 3

1

TEMPERATURE

+25^oC

MIN

MAX

30

UNITS

%

-

+25^oC

25

%

+OS(+1) A_V= +1, V_OUT= 0.5V_P-P

-OS(+1) A_V= +1, V_OUT= 0.5V_P-P

+OS(+2) A_V= +2, V_OUT= 0.5V_P-P

65

%

60

%

20

%

-OS(+2)

TS(0.1)

A_V= +2, V_OUT= 0.5V_P-P

20

%

Settling Time

A_V= +2, to 0.1%

20

ns

V_OUT= 2V to 0V

TS(0.05) A_V= +2, to 0.05%

1

+25^oC

-

33

-45

-40

-35

-65

-55

-45

ns

V_OUT= 2V to 0V

2nd Harmonic

Distortion

HD2(30) A_V= +2, f = 30MHz

dBc

V_OUT= 2V_P-P

HD2(50)

HD2(100)

HD3(30)

HD3(50)

HD3(100)

A

_V= +2, f = 50MHz

V_OUT= 2V_P-P

A

_V= +2, f = 100MHz

V_OUT= 2V_P-P

3rd Harmonic

Distortion

A

_V= +2, f = 30MHz

V_OUT= 2V_P-P

A

_V= +2, f = 50MHz

V_OUT= 2V_P-P

A

_V= +2, f = 100MHz

V_OUT= 2V_P-P

NOTES:

1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These pa-

rameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by character-

ization based upon data from multiple production runs which reflect lot-to-lot and within lot variation.

2. Measured between 10% and 90% points.

3. For 200ps input transition times. Overshoot decreases as input transition times increase, especially for A_V= +1. Please refer to

Performance curves.

TABLE 4. ELECTRICAL TEST REQUIREMENTS

MIL-STD-883 TEST REQUIREMENTS

Interim Electrical Parameters (Pre Burn-In)

Final Electrical Test Parameters

Group A Test Requirements

SUBGROUPS (SEE TABLE 1)

1

1 (Note 1), 2, 3

1, 2, 3

Groups C and D Endpoints

1

NOTE:

1. PDA applies to Subgroup 1 only.

Spec Number 511084-883

187

HFA1112/883

Die Characteristics

DIE DIMENSIONS:

63 x 44 x 19 mils ± 1 mils

1600µm x 1130µm x 483µm ± 25.4µm

METALLIZATION:

Type: Metal 1: AICu(2%)/TiW

Type: Metal 2: AICu(2%)

Thickness: Metal 1: 8kÅ ± 0.4kÅ

Thickness: Metal 2: 16kÅ ± 0.8kÅ

GLASSIVATION:

Type: Nitride

Thickness: 4kÅ ± 0.5kÅ

WORST CASE CURRENT DENSITY:

5

2

2.0 x 10 A/cm at 47.5mA

TRANSISTOR COUNT: 52

SUBSTRATE POTENTIAL (Powered Up): Floating (Recommend Connection to V-)

Metallization Mask Layout

HFA1112/883

NC

+IN

V-

NC

-IN

NC

V+

OUT

Spec Number 511084-883

188

HFA1112/883

Test Circuit (Applies to Table 1)

V+

+

10

0.1

I_CC

V_Y

V_OS

V_Y

=

100

0.1

+

-

470pF

510

NC

x100

510

7

1

K2

2

-V_IN

-

1K

6

2

1

0.1

V_OUT

DUT

3

+

+V_IN

100

0.1

K1

2

4

100K (0.01%)

K3

V_Z

+I_BIAS

=

100K

-

+

10

0.1

V_Z

+

0.1

HA-5177

NOTE:

1. All Resistors = ±1% (Ω)

I_EE

2. All Capacitors = ±10% (µF)

3. Unless Otherwise Noted

V-

4. Chip Components Recommended

5. For A_V= +1, K1 = Position 1, K2 = Position 1

6. For A_V= +2, K1 = Position 1, K2 = Position 2, -V_IN= 0V

7. For A_V= -1, K1 = Position 1, K2 = Position 2, +V_IN= 0V

Test Waveforms

SIMPLIFIED TEST CIRCUIT FOR LARGE AND SMALL SIGNAL PULSE RESPONSE (Applies to Table 3)

A_V= +1 or +2 TEST CIRCUIT

V+

A_V= -1 TEST CIRCUIT

V+

7

2

3

6

+

-

V_OUT

2

V_OUT

2

V_IN

6

-

V_IN

2

3

+

50Ω

4

R_S

50Ω

4

R_S

50Ω

R_G

50Ω

V-

NOTE:

1. V_S= ±5V, R_G= 0Ω for A_V= +2, R_G= ∞ for A_V= +1

2. R_F= Internal, R_S= 50Ω

1. V_S= ±5V, A_V= -1

2. R_F= Internal

3. R_L= 100Ω For Small and Large Signals

3. R_S= 50Ω, R_L= 100Ω For Small and Large Signals

SMALL SIGNAL WAVEFORM

V_OUT

LARGE SIGNAL WAVEFORM

V_OUT

+2.5V

+250mV

90%

+SR

-SR

T_R, +OS

-250mV

T_F, -OS

10%

-2.5V

-250mV

Spec Number 511084-883

189

HFA1112/883

Burn-In Circuit

HFA1112MJ/883 CERAMIC DIP

300

1

2

3

4

8

7

6

5

D3

300

-

NC

V+

C1

D1

D4

V-

R1

D2

C2

NOTE:

1. R1 = 100Ω, ±5% (Per Socket)

2. C1 = C2 = 0.01µF (Per Socket) or 0.1µF (Per Row) Minimum

3. D1 = D2 = 1N4002 or Equivalent (Per Board)

4. D3 = D4 = 1N4002 or Equivalent (Per Socket)

5. V+ = +5.5V ± 0.5V

6. V- = -5.5V ± 0.5V

Spec Number 511084-883

190

HFA1112/883

Packaging

c1 LEAD FINISH

F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)

8 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE

INCHES MILLIMETERS

MIN

-D-

E

-A-

-B-

BASE

METAL

(c)

SYMBOL

MAX

0.200

0.026

0.023

0.065

0.045

0.018

0.015

0.405

0.310

MIN

-

MAX

5.08

0.66

0.58

1.65

1.14

0.46

0.38

10.29

7.87

NOTES

b1

A

b

-

2

3

-

M

0.014

0.045

0.023

0.008

-

0.36

1.14

0.58

0.20

-

(b)

b1

b2

b3

c

SECTION A-A

S

D

bbb

C A - B

D

4

2

3

5

-

BASE

Q

PLANE

A

-C-

c1

D

SEATING

PLANE

L

α

E

0.220

5.59

S1

e_A

A A

e

0.100 BSC

2.54 BSC

b2

eA/2

b

c

eA

eA/2

L

0.300 BSC

0.150 BSC

7.62 BSC

3.81 BSC

-

M

S

M

S

D

ccc

C A - B

D

aaa

C A - B

0.125

0.200

0.060

-

3.18

5.08

1.52

-

Q

0.015

0.38

6

7

-

NOTES:

S1

S2

α

0.005

0.13

1. Index area: A notch or a pin one identification mark shall be locat-

ed adjacent to pin one and shall be located within the shaded

area shown. The manufacturer’s identification shall not be used

as a pin one identification mark.

0.005

-

0.13

-

90^o

105^o

0.015

0.030

0.010

0.0015

90^o

105^o

0.38

0.76

0.25

0.038

-

aaa

bbb

ccc

M

-

2. The maximum limits of lead dimensions b and c or M shall be

measured at the centroid of the finished lead surfaces, when

solder dip or tin plate lead finish is applied.

-

2

8

3. Dimensions b1 and c1 apply to lead base metal only. Dimension

M applies to lead plating and finish thickness.

N

8

4. Corner leads (1, N, N/2, and N/2+1) may be configured with a

partial lead paddle. For this configuration dimension b3 replaces

dimension b1.

5. This dimension allows for off-center lid, meniscus, and glass

overrun.

6. Dimension Q shall be measured from the seating plane to the

base plane.

7. Measure dimension S1 at all four corners.

8. N is the maximum number of terminal positions.

9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.

10. Controlling Dimension: Inch.

11. Lead Finish: Type A.

12. Materials: Compliant to MIL-M-38510.

Spec Number 511084-883

191

TM

HFA1112

Ultra High Speed

Programmable Gain Buffer Amplifier

DESIGN INFORMATION

February 2002

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

Typical Performance Curves V_SUPPLY= ±5V, R_L= 100Ω, T_A= +25^oC, Unless Otherwise Specified

SMALL SIGNAL PULSE RESPONSE

A_V= +2

LARGE SIGNAL PULSE RESPONSE

A_V= +2

200

150

100

50

2.0

1.5

1.0

0.5

0

-0.5

-1.0

-1.5

-2.0

-50

-100

-150

-200

5ns/DIV

SMALL SIGNAL PULSE RESPONSE

LARGE SIGNAL PULSE RESPONSE

2.0

1.5

1.0

0.5

0

200

A_V= +1

150

100

50

0

-0.5

-1.0

-1.5

-2.0

-50

-100

-150

-200

5ns/DIV

SMALL SIGNAL PULSE RESPONSE

LARGE SIGNAL PULSE RESPONSE

2.0

1.5

1.0

0.5

0

200

150

100

50

A_V= -1

0

-0.5

-1.0

-1.5

-2.0

-50

-100

-150

-200

5ns/DIV

Spec Number 511084-883

192

HFA1112

DESIGN INFORMATION(Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

Typical Performance Curves V_SUPPLY= ±5V, R_L= 100Ω, T_A= +25^oC, Unless Otherwise Specified (Continued)

FREQUENCY RESPONSE

A_V= +1

FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS

6

A_V= +2, V_OUT= 200mV_P-P

9

V_OUT= 200mV_p-p

3

0

6

GAIN

3

A_V= -1

A_V= +2

-3

R_L= 50Ω

R_L= 100Ω

R_L= 1kΩ

0

-6

-9

0

PHASE

-90

A_V= +2

A_V= -1

A_V= +1

0

-180

-270

-360

PHASE

-90

-180

R_L= 100Ω

R_L= 50Ω

R_L= 1kΩ

-270

-360

0.3

1

10

100

1000

0.3

1

10

FREQUENCY (MHz)

100

1000

FREQUENCY (MHz)

FREQUENCY RESPONSE FOR VARIOUS LOAD RESISTORS

6

A_V= -1, V_OUT= 200mV_P-P

A_V= +1, V_OUT= 200mV_P-P

R_L= 1kΩ

3

R_L= 1kΩ

0

GAIN

R_L= 100Ω

R_L= 50Ω

GAIN

PHASE

1

R_L= 100Ω

R_L= 50Ω

-3

-6

-9

-3

-6

-9

R_L= 100Ω

180

90

0

PHASE

-90

R_L= 100Ω

R_L= 50Ω

0

-180

-270

-360

R_L= 50Ω

-90

-180

R_L= 1kΩ

0.3

1

10

FREQUENCY (MHz)

100

1000

0.3

10

FREQUENCY (MHz)

100

1000

FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES

12

FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES

6

A_V= +1

1V_P-P

A_V= +2

3

9

6

3

0

GAIN

V_OUT= 4V_P-P

-3

GAIN

V_OUT= 2.5V_P-P

-6

4.0V_P-P

2.5V_P-P

V_OUT= 1V_P-P

0

PHASE

-90

-180

-270

-360

V_OUT= 4V_P-P

4.0V_P-P

2.5V_P-P

-270

V_OUT= 2.5V_P-P

1V_P-P

V_OUT= 1V_P-P

-360

0.3

1

10

100

1000

0.3

1

10

FREQUENCY (MHz)

100

1000

FREQUENCY (MHz)

Spec Number 511084-883

193

HFA1112

DESIGN INFORMATION(Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

Typical Performance Curves V_SUPPLY= ±5V, R_L= 100Ω, T_A= +25^oC, Unless Otherwise Specified (Continued)

FREQUENCY RESPONSE FOR VARIOUS OUTPUT VOLTAGES

6

FULL POWER BANDWIDTH

V_OUT= 5V_P-P

15

12

9

A_V= -1

V_OUT= 2.5V_P-P

V_OUT= 4V_P-P

3

0

GAIN

V_OUT= 1V_P-P

-3

-6

6

3

PHASE

180

90

0

A_V= -1

A_V= +2

-3

-6

V_OUT= 4V_P-P

0

A_V= +1

V_OUT= 2.5V_P-P

V_OUT= 1V_P-P

-90

-180

-9

-12

-15

0.3

1

10

100

1000

0.3

1

10

FREQUENCY (MHz)

100

1000

FREQUENCY (MHz)

-3dB BANDWIDTH vs TEMPERATURE

GAIN FLATNESS

900

0.35

0.30

0.25

0.20

0.15

0.10

0.05

A_V= +1

A_V= -1

850

800

750

700

650

600

550

500

A_V= -1

A_V= +1

0

-0.05

-0.10

-0.15

A_V= +2

100

1

10

-50

-25

0

25

50

75

100

125

TEMPERATURE (^oC)

FREQUENCY (MHz)

DEVIATION FROM LINEAR PHASE

SETTLING RESPONSE

A_V= +2, V_OUT= 2V

4

3

2

1

0

0.6

0.4

A_V= -1

0.2

0.1

0

-0.1

-0.2

-1

A_V= +2

-2

-3

-4

-5

-6

A_V= +1

-0.4

-0.6

-2

3

8

13

18

23

28 33

38

43

48

0

15

30

45 60 75

90 105 120 135 150

TIME (ns)

FREQUENCY (MHz)

Spec Number 511084-883

194

HFA1112

DESIGN INFORMATION(Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

Typical Performance Curves V_SUPPLY= ±5V, R_L= 100Ω, T_A= +25^oC, Unless Otherwise Specified (Continued)

LOW FREQUENCY REVERSE ISOLATION (S₁₂

)

HIGH FREQUENCY REVERSE ISOLATION (S₁₂)

-24

-30

-36

-42

-48

-54

-60

-66

-72

-78

-84

235

180

90

45

0

PHASE

A_V= +1

A_V= -1

A_V= +2

GAIN

-24

-30

-36

-42

-48

-54

-60

A_V= +2

A_V= -1

A_V= +2

A_V= +1

A_V= -1

A_V= +2

A_V= -1

100 190 280 370 460 550 640 730 820 910 1000

20

40 60

80 100 120 140 160 180 200

FREQUENCY (MHz)

0

FREQUENCY (MHz)

1dB GAIN COMPRESSION vs FREQUENCY

3rd ORDER INTERMODULATION INTERCEPT vs FREQUENCY

30

20

18

16

14

12

10

8

2 - TONE

A_V= -1

20

A_V= +2

A_V= +1

10

6

4

2

0

100

0

100

200

300

400

200

300

400

500

FREQUENCY (MHz)

2nd HARMONIC DISTORTION vs P_OUT

A_V= +2

3rd HARMONIC DISTORTION vs P_OUT

A_V= +2

-20

-30

-40

-50

-60

-70

-80

-90

-100

-30

-40

-50

-60

-70

-80

-90

-100

30MHz

50MHz

100MHz

30MHz

50MHz

100MHz

-6

-3

0

3

6

9

12

15

18

-6

-3

0

3

6

9

12

15

OUTPUT POWER (dBm)

Spec Number 511084-883

195

HFA1112

DESIGN INFORMATION(Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

Typical Performance Curves V_SUPPLY= ±5V, R_L= 100Ω, T_A= +25^oC, Unless Otherwise Specified (Continued)

2nd HARMONIC DISTORTION vs P_OUT

A_V= +1

3rd HARMONIC DISTORTION vs P_OUT

A_V= +1

-20

-30

-40

-20

-30

-40

-50

-60

-70

-80

-50

-60

-70

-80

30MHz

50MHz

100MHz

30MHz

6

50MHz

-90

-100

-6

-3

0

3

6

9

12

15

-6

-3

0

3

9

12

15

OUTPUT POWER (dBm)

2nd HARMONIC DISTORTION vs P_OUT

A_V= -1

3rd HARMONIC DISTORTION vs P_OUT

A_V= -1

-20

-30

-40

-20

-30

-40

-50

-60

-70

-80

-50

-60

50MHz

30MHz

100MHz

-70

-80

30MHz

50MHz

100MHz

-90

-100

-6

-3

0

3

6

9

12

15

-6

-3

0

3

6

9

12

15

OUTPUT POWER (dBm)

INTEGRAL LINEARITY ERROR

OVERSHOOT vs INPUT RISE TIME

V_OUT= 0.5V

+0.04

+0.02

0

60

50

40

30

20

A_V= +1

-0.02

-0.04

A_V= -1

10

0

A_V= +2

300

-3.0

-2.0

-1.0

0

+1.0

+2.0

+3.0

100

500

700

900

1100

1300

INPUT VOLTAGE (V)

INPUT RISE TIME (ps)

Spec Number 511084-883

196

HFA1112

DESIGN INFORMATION(Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

Typical Performance Curves V_SUPPLY= ±5V, R_L= 100Ω, T_A= +25^oC, Unless Otherwise Specified (Continued)

OVERSHOOT vs INPUT RISE TIME

V_OUT= 1V

OVERSHOOT vs INPUT RISE TIME

V_OUT= 2V

60

50

40

30

20

60

50

40

30

20

A_V= +1

A_V= +2

A_V= -1

10

0

10

0

A_V= -1

A_V= +2

100

300

500

700

900

1100

1300

100

300

500

700

900

1100

1300

INPUT RISE TIME (ps)

SUPPLY CURRENT vs SUPPLY VOLTAGE

SUPPLY CURRENT vs TEMPERATURE

25

24

23

22

21

20

19

18

17

16

15

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

-50

-25

0

25

50

75

100

125

5

6

7

8

9

10

TEMPERATURE (^oC)

TOTAL SUPPLY VOLTAGE (V+ - V-, V)

OUTPUT VOLTAGE vs TEMPERATURE

A_V= -1

INPUT NOISE CHARACTERISTICS

50

40

30

20

10

0

130

110

3.6

3.5

3.4

3.3

3.2

3.1

+V_OUT(R_L= 50Ω)

+V_OUT(R_L= 100Ω)

|-V_OUT| (R_L= 100Ω)

90

70

3.0

2.9

eni

ini

50

30

2.8

2.7

2.6

|-V_OUT| (R_L= 50Ω)

0.1

1

10

100

-50

-25

0

25

50

75

100

125

TEMPERATURE (^oC)

FREQUENCY (kHz)

Spec Number 511084-883

197

HFA1112

DESIGN INFORMATION(Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

Application Information

Driving Capacitive Loads

Closed Loop Gain Selection

Capacitive loads, such as an A/D input, or an improperly

terminated transmission line will degrade the amplifier’s

phase margin resulting in frequency response peaking and

possible oscillations. In most cases, the oscillation can be

The HFA1112 features a novel design which allows the user

to select from three closed loop gains, without any external

components. The result is a more flexible product, fewer part

types in inventory, and more efficient use of board space.

avoided by placing a resistor (R ) in series with the output

S

prior to the capacitance.

This “buffer” operates in closed loop gains of -1, +1, or +2,

and gain selection is accomplished via connections to the

±inputs. Applying the input signal to +IN and floating -IN

selects a gain of +1, while grounding -IN selects a gain of +2.

A gain of -1 is obtained by applying the input signal to -IN

with +IN grounded.

Figure 1 details starting points for the selection of this resis-

tor. The points on the curve indicate the R and C combina-

S

L

tions for the optimum bandwidth, stability, and settling time,

but experimental fine tuning is recommended. Picking a

point above or to the right of the curve yields an overdamped

response, while points below or left of the curve indicate

areas of underdamped performance.

The table below summarizes these connections:

R

and C form a low pass network at the output, thus

L

S

CONNECTIONS

GAIN

limiting system bandwidth well below the amplifier bandwidth

of 850MHz. By decreasing R as C increases (as illustrated

S

L

(A_CL

)

+INPUT (PIN 3)

-INPUT (PIN 2)

in the curves), the maximum bandwidth is obtained without

sacrificing stability. Even so, bandwidth does decrease as

you move to the right along the curve. For example, at

-1

GND

Input

+1

Input

NC (Floating)

GND

A

= +1, R = 50Ω, C = 30pF, the overall bandwidth is lim-

V

S L

ited to 300MHz, and bandwidth drops to 100MHz at A = +1,

V

+2

Input

R = 5Ω, C = 340pF.

S

L

PC Board Layout

The frequency response of this amplifier depends greatly on

the amount of care taken in designing the PC board. The

use of low inductance components such as chip resis-

tors and chip capacitors is strongly recommended,

while a solid ground plane is a must!

50

45

40

35

30

25

20

15

10

5

A_V= +1

Attention should be given to decoupling the power supplies.

A large value (10µF) tantalum in parallel with a small value

(0.1µF) chip capacitor works well in most cases.

A_V= +2

40

0

80 120 160 200 240 280 320 360 400

LOAD CAPACITANCE (pF)

Terminated microstrip signal lines are recommended at the

input and output of the device. Capacitance directly on the

output must be minimized, or isolated as discussed in the

next section.

FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs

LOAD CAPACITANCE

For unity gain applications, care must also be taken to

minimize the capacitance to ground seen by the amplifier’s

inverting input. At higher frequencies this capacitance will

tend to short the -INPUT to GND, resulting in a closed loop

gain which increases with frequency. This will cause

excessive high frequency peaking and potentially other

problems as well.

An example of a good high frequency layout is the Evalua-

tion Board shown in Figure 2.

Spec Number 511084-883

198

HFA1112

Evaluation Board

BOTTOM LAYOUT

TOP LAYOUT

V_H

The performance of the HFA1112 may be evaluated using

the HFA11XX Evaluation Board, slightly modified as follows:

1. Remove the 500Ω feedback resistor (R2), and leave the

1

connection open.

+IN

2. a. For A = +1 evaluation, remove the 500Ω gain setting

V

OUT

V+

resistor (R1), and leave pin 2 floating.

V

^LV-

GND

b. For A = +2, replace the 500Ω gain setting resistor with

V

a 0Ω resistor to GND.

The layout and modified schematic of the board are shown

in Figure 2.

∞ (A_V= +1)

or 0Ω (A_V= +2)

V_H

To order evaluation boards, please contact your local sales

office.

R1

1

8

0.1µF

50Ω

10µF

+5V

2

3

4

7

6

5

50Ω

IN

OUT

V_L

GND

0.1µF

10µF

-5V

GND

FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice.

Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reli-

able. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may

result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

Spec Number 511084-883

199

HFA1112

DESIGN INFORMATION(Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

TYPICAL PERFORMANCE CHARACTERISTICS

Device Characterized at: V_SUPPLY= ±5V, A_V= +1V/V, R_L= 100Ω, Unless Otherwise Specified

PARAMETERS

Output Offset Voltage

CONDITIONS

TEMPERATURE

+25^oC

Full

TYPICAL

8

UNITS

mV

V

= 0V

CM

Versus Temperature

= 0V

Average Offset Voltage Drift

+Input Current

10

µV/^oC

µA

V

+25^oC

Full

25

CM

+Input Resistance

+Input Noise Voltage

+Input Noise Current

Input Common Mode Range

Gain

∆V

= 2V

50

kΩ

CM

f = 100kHz

9

nV/√Hz

pA/√Hz

V

37

±2.8

0.99

1.98

0.02

±60

A_V= +1, V_IN= 2V

+25^oC

+25^oC to +125^oC

-55^oC to 0^oC

+25^oC

Full

V/V

Gain

A_V= +2, V_IN= 1V

V/V

DC Non-Linearity

Output Current

A_V= +2, ±2V Full Scale

A_V= -1, R_L= 50Ω

%

mA

A_V= -1, R_L= 50Ω

±50

mA

DC Closed Loop Output Resistance

Quiescent Supply Current

-3dB Bandwidth

A_V= +2

0.3

Ω

R_L= Open

24

mA

A_V= -1, V_OUT= 200mV_P-P

A_V= +1, V_OUT= 200mV_P-P

A_V= +2, V_OUT= 200mV_P-P

A_V= -1, V_OUT= 5V_P-P

A_V= +1, V_OUT= 5V_P-P

A_V= +2, V_OUT= 5V_P-P

A_V= -1, V_OUT= 5V_P-P

A_V= +1, V_OUT= 5V_P-P

A_V= +2, V_OUT= 5V_P-P

To 30MHz, A_V= -1

+25^oC

800

MHz

V/µs

MHz

dB

850

550

Slew Rate

2400

1500

1900

300

Full Power Bandwidth

Gain Flatness

150

220

±0.02

±0.10

±0.015

±0.05

±0.20

±0.036

±0.10

±0.07

±0.13

±0.83

±0.05

-52

To 30MHz, A_V= +1

To 30MHz, A_V= +2

To 50MHz, A_V= -1

dB

To 50MHz, A_V= +1

To 50MHz, A_V= +2

To 100MHz, A_V= -1

To 100MHz, A_V= +2

To 100MHz, A_V= -1

To 100MHz, A_V= +1

To 100MHz, A_V= +2

30MHz, A_V= -1, V_OUT= 2V_P-P

30MHz, A_V= +1, V_OUT= 2V_P-P

30MHz, A_V= +2, V_OUT= 2V_P-P

dB

Gain Flatness

dB

Linear Phase Deviation

Degrees

dBc

2nd Harmonic Distortion

-57

-52

Spec Number 511084-883

200

HFA1112

DESIGN INFORMATION(Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

TYPICAL PERFORMANCE CHARACTERISTICS

Device Characterized at: V_SUPPLY= ±5V, A_V= +1V/V, R_L= 100Ω, Unless Otherwise Specified

PARAMETERS

3rd Harmonic Distortion

CONDITIONS

30MHz, A_V= -1, V_OUT= 2V_P-P

30MHz, A_V= +1, V_OUT= 2V_P-P

30MHz, A_V= +2, V_OUT= 2V_P-P

50MHz, A_V= -1, V_OUT= 2V_P-P

50MHz, A_V= +1, V_OUT= 2V_P-P

50MHz, A_V= +2, V_OUT= 2V_P-P

50MHz, A_V= -1, V_OUT= 2V_P-P

50MHz, A_V= +1, V_OUT= 2V_P-P

50MHz, A_V= +2, V_OUT= 2V_P-P

100MHz, A_V= -1, V_OUT= 2V_P-P

100MHz, A_V= +1, V_OUT= 2V_P-P

100MHz, A_V= +2, V_OUT= 2V_P-P

100MHz, A_V= -1, V_OUT= 2V_P-P

100MHz, A_V= +1, V_OUT= 2V_P-P

100MHz, A_V= +2, V_OUT= 2V_P-P

100MHz, A_V= +2

TEMPERATURE

+25^oC

TYPICAL

-71

-73

-72

-47

-53

-47

-63

-68

-65

-41

-50

-42

-55

-49

-62

28

UNITS

dBc

dBm

dB

2nd Harmonic Distortion

3rd Harmonic Distortion

2nd Harmonic Distortion

3rd Harmonic Distortion

3rd Order Intercept

1dB Compression

300MHz, A_V= +2

13

100MHz, A_V= +2

19

300MHz, A_V= +2

12

Reverse Isolation (S₁₂

Rise & Fall Time

Overshoot

)

40MHz

-70

-60

-32

500

480

700

12

100MHz

dB

600MHz

dB

A_V= -1, V_OUT= 0.5V_P-P

A_V= +1, V_OUT= 0.5V_P-P

A_V= +2, V_OUT= 0.5V_P-P

A_V= -1, V_OUT= 0.5V_P-P

A_V= +1, V_OUT= 0.5V_P-P

A_V= +2, V_OUT= 0.5V_P-P

A_V= +2, to 0.1%, V_OUT= 2V to 0V

A_V= +2, to 0.05%, V_OUT= 2V to 0V

A_V= +2, to 0.02%, V_OUT= 2V to 0V

A_V= +2, V_IN= 5V_P-P

ps

%

45

%

6

%

Settling Time

13

ns

20

ns

36

ns

Overdrive Recovery Time

Differential Gain

8.5

0.02

0.04

ns

A_V= +2, R_L= 150Ω, NTSC

%

Differential Phase

Degrees

Spec Number 511084-883

201


型号：	HFA1112MJ/883
厂家：	Intersil
描述：	Ultra High Speed Programmable Gain Buffer Amplifier 超高速可编程增益缓冲放大器缓冲放大器
文件：	总18页 (文件大小：432K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HFA1112MJ/883 [INTERSIL]

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