HGT5A40N60A4D [INTERSIL]
600V, SMPS Series N-Channel IGBT with Anti-Parallel Hyperfast Diode; 600V ，开关电源系列N沟道IGBT与反并联二极管超高速
| 型号： | HGT5A40N60A4D |
| 厂家： | 
Intersil |
| 描述： | 600V, SMPS Series N-Channel IGBT with Anti-Parallel Hyperfast Diode |
| 文件： | 总9页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HGT5A40N60A4D
Data Sheet
February 2000
File Number 4783.1
600V, SMPS Series N-Channel IGBT with
Anti-Parallel Hyperfast Diode
Features
• 100kHz Operation at 390V, 40A
• 200kHz Operation at 390V, 20A
• 600V Switching SOA Capability
The HGT5A40N60A4D is a MOS gated high voltage
switching device combining the best features of a MOSFET
and a bipolar transistor. This device has the high input
impedance of a MOSFET and the low on-state conduction
loss of a bipolar transistor. The much lower on-state voltage
o
• Typical Fall Time. . . . . . . . . . . . . . . . . . 55ns at T = 125
J
• Low Conduction Loss
o
o
drop varies only moderately between 25 C and 150 C. The
IGBT used is the development type TA49347. The diode
used in anti-parallel is the development type 49374.
Packaging
JEDEC STYLE STRETCH TO-247
This IGBT is ideal for many high voltage switching
applications operating at high frequencies where low
conduction losses are essential. This device has been
optimized for high frequency switch mode power supplies.
E
C
G
Formerly Developmental Type TA49349.
Ordering Information
COLLECTOR
(FLANGE)
PART NUMBER
PACKAGE
BRAND
40N60A4D
HGT5A40N60A4D
TO-247-ST
NOTE: When ordering, use the entire part number.
Symbol
C
G
E
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,598,461
4,682,195
4,803,533
4,888,627
4,417,385
4,605,948
4,684,413
4,809,045
4,890,143
4,430,792
4,620,211
4,694,313
4,809,047
4,901,127
4,443,931
4,631,564
4,717,679
4,810,665
4,904,609
4,466,176
4,639,754
4,743,952
4,823,176
4,933,740
4,516,143
4,639,762
4,783,690
4,837,606
4,963,951
4,532,534
4,641,162
4,794,432
4,860,080
4,969,027
4,587,713
4,644,637
4,801,986
4,883,767
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000
2-1
HGT5A40N60A4D
o
Absolute Maximum Ratings T = 25 C, Unless Otherwise Specified
C
HGT5A40N60A4D
UNITS
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BV
600
V
CES
Collector Current Continuous
o
At T = 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C
75
A
A
A
V
V
C25
o
At T = 110 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
63
C
C110
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
300
CM
GES
GEM
Gate to Emitter Voltage Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
±20
±30
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
o
Switching Safe Operating Area at T = 150 C, Figure 2 . . . . . . . . . . . . . . . . . . . . . . .SSOA
J
200A at 600V
625
o
Power Dissipation Total at T = 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
C
W
D
o
o
Power Dissipation Derating T > 25 C
5
W/ C
C
o
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . T , T
-55 to 150
260
C
J
STG
o
Maximum Lead Temperature for Soldering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
C
L
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. Pulse width limited by maximum junction temperature.
o
Electrical Specifications T = 25 C, Unless Otherwise Specified
J
PARAMETER
SYMBOL
BV
TEST CONDITIONS
= 250µA, V = 0V
MIN
TYP
MAX
-
UNITS
V
Collector to Emitter Breakdown Voltage
Collector to Emitter Leakage Current
I
600
-
-
CES
C
GE
o
I
V
= BV
T = 25 C
J
-
250
3.0
2.7
2.0
7
µA
mA
V
CES
CE CES
o
T = 125 C
J
-
-
-
o
Collector to Emitter Saturation Voltage
V
I
= 40A,
T = 25 C
J
1.7
1.5
5.6
-
CE(SAT)
C
V
= 15V
GE
o
T = 125 C
-
V
J
Gate to Emitter Threshold Voltage
Gate to Emitter Leakage Current
Switching SOA
V
I
= 250µA, V
= V
GE
4.5
-
V
GE(TH)
C CE
I
V
= ±20V
±250
-
nA
A
GES
GE
o
SSOA
T = 150 C, R = 2.2Ω, V
= 15V
200
-
J
G
GE
L = 100µH, V = 600V
CE
Gate to Emitter Plateau Voltage
On-State Gate Charge
V
I
I
= 40A, V
= 40A,
= 0.5 BV
CE CES
-
-
-
-
-
-
-
-
-
-
8.5
350
450
25
-
V
GEP
C
Q
V
= 15V
405
nC
nC
ns
ns
ns
ns
µJ
µJ
µJ
g(ON)
C
GE
V
= 0.5 BV
CES
CE
V
= 20V
520
GE
o
Current Turn-On Delay Time
Current Rise Time
t
IGBT and Diode at T = 25 C
-
-
-
-
-
-
-
d(ON)I
J
I
= 40A
CE
t
18
rI
V
V
= 0.65 BV
=15V
CE
CES
Current Turn-Off Delay Time
Current Fall Time
t
GE
145
35
d(OFF)I
R = 2.2Ω
L = 200µH
Test Circuit (Figure 24)
G
t
fI
Turn-On Energy (Note 2)
Turn-On Energy (Note 2)
Turn-Off Energy (Note 3)
E
E
E
400
850
370
ON1
ON2
OFF
2-2
HGT5A40N60A4D
o
Electrical Specifications T = 25 C, Unless Otherwise Specified (Continued)
J
PARAMETER
Current Turn-On Delay Time
Current Rise Time
SYMBOL
TEST CONDITIONS
MIN
TYP
27
MAX
-
UNITS
ns
o
t
IGBT and Diode at T = 125 C
-
-
-
-
-
-
-
-
-
-
-
-
d(ON)I
J
I
V
V
= 40A
CE
t
20
-
ns
rI
d(OFF)I
= 0.65 BV
= 15V
CE
CES
Current Turn-Off Delay Time
Current Fall Time
t
GE
185
55
225
95
-
ns
R = 2.2Ω
L = 200µH
Test Circuit (Figure 24)
G
t
ns
fI
Turn-On Energy (Note 2)
Turn-On Energy (Note 2)
Turn-Off Energy (Note 3)
Diode Forward Voltage
Diode Reverse Recovery Time
E
E
E
400
1220
700
2.25
48
µJ
ON1
ON2
OFF
1400
800
2.7
55
45
0.2
1
µJ
µJ
V
I
I
I
= 40A
V
EC
EC
EC
EC
t
= 40A, dI /dt = 200A/µs
EC
ns
rr
= 1A, dI /dt = 200A/µs
EC
38
ns
o
Thermal Resistance Junction To Case
NOTES:
R
IGBT
-
C/W
θJC
o
Diode
-
C/W
2. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. E
is the turn-on loss of the IGBT only. E
ON2
ON1
is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same T as the IGBT. The diode type is specified in
J
Figure 24.
3. Turn-Off Energy Loss (E
) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
OFF
at the point where the collector current equals zero (I = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
CE
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
Typical Performance Curves Unless Otherwise Specified
80
225
V
= 15V
o
GE
T
= 150 C, R = 2.2Ω, V = 15V, L = 100µH
GE
J
G
70
60
50
40
30
20
10
0
200
175
150
125
100
75
PACKAGE LIMITED
50
25
0
25
50
75
100
125
150
0
100
200
300
400
500
600
700
o
T
, CASE TEMPERATURE ( C)
C
V , COLLECTOR TO EMITTER VOLTAGE (V)
CE
FIGURE 1. DC COLLECTOR CURRENT vs CASE
TEMPERATURE
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
2-3
HGT5A40N60A4D
Typical Performance Curves Unless Otherwise Specified (Continued)
300
12
1200
1000
800
o
T
V
V
= 390V, R = 2.2Ω, T = 125 C
C
o
GE
15V
200
CE
G
J
75 C
10
8
I
SC
100
f
f
= 0.05 / (t
d(OFF)I
+ t
)
MAX1
d(ON)I
+ E
= (P - P ) / (E
)
MAX2
D
C
ON2
OFF
P
= CONDUCTION DISSIPATION
C
6
600
(DUTY FACTOR = 50%)
o
R
= 0.2 C/W, SEE NOTES
ØJC
t
SC
4
400
R
= 2.2Ω, L = 200µH, V
= 390V
G
CE
10
2
10
200
16
3
10
40
70
11
12
13
14
15
I
, COLLECTOR TO EMITTER CURRENT (A)
V
, GATE TO EMITTER VOLTAGE (V)
CE
GE
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
80
80
DUTY CYCLE < 0.5%, V
= 12V
PULSE DURATION = 250µs
DUTY CYCLE < 0.5%, V
GE
= 15V
GE
PULSE DURATION = 250µs
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
o
T
= 125 C
J
o
T
= 125 C
J
o
T
= 25 C
J
o
T
= 25 C
J
o
= 150 C
o
= 150 C
T
T
J
J
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
, COLLECTOR TO EMITTER VOLTAGE (V)
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
, COLLECTOR TO EMITTER VOLTAGE (V)
V
V
CE
CE
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
5500
1800
R
= 2.2Ω, L = 200µH, V
= 390V
R
= 2.2Ω, L = 200µH, V
= 390V
CE
G
CE
G
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
1600
1400
1200
1000
800
600
400
200
0
o
T
= 125 C, V
= 12V, V
= 15V
J
GE
GE
o
T
= 125 C, V
= 12V OR 15V
J
GE
o
= 25 C, V
T
= 12V OR 15V
GE
J
o
T
= 25 C, V
= 12V, V = 15V
GE
J
GE
0
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
I
, COLLECTOR TO EMITTER CURRENT (A)
I
CE
, COLLECTOR TO EMITTER CURRENT (A)
CE
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
2-4
HGT5A40N60A4D
Typical Performance Curves Unless Otherwise Specified (Continued)
120
100
80
60
40
20
0
42
40
38
36
34
32
30
28
26
24
22
R
= 2.2Ω, L = 200µH, V
= 390V
R
= 2.2Ω, L = 200µH, V
= 390V
CE
G
CE
G
o
o
T
= 25 C, T = 125 C, V
GE
= 15V
J
J
o
o
T
= 125 C, T = 25 C, V
= 12V
GE
J
J
o
o
T
= 25 C, T = 125 C, V
= 15V
o
o
J
J
GE
70
, COLLECTOR TO EMITTER CURRENT (A)
T
= 25 C, T = 125 C, V
= 15V
70
J
J
GE
0
10
I
20
30
40
50
60
80
0
10
20
30
40
50
60
80
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
CE
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
190
70
R
= 2.2Ω, L = 200µH, V = 390V
CE
R
= 2.2Ω, L = 200µH, V
= 390V
G
G
CE
65
60
55
50
45
40
35
30
180
170
160
150
140
130
o
T
= 125 C, V
= 12V OR 15V
J
GE
o
V
= 12V, V
GE
= 15V, T = 125 C
J
GE
o
o
V
= 12V OR 15V, T = 25 C
T
= 25 C, V = 12V OR 15V
GE
GE
J
J
0
10
I
20
30
40
50
60
70
80
0
10
I
20
30
40
50
60
70
80
, COLLECTOR TO EMITTER CURRENT (A)
, COLLECTOR TO EMITTER CURRENT (A)
CE
CE
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER
CURRENT
16
400
o
I
= 1mA, R = 7.5Ω, T = 25 C
DUTY CYCLE < 0.5%, V
= 10V
PULSE DURATION = 250µs
G(REF)
L
C
CE
14
12
10
8
350
300
250
200
150
100
50
V
= 600V
CE
V
= 400V
CE
o
o
T
= -55 C
J
T
= 125 C
J
V
= 200V
CE
6
o
T
= 25 C
J
4
2
0
0
0
50
100
150
200
250
300
350
400
6
7
8
9
10
11
Q
, GATE CHARGE (nC)
V
, GATE TO EMITTER VOLTAGE (V)
G
GE
FIGURE 13. TRANSFER CHARACTERISTIC
FIGURE 14. GATE CHARGE WAVEFORMS
2-5
HGT5A40N60A4D
Typical Performance Curves Unless Otherwise Specified (Continued)
6
5
4
3
2
1
0
100
10
1
o
o
T
V
= 125 C, L = 200µH
J
T
= 125 C, L = 200µH, V
CE
= 390V, V = 15V
GE
J
= 390V, V
= 15V
+ E
OFF
CE
GE
E
= E
+E
ON2 OFF
TOTAL
E
= E
TOTAL
ON2
I
= 80A
CE
I
I
= 80A
= 40A
CE
CE
I
= 40A
CE
I
= 20A
CE
I
= 20A
CE
0.1
25
50
75
100
125
150
1
10
100
500
o
R
, GATE RESISTANCE (Ω)
T
, CASE TEMPERATURE ( C)
G
C
FIGURE 15. TOTAL SWITCHING LOSS vs CASE
TEMPERATURE
FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE
14
2.4
FREQUENCY = 1MHz
DUTY CYCLE < 0.5%, V
= 15V
PULSE DURATION = 250µs, T = 25 C
GE
o
12
10
8
J
2.3
2.2
2.1
2.0
1.9
C
IES
I
I
= 80A
= 40A
CE
CE
6
4
2
0
C
OES
I
= 20A
14
CE
C
RES
8
9
10
11
12
13
15
16
0
10
20
30
40
50
60
70
80
90 100
V
, COLLECTOR TO EMITTER VOLTAGE (V)
CE
V
, GATE TO EMITTER VOLTAGE (V)
GE
FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE
vs GATE TO EMITTER VOLTAGE
50
120
dI /dt = 200A/µs
DUTY CYCLE < 0.5%,
PULSE DURATION = 250µs
EC
110
100
90
80
70
60
50
40
30
20
10
0
45
o
40
125 C t
rr
35
o
= 125 C
T
J
o
30
25
20
15
10
5
125 C t
b
o
125 C t
a
o
25 C t
rr
o
T
= 25 C
J
o
25 C t
a
o
25 C t
b
0
0
5
10
15
20
25
30
35
40
0
0.5
1.0
1.5
2.0
2.5
I
, FORWARD CURRENT (A)
V
, FORWARD VOLTAGE (V)
EC
EC
FIGURE 19. DIODE FORWARD CURRENT vs FORWARD
VOLTAGE DROP
FIGURE 20. RECOVERY TIMES vs FORWARD CURRENT
2-6
HGT5A40N60A4D
Typical Performance Curves Unless Otherwise Specified (Continued)
70
65
60
55
50
45
40
35
30
25
20
15
2000
V
= 390V
CE
I
= 40A, V = 390V
CE
EC
1750
1500
o
125 C t
o
a
125 C I
= 40A
EC
o
1250
1000
750
125 C I
= 20A
EC
o
125 C t
b
o
25 C I
= 40A
= 20A
EC
500
o
25 C t
a
b
o
25 C I
250
EC
o
25 C t
0
200
10
400
600
800
1000
200
300
400
500
600
700
800
900
1000
dI /dt, RATE OF CHANGE OF CURRENT (A/µs)
EC
dI /dt, RATE OF CHANGE OF CURRENT (A/µs)
EC
FIGURE 21. RECOVERY TIMES vs RATE OF CHANGE OF
CURRENT
FIGURE 22. STORED CHARGE vs RATE OF CHANGE OF
CURRENT
0
10
0.50
0.20
0.10
t
1
P
D
-1
10
t
2
0.05
DUTY FACTOR, D = t / t
1
2
0.02
0.01
PEAK T = (P X Z
X R
) + T
J
D
θJC
θJC C
SINGLE PULSE
-2
10
-5
-4
-3
-2
10
-1
10
0
1
10
10
10
t , RECTANGULAR PULSE DURATION (s)
10
10
1
FIGURE 23. NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
Test Circuit and Waveforms
HGT5A40N60A4D
90%
OFF
10%
ON2
V
GE
E
E
L = 200µH
V
CE
R
= 2.2Ω
G
90%
10%
d(OFF)I
+
-
I
CE
t
t
V
= 390V
rI
DD
t
fI
t
d(ON)I
FIGURE 24. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 25. SWITCHING TEST WAVEFORMS
2-7
HGT5A40N60A4D
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to gate-
insulation damage by the electrostatic discharge of energy
through the devices. When handling these devices, care
should be exercised to assure that the static charge built in
the handler’s body capacitance is not discharged through
the device. With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (I ) plots are possible using
CE
the information shown for a typical unit in Figures 5, 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows f
or f
; whichever is smaller at each
MAX1
MAX2
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
f
is defined by f
MAX1
= 0.05/(t ).
+ t
MAX1
d(OFF)I d(ON)I
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD™ LD26” or equivalent.
are possible. t
and t
are defined in Figure 25.
d(OFF)I
d(ON)I
Device turn-off delay can establish an additional frequency
limiting condition for an application other than T . t
JM d(OFF)I
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
is important when controlling output ripple under a lightly
loaded condition.
f
is defined by f
MAX2
= (P - P )/(E
OFF
+ E ). The
ON2
MAX2
D
C
3. Tips of soldering irons should be grounded.
allowable dissipation (P ) is defined by P = (T - T )/R
.
D
D
JM θJC
C
4. Devices should never be inserted into or removed from
circuits with power on.
The sum of device switching and conduction losses must
not exceed P . A 50% duty factor was used (Figure 3) and
D
5. Gate Voltage Rating - Never exceed the gate-voltage
the conduction losses (P ) are approximated by
C
rating of V
. Exceeding the rated V can result in
GEM
GE
P
= (V
x I )/2.
CE
C
CE
permanent damage to the oxide layer in the gate region.
E
and E
are defined in the switching waveforms
OFF
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to
voltage buildup on the input capacitor due to leakage
currents or pickup.
ON2
shown in Figure 25. E
instantaneous power loss (I
is the integral of the
ON2
x V ) during turn-on and
CE
CE
is the integral of the instantaneous power loss
E
OFF
(I
x V ) during turn-off. All tail losses are included in the
CE
CE
calculation for E
; i.e., the collector current equals zero
OFF
7. Gate Protection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
(I
= 0).
CE
ECCOSORBD is a Trademark of Emerson and Cumming, Inc.
2-8
HGT5A40N60A4D
Stretch-247
3 LEAD JEDEC STYLE TO-247 PLASTIC PACKAGE
A
INCHES
MIN
MILLIMETERS
TERM. 4
E
SYMBOL
MAX
0.190
0.051
0.070
0.105
0.026
0.820
0.625
MIN
4.58
MAX
4.82
NOTES
A
b
0.180
0.046
0.060
0.095
0.020
0.800
0.605
-
Q
1.17
1.29
2, 3
ØR
b
b
1.53
1.77
1, 2
1
2
D
2.42
2.66
1, 2
c
0.51
0.66
1, 2, 3
D
E
e
20.32
15.37
20.82
15.87
-
-
L
1
b1
b2
0.219 TYP
0.438 BSC
5.56 TYP
11.12 BSC
4
4
5
-
L
c
e
1
b
J
0.090
0.105
0.640
0.155
0.220
0.205
2.29
2.66
16.25
3.93
1
L
0.620
0.145
0.210
0.195
15.75
3.69
5.34
4.96
1
2
3
3
2
1
J
e
1
L
1
-
BACK VIEW
1
Q
5.58
e1
ØR
5.20
-
NOTES:
1. Lead dimension and finish uncontrolled in L .
1
2. Lead dimension (without solder).
3. Add typically 0.002 inches (0.05mm) for solder plating.
4. Position of lead to be measured 0.250 inches (6.35mm) from bottom
of dimension D.
5. Position of lead to be measured 0.100 inches (2.54mm) from bottom
of dimension D.
6. Controlling dimension: Inch.
7. Revision 1 dated 8-99.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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2-9
相关型号：
HGTD10N40F1S9A
Insulated Gate Bipolar Transistor, 12A I(C), 400V V(BR)CES, N-Channel, TO-252AA
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