HIP0050_技术文档

HIP0050

0.3A/50V Octal Low Side Power Driver with

Serial Bus Control and Over-Current Fault Flag

December 1996

Features

Description

• Octal NDMOS Output Drivers in a High Voltage The HIP0050 is a logic controlled, eight channel Octal Low Side

Power BiMOS Process

Power Driver. As shown in the block diagram, the outputs are con-

trolled via the serial data interface which allows the data to be

shifted out, allowing control of other cascaded serial devices. If an

Over-Current (OC) short circuit exists in one output, it may be inde-

pendently shutdown while the other outputs remain in operation.

When a shorted output is latched off, it may be turned back on

when the next serial input data is latched. A fault ﬂag (FLT) is set to

a low status to indicate current-limited shutdown. The outputs are

independently latched off when an OC fault is detected. The fault

latch is cleared on the next data strobe. Over-Temperature (OT)

shutdown is provided with hysteresis to force global shutdown of

all output drivers. Shutdown is maintained until the on-chip temper-

ature falls below the minimum hysteresis threshold point.

- Each Capable of Sinking 300mA

- Low Idle and Standby Current

• Over-Stress Protection - Each Output:

- Over-Current Latch Off . . . . . . . . . 300mA Min

- Over-Voltage Clamp . . . . . . . . . . . . . . . 50V Typ

• Thermal Shutdown with Hysteresis

• Serial Data Input, Parallel Output Power Drive

• Short Circuit Latch Off for Each Output

• Common Enable for Output Drivers and

Data Storage Register

The HIP0050 is fabricated in a Power BiMOS IC process, and is

intended for use in automotive and other applications having a

wide range of temperature and electrical stress conditions. It is

particularly suited for driving lamps, displays, relays, and solenoids in

applications where low operating power, high breakdown voltage,

and high output current at high temperature is required. Higher

current needs can be met by paralleling adjacent output drivers.

• Ambient Operating

Temperature Range. . . . . . . . . . . . .-40^oC to 85^oC

- Optional 125^oC Maximum Ambient Operating

Temperature Range (Dissipation Limited)

Applications

Ordering Information

• Automotive and Industrial Systems

• Solenoids, Relays and Lamp Drivers

• Logic and µP Controlled Drivers

• Robotic Controls

PART

NUMBER

TEMP.

RANGE ( C)

o

PACKAGE

20 Ld PDIP

24 Ld SOIC

PKG. NO.

E20.3

M24.3

HIP050IP

-40 to 85

HIP0050IB

-40 to 85

Pinouts

HIP0050

(PDIP)

HIP0050

(SOIC)

TOP VIEW

1

2

3

4

5

6

7

8

9

DR2

DR3

FLT

24 DR1

1

2

3

4

5

6

7

8

9

DR1

DR0

DR2

DR3

FLT

20

19

23

22

DR0

SI

18 SI

21 V_CC

EN

17 V_CC

16 GND

15 GND

14 LGND

13 SO

20

GND

STR

GND

STR

SCK

DR4

GND

19

GND

18

17

16

15

GND

LGND

SO

12

DR7

SCK 10

DR4 11

DR5 12

DR5 10

11 DR6

14 DR7

13 DR6

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 4034.1

1

HIP0050

Block Diagram

OUTPUT DRIVER

(CHANNEL 1 OF 8)

(ENABLE)

(STROBE)

EN

DR#0

STR

Q0

OUTPUT

LATCH

SI

SERIAL

Q1

Q2

Q3

Q4

Q5

Q6

Q7

(SPI)

OC

INPUT

SHUT-

DOWN

POR

REGISTER

(DATA IS

PARALLEL

OUTPUT

LATCHED

WHEN

SCK

STROBED)

SO

OVER-TEMPERATURE

SHUTDOWN W/HYS

FLT

S

R

FAULT

LATCH

Output Control Logic Table

STROBE

8-BIT SERIAL DATA (LATCHED)

OUTPUT

D1

0

D2

0

D3

0

D4

0

D5

0

D6

0

D7

0

D8

0

DR1 DR2 DR3 DR4 DR5 DR6 DR7 DR8

OFF OFF OFF OFF OFF OFF OFF OFF

1

0

ON

OFF OFF OFF OFF OFF OFF OFF

1

0

ON

OFF OFF OFF OFF OFF OFF

1

0

ON

OFF OFF OFF OFF OFF

ON OFF OFF OFF OFF

1

0

1

OFF OFF OFF OFF

ON ON ON ON

ON

1

2

HIP0050

Absolute Maximum Ratings

Thermal Information

o

Output Voltage, V

(Note 1) . . . . . . . . . . . . . . . . . . . -0.3V to V

OC

OUT

θ

( C/W)†

θ

( C/W)††

JC

JA

Input Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V +0.3V

IN

CC

Logic Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7V

Package

0

2

CC

Max Output Load Current, I

(Per Output, Note 2). . . . . . . . . I

LOAD

CL

PDIP . . . . . . . . . . . . .

SOIC . . . . . . . . . . . . .

10

50

60

35

40

Max. Output Load Current, I

Operating Ambient Temperature Range, T . . . . . . . . -40 C to 85 C

Operating Junction Temperature Range. . . . . . . . . . -40 C to 150 C

Storage Temperature Range, T

Maximum Lead Temperature (Soldering 10s Max). . . . . . . . . 300 C

(Lead Tips Only)

(All Outputs ON, Note 2) . . . . . 2A

LOAD

o

A

o

†

Versus Additional Square Inches 1oz. copper on PCB.

. . . . . . . . . . . . . -55 C to 150 C

STG

o

†† Standard Test Board, 0.002 diameter T/C located at lead

shoulder, middle lead.

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

Operating Conditions

Typical Logic Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . +5V

Power Output Driver Voltage Range . . . . . . . . . . . . . . . . . 0 to V

OC

CC

I

Supply Current, with 200mA each Output . . . . . . . . . . . . 2mA

Supply Current, with No Load . . . . . . . . . . . . . . . . . . . . . 2mA

Power Output Driver Current Load, I . . . . . . . . . . . . . . . . 0 to I

CC

DR CL

Typical Output r

Channel Resistance . . . . . . . . . . . . . . . . 2Ω

CC

DSON

Input Low Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0V

Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5V

Typical Output Rise Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4µs

Typical Output Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10µs

o

Electrical Speciﬁcations

V

= 4.5V to 5.5V, V

= 8V to 16V, T = -40 C to 85 C; Unless Otherwise Speciﬁed

CC

BATT A

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

OUTPUTS DRIVERS (DR0 TO DR7)

o

Output Channel Resistance

r

Output Current = 200mA, T = 85 C

-

300

42

-

2

-

4.0

500

58

-

Ω

mA

V

DSON

A

Output Over-Current Shutdown

Threshold

I

CL

Output Clamping Voltage

Output Clamping Energy

V

E

Outputs OFF

50

25

OC

o

1ms Single Pulse Width, T = 25 C,

A

mJ

(Refer to Figure 2 for SOA).

o

Output OFF Leakage Current

Output Rise Time

I

Output Voltage = 40V, T = 85 C

-

10

30

µA

µs

OFF

A

t

Load = 75Ω, 0.01µF (Parallel)

0.5

4

RISE

FALL

Output Fall Time

t

10

Output Delay from Strobe, High

to Low Output Transition

t

1

4

10

µs

DHL

DLH

Output Delay from Strobe, Low to

High Output Transition

t

0.2

2.6

LOGIC SUPPLY

Logic Supply Current, Loaded

Logic Supply Current, No Load

I

All Outputs ON, 0.2A Load Per Output

All Outputs OFF

-

2

4

mA

CC

Logic Supply Under-Voltage

Reset Threshold

All Outputs OFF

3.5

-

4

V

LOGIC INPUTS (EN, SI, SCK, STR)

Threshold Voltage at Falling

Edge

V -

V

= 5V ±10%

0.2V

0.3V

-

V

T

CC

Threshold Voltage at Rising

Edge

V +

-

0.6V

0.7V

CC

T

Hysteresis Voltage

Leakage Current

V

V + - V -

0.85

-10

1.4

-

2.25

V

H

T

10

µA

I_LIN

SERIAL DATA CLOCK (SCK) (Refer to Figure 1 for Waveform Detail)

Frequency

f

-

1.6

MHz

ns

SCK

Pulse Width High

t

27

175

W(SCKH)

3

HIP0050

o

Electrical Speciﬁcations

V

= 4.5V to 5.5V, V

= 8V to 16V, T = -40 C to 85 C; Unless Otherwise Speciﬁed (Continued)

CC

BATT A

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Pulse Width Low

t

-

27

175

ns

W(SCKL)

SERIAL DATA IN (SI) (Refer to Figure 1 for Waveform Detail)

Input Setup Time

Input Hold Time

t

-

1.1

1.5

75

ns

SUI

T

HI

STROBE (STR)

Strobe Pulse Width

Clock to Strobe Delay

t

-

12

5

150

75

ns

W(S)

t

D(CS)

SERIAL DATA OUT (SO) (Refer to Figure 1 for Waveform Detail)

Low Level Output Voltage

High Level Output Voltage

Propagation Delay

V

Sink Current = 1.6mA

-

0.2

4.4

260

0.4

-

V

OL

V

Source Current = -1.6mA

3.7

75

OH

t

500

ns

P(CD)

PROTECTION PARAMETERS

Fault Output (FLT) Low

V

Sink Current = 1.6mA

-

145

5

-

0.4

165

20

V

OL

o

Over-Temp. (OT) Shutdown

OT Shutdown Hysteresis

T

155

10

C

SD

o

T

C

H

NOTES:

1. The MOSFET Output Drain is internally clamped with a Drain-to-Gate Zener Diode that turns on the MOSFET; holding the drain at the

output clamp voltage V

.

OC

2. The HIP0050 Output Drive is protected by an internal current shutdown. The I over-current shutdown threshold parameter specification

CL

defines the maximum current. The minimum limit for this threshold is 300mA. The maximum current with all outputs ON may be further

limited by dissipation.

3. Package dissipation is based on thermal resistance capability in a normal operating environment. The junction to ambient thermal resis-

tance values are defined here as a PC Board mounted device with minimal copper. Due to the heat conducting capability of the DIP and

o

SOIC package lead frames, 35 C/W thermal resistance can be achieved with approximately 2 square inches of 1 oz. copper PC Board

area. The junction to lead thermal resistance values are based on measurements from the chip to the ground leads of the package.

t_W(SCK)

SCK (CLOCK)

t_SUI

t_HI

SI (SERIAL DATA IN)

STR (STROBE)

t_W(S)

t_D(CS)

t_D(HL)

t_D(LH)

90%

10%

DRx (POWER OUTPUT DRIVER)

SO (SERIAL DATA OUT)

t_P(CD)

t_FALL, t_RISE

FIGURE 1. LOGIC TIMING CONTROL WAVEFORMS

4

HIP0050

Pin Descriptions

V_CCPower Pin

DR0 - DR7 Outputs 0 Thru 7

The V_CCpin is the positive 5V logic voltage supply input for The drain output pins of the DMOS Power Drivers are capa-

the IC. The normal operating voltage range is 4.5V to 5.5V. ble of sinking 300mA. Each output has short circuit protection

When switched on, the POR forces all outputs off.

to independently shutdown the output under excessive high

load current conditions.

SCK Serial Clock Pin

FLT Fault Flag

SCK is the clock input for the SPI Interface. Output ON/OFF

control data is clocked into an eight stage shift register on The fault ﬂag pin indicates an over-current in any one of the

the rising edge of an external clock. This input has a Schmitt output drivers. (It is not an indicator for the thermal shutdown

trigger.

mode.) The FLT output is active low and can sink 1.6mA

when activated. When latched low, it will remain latched until

the next data strobe.

SI Serial Data In Pin

SI is the Serial Data Input Pin for the SPI Interface. The eight

power outputs are controlled by the serial data via the output

data buffer. This input has a Schmitt Trigger.

EN Enable Pin

The enable pin is an active low enable function for all eight

output drivers. When EN is high, drive from the output data

buffer is held low and all output drivers are disabled. When

EN is low, the output drivers are enabled and data in the 8-bit

shift register is transparent to the output data buffer. This input

has a Schmitt trigger.

STR Strobe Pin for the SPI Interface

When the STR Pin is high, data from the 8-bit shift register is

passed into the output data buffers where it controls the ON-

OFF state of each output driver. The data is latched in the

output data buffers when STR goes low. This input has a

Schmitt trigger.

LGND and GND Pins

The LGND Pin is the 5V Logic Supply Ground for the IC and

GND is a common ground for the power output drivers.

SO Serial Data Out Pin

The serial data out allows other ICs to be serially cascaded.

For example, a 10-bit LED driver may be located behind the

HIP0050. A controlling microprocessor may then clock out

18-bits of information and simultaneously strobe both parts.

The cascaded ICs may be the same or different from the

HIP0050.

1000

100

SAFE OPERATING AREA

BELOW LINE

10

1

0.1

1

10

100

TIME (ms)

o

FIGURE 2. MAXIMUM SINGLE PULSE ENERGY SAFE OPERATING AREA FOR EACH CLAMPED OUTPUT DRIVER, T = 25 C

A

5

HIP0050

Dual-In-Line Plastic Packages (PDIP)

E20.3 (JEDEC MS-001-AD ISSUE D)

20 LEAD DUAL-IN-LINE PLASTIC PACKAGE

N

E1

INCHES MILLIMETERS

INDEX

AREA

1 2

3

N/2

SYMBOL

MIN

MAX

0.210

-

MIN

-

MAX

5.33

-

NOTES

-B-

-C-

A

A1

A2

B

-

4

-A-

0.015

0.115

0.014

0.045

0.008

0.980

0.005

0.300

0.240

0.39

2.93

0.356

1.55

0.204

24.89

0.13

7.62

6.10

4

D

E

0.195

0.022

0.070

0.014

1.060

-

4.95

0.558

1.77

0.355

-

BASE

PLANE

A2

A

-

SEATING

PLANE

B1

C

8

L

C

L

-

D1

B1

e_A

A1

A

D1

e

D

26.9

5

C

e_C

B

D1

E

-

5

e_B

0.010 (0.25)

C

B

S

M

0.325

0.280

8.25

7.11

6

E1

e

5

NOTES:

0.100 BSC

0.300 BSC

2.54 BSC

7.62 BSC

-

1. Controlling Dimensions: INCH. In case of conﬂict between

English and Metric dimensions, the inch dimensions control.

e

6

A

B

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

-

0.430

0.150

-

10.92

3.81

7

3. Symbols are defined in the “MO Series Symbol List” in Section

2.2 of Publication No. 95.

L

0.115

2.93

4

9

N

20

4. Dimensions A, A1 and L are measured with the package seated

in JEDEC seating plane gauge GS-3.

Rev. 0 12/93

5. D, D1, and E1 dimensions do not include mold flash or protru-

sions. Mold flash or protrusions shall not exceed 0.010 inch

(0.25mm).

e

6. E and

pendicular to datum

7. e and e are measured at the lead tips with the leads uncon-

are measured with the leads constrained to be per-

A

-C-

.

B

C

strained. e must be zero or greater.

C

8. B1 maximum dimensions do not include dambar protrusions.

Dambar protrusions shall not exceed 0.010 inch (0.25mm).

9. N is the maximum number of terminal positions.

10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,

E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch

(0.76 - 1.14mm).

6

HIP0050

Small Outline Plastic Packages (SOIC)

M24.3 (JEDEC MS-013-AD ISSUE C)

24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE

N

INDEX

AREA

M

B

0.25(0.010)

H

INCHES MILLIMETERS

E

SYMBOL

MIN

MAX

MIN

2.35

0.10

0.33

0.23

MAX

2.65

NOTES

-B-

A

A1

B

C

D

E

e

0.0926

0.0040

0.013

0.1043

0.0118

0.020

-

0.30

-

1

2

3

L

0.51

9

SEATING PLANE

A

0.0091

0.5985

0.2914

0.0125

0.32

-

-A-

0.6141 15.20

15.60

7.60

3

D

h x 45^o

0.2992

7.40

4

-C-

0.05 BSC

1.27 BSC

-

α

H

h

0.394

0.010

0.016

0.419

0.029

0.050

10.00

0.25

0.40

10.65

0.75

1.27

-

e

A1

C

5

B

0.10(0.004)

L

6

M

S

B

0.25(0.010)

C

A

N

α

24

7

o

0

8

0

8

-

NOTES:

Rev. 0 12/93

1. Symbols are deﬁned in the “MO Series Symbol List” in Section

2.2 of Publication Number 95.

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

3. Dimension “D” does not include mold flash, protrusions or gate

burrs. Mold flash, protrusion and gate burrs shall not exceed

0.15mm (0.006 inch) per side.

4. Dimension “E” does not include interlead flash or protrusions. In-

terlead flash and protrusions shall not exceed 0.25mm (0.010

inch) per side.

5. The chamfer on the body is optional. If it is not present, a visual

index feature must be located within the crosshatched area.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater

above the seating plane, shall not exceed a maximum value of

0.61mm (0.024 inch)

10. Controlling dimension: MILLIMETER. Converted inch dimen-

sions are not necessarily exact.

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiﬁcation.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or speciﬁcations at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate

and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which

may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

7


型号：	HIP0050
厂家：	Intersil
描述：	0.3A/50V Octal Low Side Power Driver with Serial Bus Control and Over-Current Fault Flag 0.3A / 50V八路低端电源与串行总线控制和过电流故障标记驱动驱动
文件：	总7页 (文件大小：49K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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