HS-1412RH [INTERSIL]
Radiation Hardened, Quad, High Speed, Low Power, Video Closed Loop Buffer; 抗辐射，四路，高速，低功耗，视频闭环缓冲器
| 型号： | HS-1412RH |
| 厂家： | 
Intersil |
| 描述： | Radiation Hardened, Quad, High Speed, Low Power, Video Closed Loop Buffer |
| 文件： | 总11页 (文件大小：177K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HS-1412RH
Data Sheet
August 1999
File Number 4230.1
Radiation Hardened, Quad, High Speed,
Low Power, Video Closed Loop Buffer
Features
• Electrically Screened to SMD # 5962-96834
• QML Qualified per MIL-PRF-38535 Requirements
• MIL-PRF-38535 Class V Compliant
The HS-1412RH is a radiation hardened quad closed loop
buffer featuring user programmable gain and high speed
performance. Manufactured on Intersil’s proprietary
complementary bipolar UHF-1 (DI bonded wafer) process,
this device offers wide -3dB bandwidth of 340MHz, very fast
slew rate, excellent gain flatness and high output current.
These devices are QML approved and are processed and
screened in full compliance with MIL-PRF-38535.
• User Programmable For Closed-Loop Gains of +1, -1 or
+2 Without Use of External Resistors
• Standard Operational Amplifier Pinout
• Low Supply Current . . . . . . . . . . . . 5.9mA/Op Amp (Typ)
• Excellent Gain Accuracy . . . . . . . . . . . . . . . 0.99V/V (Typ)
• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . .340MHz (Typ)
• Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . .1155V/µs (Typ)
• High Input Impedance . . . . . . . . . . . . . . . . . . . 1MΩ (Typ)
• Excellent Gain Flatness (to 50MHz). . . . . . ±0.02dB (Typ)
• Fast Overdrive Recovery . . . . . . . . . . . . . . . . <10ns (Typ)
• Total Gamma Dose. . . . . . . . . . . . . . . . . . . . 300kRAD(Si)
• Latch Up. . . . . . . . . . . . . . . . . . . . . None (DI Technology)
A unique feature of the pinout allows the user to select a
voltage gain of +1, -1, or +2, without the use of any external
components. Gain selection is accomplished via
connections to the inputs, as described in the “Application
Information” section. The result is a more flexible product,
fewer part types in inventory, and more efficient use of board
space.
Compatibility with existing op amp pinouts provides flexibility
to upgrade low gain amplifiers, while decreasing component
count. Unlike most buffers, the standard pinout provides an
upgrade path should a higher closed loop gain be needed at
a future date.
Applications
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
• Flash A/D Driver
• Video Switching and Routing
• Pulse and Video Amplifiers
• Wideband Amplifiers
• RF/IF Signal Processing
• Imaging Systems
Detailed Electrical Specifications for these devices are
contained in SMD 5962-96834. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Ordering Information
Pinout
INTERNAL
TEMP. RANGE
o
HS-1412RH (CERDIP) GDIP1-T14
ORDERING NUMBER
5962F9683401VCA
5962F9683401VCC
MKT. NUMBER
( C)
OR
HS1-1412RH-Q
HS1B-1412RH-Q
-55 to 125
-55 to 125
HS-1412RH (SBDIP) CDIP2-T14
TOP VIEW
OUT1
-IN1
1
2
3
4
5
6
7
14 OUT4
13 -IN4
12 +IN4
11 V-
+IN1
V+
+IN2
-IN2
10 +IN3
9
8
-IN3
OUT3
OUT2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
HS-1412RH
Unity Gain Considerations
Application Information
Unity gain selection is accomplished by floating the -Input of
the HS-1412RH. Anything that tends to short the -Input to
GND, such as stray capacitance at high frequencies, will
cause the amplifier gain to increase toward a gain of +2. The
result is excessive high frequency peaking, and possible
instability. Even the minimal amount of capacitance
associated with attaching the -Input lead to the PCB results
in approximately 6dB of gain peaking. At a minimum this
requires due care to ensure the minimum capacitance at the
-Input connection.
HS-1412RH Advantages
The HS-1412RH features a novel design which allows the
user to select from three closed loop gains, without any
external components. The result is a more flexible product,
fewer part types in inventory, and more efficient use of board
space. Implementing a quad, gain of 2, cable driver with this
IC eliminates the eight gain setting resistors, which frees up
board space for termination resistors.
Like most newer high performance amplifiers, the HS-1412RH
is a current feedback amplifier (CFA). CFAs offer high
bandwidth and slew rate at low supply currents, but can be
difficult to use because of their sensitivity to feedback
capacitance and parasitics on the inverting input (summing
node). The HS-1412RH eliminates these concerns by bringing
the gain setting resistors on-chip. This yields the optimum
placement and value of the feedback resistor, while minimizing
feedback and summing node parasitics. Because there is no
access to the summing node, the PCB parasitics do not impact
performance at gains of +2 or -1 (see “Unity Gain
Table 1 lists five alternate methods for configuring the
HS-1412RH as a unity gain buffer, and the corresponding
performance. The implementations vary in complexity and
involve performance trade-offs. The easiest approach to
implement is simply shorting the two input pins together,
and applying the input signal to this common node. The
amplifier bandwidth decreases from 550MHz to 370MHz,
but excellent gain flatness is the benefit. A drawback to this
approach is that the amplifier input noise voltage and input
offset voltage terms see a gain of +2, resulting in higher
noise and output offset voltages. Alternately, a 100pF
capacitor between the inputs shorts them only at high
frequencies, which prevents the increased output offset
voltage but delivers less gain flatness.
Considerations” for discussion of parasitic impact on unity gain
performance).
The HS-1412RH’s closed loop gain implementation provides
better gain accuracy, lower offset and output impedance,
and better distortion compared with open loop buffers.
Another straightforward approach is to add a 620Ω resistor
in series with the amplifier’s positive input. This resistor and
the HS-1412RH input capacitance form a low pass filter
which rolls off the signal bandwidth before gain peaking
occurs. This configuration was employed to obtain the data
sheet AC and transient parameters for a gain of +1.
Closed Loop Gain Selection
This “buffer” operates in closed loop gains of -1, +1, or +2,
with gain selection accomplished via connections to the
±inputs. Applying the input signal to +IN and floating -IN
selects a gain of +1 (see next section for layout caveats),
while grounding -IN selects a gain of +2. A gain of -1 is
obtained by applying the input signal to -IN with +IN
grounded through a 50Ω resistor.
Pulse Overshoot
The HS-1412RH utilizes a quasi-complementary output stage
to achieve high output current while minimizing quiescent
supply current. In this approach, a composite device replaces
the traditional PNP pulldown transistor. The composite device
switches modes after crossing 0V, resulting in added
distortion for signals swinging below ground, and an
increased overshoot on the negative portion of the output
waveform (see Figure 5, Figure 7, and Figure 9). This
overshoot isn’t present for small bipolar signals (see Figure 4,
Figure 6, and Figure 8) or large positive signals. Figure 28
through Figure 31 illustrate the amplifier’s overshoot
dependency on input transition time, and signal polarity.
The table below summarizes these connections:
CONNECTIONS
GAIN
(A
CL
)
+INPUT
50Ω to GND
Input
-INPUT
Input
-1
+1
+2
NC (Floating)
GND
Input
TABLE 1. UNITY GAIN PERFORMANCE FOR VARIOUS IMPLEMENTATIONS
APPROACH
PEAKING (dB)
BW (MHz)
550
SR (V/µs)
1300
1000
1000
500
±0.1dB GAIN FLATNESS (MHz)
Remove -IN Pin
+R = 620Ω
5.0
1.0
0.7
0.1
0.3
18
25
230
S
+R = 620Ω and Remove -IN Pin
225
28
S
Short +IN to -IN (e.g., Pins 2 and 3)
100pF Capacitor Between +IN and -IN
370
170
130
380
550
2
HS-1412RH
PC Board Layout
Evaluation Board
This amplifier’s frequency response depends greatly on the
care taken in designing the PC board (PCB). The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
The performance of the HS-1412RH may be evaluated using
the HA5025 Evaluation Board, slightly modified as follows:
1. Remove the four feedback resistors, and leave the
connections open.
2. a. For A = +1 evaluation, remove the gain setting
V
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
resistors (R ), and leave pins 2, 6, 9, and 13 floating.
1
b. For A = +2, replace the gain setting resistors (R ) with
V
1
0Ω resistors to GND.
The modified schematic for amplifier 1, and the board layout
are shown in Figures 2 and 3.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
To order evaluation boards (part number HA5025EVAL),
please contact your local sales office.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 3.
50Ω
OUT
1
2
3
4
5
6
7
14
13
12
11
10
9
R
∞ (A = +1)
V
NOTE: R
=
(NOTE)
1
1
or 0Ω (A = +2)
V
-
Driving Capacitive Loads
+
IN
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
50Ω
-5V
0.1µF
10µF
+5V
10µF
0.1µF
avoided by placing a resistor (R ) in series with the output
S
GND
8
prior to the capacitance.
GND
Figure 1 details starting points for the selection of this
FIGURE 2. MODIFIED EVALUATION BOARD SCHEMATIC
resistor. The points on the curve indicate the R and C
S
L
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
50
40
30
20
A
= +1
V
FIGURE 3A. TOP LAYOUT
A
= +2
150
V
10
0
0
100
200
300
400
50
250
350
LOAD CAPACITANCE (pF)
FIGURE 1. RECOMMENDED SERIES RESISTOR vs LOAD
CAPACITANCE
R and C form a low pass network at the output, thus limiting
S
L
system bandwidth well below the amplifier bandwidth of
350MHz. By decreasing R as C increases (as illustrated in
S
L
the curves), the maximum bandwidth is obtained without
sacrificing stability. In spite of this, bandwidth decreases as
the load capacitance increases. For example, at A = +2,
V
R = 22Ω, C = 100pF, the overall bandwidth is 125MHz, and
FIGURE 3B. BOTTOM LAYOUT
S
L
FIGURE 3. EVALUATION BOARD LAYOUT
bandwidth drops to 100MHz at R = 12Ω, C = 220pF.
S
L
3
HS-1412RH
o
Typical Performance Curves V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified
SUPPLY
A
L
2.0
1.5
200
A
= +2
A
= +2
V
V
150
100
50
1.0
0.5
0
0
-0.5
-1.0
-1.5
-2.0
-50
-100
-150
-200
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 4. SMALL SIGNAL PULSE RESPONSE
FIGURE 5. LARGE SIGNAL PULSE RESPONSE
2.0
1.5
1.0
0.5
0
200
150
A
= +1
V
A
= +1
V
100
50
0
-0.5
-1.0
-50
-100
-150
-200
-1.5
-2.0
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 6. SMALL SIGNAL PULSE RESPONSE
FIGURE 7. LARGE SIGNAL PULSE RESPONSE
200
150
100
50
2.0
1.5
A
= -1
A = -1
V
V
1.0
0.5
0
0
-50
-100
-0.5
-1.0
-1.5
-2.0
-150
-200
TIME (5ns/DIV.)
TIME (5ns/DIV.)
FIGURE 8. SMALL SIGNAL PULSE RESPONSE
FIGURE 9. LARGE SIGNAL PULSE RESPONSE
4
HS-1412RH
o
Typical Performance Curves V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
A
L
A
= +2, V = 200mV
OUT P-P
V
= 200mV
P-P
V
OUT
9
6
6
3
GAIN
A
= +2
V
R
R
R
= 1kΩ
= 100Ω
= 50Ω
3
0
0
-3
-6
L
L
L
GAIN
A
= -1
V
A
= +1
V
0
0
A
= +2
V
PHASE
PHASE
90
90
R
R
R
= 1kΩ
= 100Ω
= 50Ω
L
L
L
A
= -1
180
270
180
270
V
A
= +1
V
0.3
1
10
FREQUENCY (MHz)
100
500
0.3
1
10
FREQUENCY (MHz)
100
500
FIGURE 10. FREQUENCY RESPONSE
FIGURE 11. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
A
= +1, V = 200mV
OUT P-P
A
= -1, V = 200mV
OUT P-P
V
V
3
0
3
0
GAIN
GAIN
-3
-6
-3
-6
R
R
R
= 1kΩ
=100Ω
= 50Ω
L
L
L
R
R
R
= 1kΩ
= 100Ω
= 50Ω
L
L
L
0
180
90
0
PHASE
PHASE
90
R
R
R
= 1kΩ
= 100Ω
= 50Ω
R
R
R
= 1kΩ
= 100Ω
= 50Ω
L
L
L
L
L
L
180
270
-90
0.3
1
10
FREQUENCY (MHz)
100
500
0.3
1
10
FREQUENCY (MHz)
100
500
FIGURE 12. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS LOAD
RESISTORS
A
= +1
V
A
= +2
V
9
6
3
0
GAIN
GAIN
1V
P-P
2.5V
3
0
-3
-6
P-P
1V
P-P
4V
P-P
2.5V
P-P
4V
P-P
0
0
PHASE
PHASE
90
90
1V
P-P
2.5V
180
270
360
180
270
360
P-P
1V
P-P
4V
P-P
2.5V
P-P
4V
P-P
0.3
1
10
FREQUENCY (MHz)
100
500
0.3
1
10
FREQUENCY (MHz)
100
500
FIGURE14. FREQUENCYRESPONSEFORVARIOUSOUTPUT
VOLTAGES
FIGURE15. FREQUENCYRESPONSEFORVARIOUSOUTPUT
VOLTAGES
5
HS-1412RH
o
Typical Performance Curves V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
A
L
A
= -1
V
= 5V
V
OUT P-P
3
0
6
3
GAIN
-3
-6
0
-3
1V
P-P
2.5V
4V
P-P
A
= +2
= +1
= -1
V
P-P
-6
A
V
A
V
-9
180
90
0
1V
P-P
PHASE
-12
-15
-18
-21
4V
P-P
2.5V
P-P
-90
0.3
1
10
FREQUENCY (MHz)
100
500
0.3
1
10
FREQUENCY (MHz)
100
500
FIGURE16. FREQUENCYRESPONSEFORVARIOUSOUTPUT
VOLTAGES
FIGURE 17. FULL POWER BANDWIDTH
0.5
450
400
V
= 200mV
P-P
OUT
0.4
0.3
0.2
0.1
0
A
= +2
V
A
= +1
V
350
300
A
= -1
V
A
= +2
V
-0.1
-0.2
-0.3
-0.4
-0.5
A
= -1
V
250
200
A
= +1
V
-50
-25
0
25
50
75
100
125
1
10
FREQUENCY (MHz)
100
200
o
TEMPERATURE ( C)
FIGURE 18. -3dB BANDWIDTH vs TEMPERATURE
FIGURE 19. GAIN FLATNESS
-40
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
A
= +2
= -1
= +1
V
A
V
A
V
R
= 100Ω
L
R
= ∞
L
0.3
1
10
100
500
0.3
1
10
FREQUENCY (MHz)
100
FREQUENCY (MHz)
FIGURE 20. REVERSE ISOLATION (S
)
FIGURE 21. ALL HOSTILE CROSSTALK
12
6
HS-1412RH
o
Typical Performance Curves V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
A
L
-40
-40
-45
-50
-55
-60
-65
-70
-75
A
= +2
A
= +2
V
V
-45
-50
-55
20MHz
20MHz
10MHz
-60
-65
-70
-75
-80
10MHz
-80
-5
-2
1
4
7
10
13
-5
-2
1
4
7
10
13
OUTPUT POWER (dBm)
OUTPUT POWER (dBm)
FIGURE 22. 2nd HARMONIC DISTORTION vs P
FIGURE 23. 3rd HARMONIC DISTORTION vs P
OUT
OUT
OUT
OUT
OUT
OUT
-40
-45
-50
-55
-60
-65
-70
-75
-80
-40
-45
-50
-55
-60
-65
-70
A
= +1
A
= +1
V
V
20MHz
20MHz
10MHz
10MHz
-75
-80
-5
-2
1
4
7
10
13
-5
-2
1
4
7
10
13
OUTPUT POWER (dBm)
OUTPUT POWER (dBm)
FIGURE 24. 2nd HARMONIC DISTORTION vs P
FIGURE 25. 3rd HARMONIC DISTORTION vs P
-40
-45
-50
-55
-60
-65
-70
-75
-80
-40
-45
-50
-55
-60
-65
-70
-75
-80
A
= -1
A
= -1
V
V
20MHz
20MHz
10MHz
10MHz
-5
-2
1
4
7
10
13
-5
-2
1
4
7
10
13
OUTPUT POWER (dBm)
OUTPUT POWER (dBm)
FIGURE 26. 2nd HARMONIC DISTORTION vs P
FIGURE 27. 3rd HARMONIC DISTORTION vs P
7
HS-1412RH
o
Typical Performance Curves V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
A
L
20
15
10
5
20
V
= +1V
OUT
V
= +0.5V
OUT
15
10
A
= +1
V
A
= +1
V
5
0
A
= +2
V
A
= +2
V
A
= -1
A
= -1
V
V
0
100
500
900
1300
1700
2100
100
500
900
1300
1700
2100
INPUT TRANSITION TIME (ps)
INPUT TRANSITION TIME (ps)
FIGURE 28. OVERSHOOT vs TRANSITION TIME
FIGURE 29. OVERSHOOT vs TRANSITION TIME
20
20
15
10
5
V
= 1V
P-P
OUT
V
= 0.5V
P-P
OUT
A
= +1
V
A
= +2
= -1
V
15
10
5
A
= +1
V
A
V
A
= +2
V
A
= -1
V
0
100
0
100
500
900
1300
1700
2100
500
900
1300
1700
2100
INPUT TRANSITION TIME (ps)
INPUT TRANSITION TIME (ps)
FIGURE 30. OVERSHOOT vs TRANSITION TIME
FIGURE 31. OVERSHOOT vs TRANSITION TIME
0.02
0.01
0
A
= -1
V
0.2
A
= +2
V
A
= +1
V
0.1
-0.01
-0.02
-0.03
-0.04
-0.05
-0.06
0.05
0
A
= +2
V
-0.05
-0.1
-0.2
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
10
20
30
40
50
60
70
80
90
INPUT VOLTAGE (V)
TIME (ns)
FIGURE 32. INTEGRAL LINEARITY ERROR
FIGURE 33. SETTLING RESPONSE
8
HS-1412RH
o
Typical Performance Curves V
= ±5V, T = 25 C, R = 100Ω, Unless Otherwise Specified (Continued)
SUPPLY
A
L
6.6
6.5
6.4
3.6
3.5
A
= -1
|-V | (R = 100Ω)
OUT L
V
+V
OUT
(R = 100Ω)
L
3.4
3.3
3.2
3.1
6.3
6.2
6.1
6.0
5.9
5.8
5.7
|-V
OUT
| (R = 50Ω)
L
+V
OUT
(R = 50Ω)
L
3.0
2.9
2.8
2.7
2.6
5.6
5.5
-50
-25
0
25
50
75
100
125
4.5
5
5.5
6
6.5
7
o
SUPPLY VOLTAGE (±V)
TEMPERATURE ( C)
FIGURE 34. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 35. OUTPUT VOLTAGE vs TEMPERATURE
50
40
30
20
10
20
16
12
8
I
NI
4
E
NI
0
0
0.1
1
10
100
FREQUENCY (kHz)
FIGURE 36. INPUT NOISE CHARACTERISTICS
9
HS-1412RH
Burn-In Circuit
HS-1412RH CERDIP
1
2
3
4
5
6
7
14
13
12
11
10
9
R1
R1
R1
R1
D3
D4
V+
V-
D1
C1
C2
D2
8
NOTES:
1. R1 = 1kΩ, ±5%, 1/4W [Per Socket].
2. C1 = C2 = 0.01µF [Per Socket] or 0.1µF (Per Row) Minimum.
3. D1 = D2 = 1N4002 or Equivalent [Per Board].
4. D3 = D4 = 1N4002 or Equivalent [Per Socket].
5. (-V) + (+V) = 11V ±1.0V.
6. 20mA < (I , I ) < 32mA.
CC EE
7. -50mV < V < +50mV.
OUT
Irradiation Circuit
HS-1412RH CERDIP
1
2
3
4
5
6
7
14
13
12
11
10
9
R1
R1
R1
V-
V+
R1
C1
C1
8
NOTES:
8. R1 = 1kΩ ±5%
9. C1 = 0.1µF
10. V+ = +5.0V ±0.5V
11. V- = -5.0V ±0.5V
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
10
HS-1412RH
Die Characteristics
DIE DIMENSIONS:
ASSEMBLY RELATED INFORMATION:
79 mils x 118 mils x 19 mils
(2000µm x 3000µm x 483µm)
Substrate Potential (Powered Up):
Floating (Recommend Connection to V-)
INTERFACE MATERIALS:
Glassivation:
ADDITIONAL INFORMATION:
Transistor Count:
Type: Nitride
Thickness: 4kÅ ±0.5kÅ
320
Top Metallization:
Type: Metal 1: AICu(2%)/TiW
Thickness: Metal 1: 8kÅ ±0.4kÅ
Type: Metal 2: AICu(2%)
Thickness: Thickness: Metal 2: 16kÅ ±0.8kÅ
Substrate:
UHF-1X. Bonded Wafer, DI
Backside Finish:
Silicon
Metallization Mask Layout
HS-1412RH
-IN1
OUT1
OUT4
-IN4
+IN1
+IN4
V+
V-
+IN2
+IN3
-IN2
OUT2
V-
OUT3
-IN3
11
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