HS-4423BRH [INTERSIL]

Radiation Hardened Dual, Inverting Power MOSFET Drivers; 抗辐射双通道,反相功率MOSFET驱动器
HS-4423BRH
型号: HS-4423BRH
厂家: Intersil    Intersil
描述:

Radiation Hardened Dual, Inverting Power MOSFET Drivers
抗辐射双通道,反相功率MOSFET驱动器

驱动器
文件: 总2页 (文件大小:60K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HS-4423RH, HS-4423BRH  
Data Sheet  
June 1999  
File Number 4564.4  
Radiation Hardened Dual, Inverting Power  
MOSFET Drivers  
Features  
• Electrically Screened to DESC SMD # 5962-99511  
• QML Qualified per MIL-PRF-38535 Requirements  
• Radiation Environment  
The Radiation Hardened HS-4423RH and the HS-4423BRH  
are inverting, dual, monolithic high-speed MOSFET drivers  
designed to convert TTL level signals into high current  
outputs at voltages up to 18V.  
5
- Total Dose (Max). . . . . . . . . . . . . . . . . .3 x 10 RAD(SI)  
- Latch-Up Immune  
The inputs of these devices are TTL compatible and can be  
directly driven by our HS-1825ARH PWM device or by our  
ACS/ACTS and HCS/HCTS type logic devices. The fast rise  
times and high current outputs allow very quick control of  
high gate capacitance power MOSFETs, like our Rad Hard  
FS055, in high frequency applications.  
- Low Dose Rate Immune  
• I  
PEAK  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2A (Typ)  
• Matched Rise and Fall Times (C = 4300pF) . . . 75ns (Max)  
L
• Low Voltage Lock-Out Feature  
- HS-4423RH . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10.0V  
- HS-4423BRH . . . . . . . . . . . . . . . . . . . . . . . . . . . . <7.5V  
• Wide Supply Voltage Range. . . . . . . . . . . . . . . 12V to 18V  
The high current outputs minimize power losses in  
MOSFETs by rapidly charging and discharging the gate  
capacitance. The output stage incorporates a low voltage  
lock-out circuit that puts the outputs into a three-state mode  
when the supply voltage drops below 10V for the  
HS-4423RH and 7.5V for the HS-4423BRH.  
• Prop Delay . . . . . . . . . . . . . . . . . . . . . . . . . . .250ns (Max)  
• Consistent Delay Times with V  
Changes  
CC  
• Low Power Consumption  
- 40mW with Inputs High  
- 20mW with Inputs Low  
Constructed with the Intersil dielectrically isolated Rad Hard  
Silicon Gate (RSG) BiCMOS process, these devices are  
immune to Single Event Latch-up and have been specifically  
designed to provide highly reliable performance in harsh  
radiation environments  
• Low Equivalent Input Capacitance . . . . . . . . . .3.2pF (Typ)  
• ESD Protected . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4000V  
Specifications for Rad Hard QML devices are controlled  
by the Defense Supply Center in Columbus (DSCC). The  
SMD numbers listed here must be used when ordering.  
Applications  
• Switching Power Supplies  
• DC/DC Converters  
• Motor Controllers  
Detailed Electrical Specifications for these devices are  
contained in SMD 5962-99511. A “hot-link” is provided  
on our homepage for downloading.  
www.intersil.com/spacedefense/space.asp  
Ordering Information  
Pinout  
INTERNAL  
MKT. NUMBER  
TEMP. RANGE  
o
ORDERING NUMBER  
5962F9951101VXC  
5962F9951101QXC  
HS9-4423RH/Proto  
5962F9951102VXC  
5962F9951102QXC  
HS9-4423BRH/Proto  
( C)  
HS-4423RH, HS-4423BRH (FLATPACK CDFP4-F16)  
TOP VIEW  
HS9-4423RH-Q  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
HS9-4423RH-8  
NC  
IN A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
NC  
HS9-4423RH/Proto  
HS9-4423BRH-Q  
HS9-4423BRH-8  
HS9-4423BRH/Proto  
OUT A  
OUT A  
NC  
GND A  
GND B  
NC  
V
V
CC  
CC  
OUT B  
OUT B  
NC  
IN B  
NC  
NOTE: Pins 4 and 5, 10 and 11, 12 and 13, 14 and 15 are double-  
bonded to their same electrical points on the die.  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
1
HS-4423RH, HS-4423BRH  
Die Characteristics  
DIE DIMENSIONS:  
Backside Finish:  
4890µm x 3370µm (193 mils x 133 mils)  
Silicon  
Thickness: 483µm ± 25.4µm (19 mils ± 1 mil)  
ASSEMBLY RELATED INFORMATION:  
INTERFACE MATERIALS:  
Glassivation:  
Substrate Potential:  
Unbiased (DI)  
Type: PSG (Phosphorous Silicon Glass)  
Thickness: 8.0kÅ ± 1.0kÅ  
ADDITIONAL INFORMATION:  
Worst Case Current Density:  
Top Metallization:  
5
2
<2.0 x 10 A/cm  
Type: AlSiCu  
Thickness: 16.0kÅ ± 2kÅ  
Transistor Count:  
Substrate:  
125  
Radiation Hardened Silicon Gate,  
Dielectric Isolation  
Metallization Mask Layout  
HS-4423RH, HS-4423BRH  
GND (5)  
GND (4)  
IN A (2)  
IN B (7)  
OUT B (10)  
OUT B (11)  
OUT A (15)  
OUT A (14)  
V
(12)  
V
(13)  
CC  
CC  
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.  
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-  
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see web site www.intersil.com  
2

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