HS1-1825ARH/PROTO [INTERSIL]

Radiation Hardened High-Speed, Dual Output PWM; 抗辐射高速，双输出PWM


型号：	HS1-1825ARH/PROTO
厂家：	Intersil
描述：	Radiation Hardened High-Speed, Dual Output PWM 抗辐射高速，双输出PWM 开关信息通信管理 CD
文件：	总2页 (文件大小：132K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

HS-1825ARH

Data Sheet

June 21, 2005

FN4561.7

Radiation Hardened High-Speed, Dual

Output PWM

Features

• Electrically Screened to DESC SMD # 5962-99558

The Radiation Hardened HS-1825ARH Pulse Width

Modulator is designed to be used in high frequency

switched-mode power supplies and can be used in either

current-mode or voltage-mode. It is well suited for single-

ended boost converter applications.

• QML Qualified per MIL-PRF-38535 Requirements

• Radiation Environment

- Maximum Total Dose . . . . . . . . . . . . . . . . 300 krad(SI)

- Vertical Architecture Provides Low Dose Rate Immunity

- DI RSG Process Provides Latch-Up Immunity

Device features include a precision voltage reference, low

power start-up circuit, high frequency oscillator, wide-band

error amplifier, and fast current-limit comparator. The use of

proprietary process capabilities and unique design

techniques results in fast propagation delay times and high

output current over a wide range of output voltages.

• Low Start-Up Current . . . . . . . . . . . . . . . . . . . 100µA (Typ)

• Fast Propagation Delay . . . . . . . . . . . . . . . . . . 80ns (Typ)

• 12V to 30V Operation

• 1A (Peak) Dual Output Drive Capability

• 5.1V Reference

Constructed with the Intersil Rad Hard Silicon Gate (RSG)

Dielectric Isolation BiCMOS process, the HS-1825ARH has

been specifically designed to provide highly reliable

performance when exposed to harsh radiation

environments.

• Undervoltage Lockout

• Programmable Soft-Start

• Switching Frequencies to 500kHz

Specifications for Rad Hard QML devices are controlled

by the Defense Supply Center in Columbus (DSCC). The

SMD numbers listed below must be used when ordering.

• Latched Overcurrent Comparator with Full Cycle Restart

• Programmable Leading Edge Blanking Circuit

Detailed Electrical Specifications for the HS-1825ARH

are contained in SMD 5962-99558. That document may

be easily downloaded from our website.

www.intersil.com/

Applications

• Current or Voltage Mode Switching Power Supplies

• Motor Speed and Direction Control

Ordering Information

Pinout

HS-1825ARH

SBDIP (CDIP2-T16) AND FLATPACK (CDFP4-F16)

TOP VIEW

ORDERING

INTERSIL MKT.

TEMP. RANGE

(°C)

NUMBER

5962F9955801VEC

5962F9955801QEC

5962F9955801VXC

5962F9955801QXC

HS1-1825ARH-Q

HS1-1825ARH-8

HS9-1825ARH-Q

HS9-1825ARH-8

-50 to 125

INV

NON-INV

E/A OUT

CLOCK

16 VREF 5.1V

15 V

14 OUTPUT B

13 VC

HS1-1825ARH/Proto HS1-1825ARH/Proto

HS9-1825ARH/Proto HS9-1825ARH/Proto

12 POWER GND

11 OUTPUT A

10 GND

RAMP

ILIM/SD

SOFT START

NOTE: Grounding the Soft-Start pin does not inhibit the outputs. The

outputs may be inhibited by applying >1.26V to the ILIM/SD pin.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

HS-1825ARH

Die Characteristics

DIE DIMENSIONS

Backside Finish

4710µm x 3570µm (185 mils x 140 mils)

Silicon

Thickness: 483µm ±25.4µm (19 mils ±1 mil)

ASSEMBLY RELATED INFORMATION

INTERFACE MATERIALS

Glassivation

Substrate Potential

Unbiased (DI)

Type: PSG (Phosphorous Silicon Glass)

Thickness: 8.0kÅ ±1.0kÅ

ADDITIONAL INFORMATION

Top Metallization

Worst Case Current Density

Type: ALSiCu

<2.0 x 10 A/cm

Thickness: 16.0kÅ ±2kÅ

Substrate

Transistor Count

Radiation Hardened Silicon Gate,

Dielectric Isolation

225

Metallization Mask Layout

HS-1825ARH

(4) CLK/LEB

(3) EAOUT

RT (5)

CT (6)

(2) IN+

(1) IN-

RAMP (7)

SS (8)

(16) V

REF

ILIM (9)

OSCGND

(NOTE 1)

(15) V

GND (10)

(14) OUTB

OUTA (11)

(12) PGND

(NOTE 2)

PGND (12)

(NOTE 2)

(13) VC

(NOTE 2)

VC (13)

(NOTE 2)

NOTES:

1. This is the oscillator ground (OSCGND) bond pad and must be

connected to GND.

2. PGND and VC each require two bond pad connections.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN4561.7

June 21, 2005

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