ISL22512WFRU10Z-TK [INTERSIL]

Single Push Button Controlled Potentiometer XDCP; 单按钮控制电位器XDCP
ISL22512WFRU10Z-TK
型号: ISL22512WFRU10Z-TK
厂家: Intersil    Intersil
描述:

Single Push Button Controlled Potentiometer XDCP
单按钮控制电位器XDCP

电位器
文件: 总11页 (文件大小:276K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ISL22512  
®
Single Push Button Controlled Potentiometer (XDCP™)  
Data Sheet  
March 24, 2008  
FN6679.0  
Low Noise, Low Power, 16 Taps, Push  
Button Controlled Potentiometer  
Features  
• Solid-State Non-Volatile Potentiometer  
• Push Button Controlled  
The Intersil ISL22512 is a three-terminal digitally-controlled  
potentiometer (XDCP) implemented by a resistor array  
composed of 15 resistive elements and a wiper switching  
network. The ISL22512 features a push button control, a  
shutdown mode, as well as an industry-leading µTQFN  
package.  
• Single or Auto Increment/Decrement  
- Fast Mode after 1s Button Press  
AUTOSTORE of Last Wiper Position or Manual Store of  
Wiper Position  
The push button control has individual PU and PD inputs for  
adjusting the wiper. To eliminate redundancy, the wiper  
position will automatically increment or decrement if one of  
these inputs is held longer than one second.  
• Shutdown Mode  
• 16 Wiper Tap Points  
- Middle Scale Wiper Position on Power-Up  
• Low Power CMOS  
- VCC = 2.7V to 5.5V  
Forcing both PU and PD low for more than two seconds  
activates shutdown mode. Shutdown mode disconnects the  
top of the resistor chain and moves the wiper to the lowest  
position, minimizing power consumption.  
- Terminal Voltage, 0 to V  
CC  
- Standby Current, 3µA max  
• RTOTAL Value = 10kΩ  
The three terminals accessing the resistor chain naturally  
configure the ISL22512 as a voltage divider. A rheostat is  
easily formed by floating an end terminal or connecting it to  
the wiper.  
• Packages  
- 8 Ld SOIC  
- 10 Ld µTQFN (2.1mmx1.6mm)  
NC  
VCC (SUPPLY VOLTAGE)  
• Pb-Free (RoHS Compliant)  
O
V
PU  
1
9
8
7
6
CC  
µTQFN  
Applications  
2
3
4
ASE  
PD  
RH  
(Top View)  
RL  
RH  
• Volume Control  
V
PU  
RW  
SS  
CONTROL  
BLOCK  
• LED/LCD Brightness Control  
• Contrast Control  
NC  
PD  
RW  
O
ASE  
PU  
PD  
RH  
1
2
3
4
8
7
6
5
V
CC  
RL  
SOIC  
ASE  
RL  
• Programming Bias Voltages  
• Ladder Networks  
(Top View)  
V
RW  
SS  
VSS (GROUND)  
Ordering Information  
PART  
NUMBER  
PART  
MARKING  
RTOTAL  
(kΩ)  
TEMP.  
RANGE(°C)  
PACKAGE  
(Pb-Free)  
PKG.  
DWG. #  
ISL22512WFB8Z* (Note 1)  
22512 WFBZ  
GE  
10  
-40 to +125  
-40 to +125  
8 Ld SOIC  
M8.15  
L10.2.1x1.6A  
ISL22512WFRU10Z-TK (Note 2)  
10  
10 Ld µTQFN  
Tape and Reel  
*Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.  
NOTE:  
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%  
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering  
operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of  
IPC/JEDEC J STD-020.  
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu  
plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free  
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2008. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
ISL22512  
Pinout  
ISL22512  
(8 LD SOIC)  
TOP VIEW  
ISL22512  
(10 LD µTQFN)  
TOP VIEW  
NC  
O
O
PU  
PD  
RH  
1
8
7
6
5
V
CC  
V
PU  
1
9
CC  
2
3
4
ASE  
RL  
2
3
4
8
7
6
ASE  
PD  
RH  
RL  
V
RW  
SS  
V
RW  
SS  
NC  
Pin Descriptions  
SOIC  
PIN  
µTQFN  
PIN  
SYMBOL  
BRIEF DESCRIPTION  
1
2
3
1
2
3
PU  
PD  
RH  
The PU is a falling-edge triggered input with internal pull-up. Toggling PU will move the wiper close to RH  
terminal.  
The PD is a falling-edge triggered input with internal pull-up. Toggling PD will move the wiper close to RL  
terminal.  
The RH and RL pins of the ISL22511 are equivalent to the fixed terminals of a mechanical potentiometer. The  
minimum voltage is V  
and the maximum is V . The terminology of RH and RL references the relative  
SS  
CC  
position of the terminal in relation to wiper movement direction selected by the PU/PD input.  
4
5
4
6
VSS  
RW  
Ground  
The RW pin is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a  
mechanical potentiometer.  
6
7
RL  
The RH and RL pins of the ISL22511 are equivalent to the fixed terminals of a mechanical potentiometer. The  
minimum voltage is V  
and the maximum is V . The terminology of RH and RL references the relative  
SS  
CC  
position of the terminal in relation to wiper movement direction selected by the PU/PD input.  
7
8
8
9
ASE  
VCC  
NC  
Active low AUTOSTORE enable input or Manual Store active low input  
Supply Voltage  
No connection  
5, 10  
Block Diagrams  
V
(SUPPLY VOLTAGE)  
CC  
4-BIT  
UP/DOWN  
COUNTER  
RH  
31  
PU  
PD  
30  
29  
28  
RH  
PU  
PD  
4-BIT  
NONVOLATILE  
MEMORY  
CONTROL  
AND  
MEMORY  
ONE  
OF  
RW  
RW  
THIRTY  
TWO  
DECODER  
TRANSFER  
GATES  
RESISTOR  
ARRAY  
ASE  
STORE AND  
CONTROL  
RECALL  
RL  
2
ASE  
CIRCUITRY  
1
0
V
(GROUND)  
SS  
RL  
GENERAL  
DETAILED  
FN6679.0  
March 24, 2008  
2
ISL22512  
Absolute Maximum Ratings  
Thermal Information  
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C  
Voltage at PU and PD Pin with Respect to GND . -0.3V to VCC + 0.3  
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +6V  
Voltage at any DCP Pin with Respect to GND. . . . . . . .-0.3V to VCC  
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA  
Latchup . . . . . . . . . . . . . . . . . . . . . . . . . Class II, Level A @ +125°C  
ESD Rating  
Thermal Resistance (Typical, Notes 3, 4)  
θ
JA (°C/W)  
θ
JC (°C/W)  
48.3  
10 Lead µTQFN . . . . . . . . . . . . . . . . .  
8 Lead SOIC . . . . . . . . . . . . . . . . . . . .  
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C  
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below  
http://www.intersil.com/pbfree/Pb-FreeReflow.asp  
150  
120  
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4kV  
Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V  
Recommended Operating Conditions  
Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C  
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V  
Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mW  
Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±3.0mA  
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and  
result in failures not covered by warranty.  
NOTES:  
3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.  
4. θJC is for the location in the center of the exposed metal pad on the package underside.  
Potentiometer Specifications Over recommended operating conditions, unless otherwise specified.  
MIN  
TYP  
MAX  
SYMBOL  
PARAMETER  
RH to RL Resistance  
TEST CONDITIONS  
(Note 18) (Note 5) (Note 18)  
UNIT  
kΩ  
RTOTAL  
W option  
U option  
10  
50  
kΩ  
RH to RL Resistance Tolerance  
-20  
+20  
%
End-to-End Temperature Coefficient W option  
±80  
±125  
130  
ppm/°C  
(Note 16)  
U option  
ppm/°C  
(Note 16)  
RW  
Wiper Resistance  
VCC = 3.3V, wiper current IRW = VCC/RTOTAL  
VRH and VRL to GND  
400  
VCC  
Ω
V
VRH, VRL  
VRH and VRL Terminal Voltages  
Noise on Wiper Terminal  
Potentiometer Capacitance  
0
From 0Hz to 10MHz  
-80  
dBV  
pF  
CH/CL/CW  
(Note 17)  
10/10/25  
ILkgDCP  
Leakage on DCP Pins  
Voltage at pin from GND to VCC  
0.05  
0.4  
µA  
VOLTAGE DIVIDER MODE (0V @ RL; VCC @ RH; measured at RW unloaded)  
INL  
(Note 10)  
Integral Non-Linearity  
Differential Non-Linearity  
Zero-scale Error  
-1  
1
LSB  
(Note 6)  
DNL  
(Note 9)  
Monotonic over all tap positions  
-0.5  
0.5  
LSB  
(Note 6)  
ZSerror  
(Note 7)  
W option  
U option  
W option  
U option  
0
0
0.1  
0.1  
2
1
0
0
LSB  
(Note 6)  
FSerror  
(Note 8)  
Full-scale Error  
-2  
-1  
-0.1  
-0.1  
±25  
LSB  
(Note 6)  
TCV  
(Note 11)  
Ratiometric Temperature Coefficient Wiper from 5 hex to 1F hex for W and U  
option  
ppm/°C  
fCUTOFF  
3dB Cut-Off Frequency  
Wiper at the middle scale, W option  
Wiper at the middle scale, U option  
500  
75  
kHz  
kHz  
RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected)  
RINL  
(Note 15)  
Integral Non-Linearity  
DCP register set between 1 hex and 1F hex;  
monotonic over all tap positions; W option  
-1.5  
1.5  
MI  
(Note 12)  
DCP register set between 1 hex and 1F hex;  
monotonic over all tap positions; U option  
-1  
1
MI  
(Note 12)  
RDNL  
Differential Non-Linearity  
W and U option  
-0.5  
0.5  
MI  
(Note 14)  
(Note 12)  
FN6679.0  
March 24, 2008  
3
ISL22512  
Potentiometer Specifications Over recommended operating conditions, unless otherwise specified. (Continued)  
MIN  
TYP  
MAX  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
(Note 18) (Note 5) (Note 18)  
UNIT  
Roffset  
(Note 13)  
Offset  
W option  
U option  
0
0
1
2
1
MI  
(Note 12)  
0.5  
MI  
(Note 12)  
DC Electrical Specifications Over recommended operating conditions unless otherwise specified.  
MIN  
TYP  
MAX  
SYMBOL  
PARAMETER  
VCC Active Current  
TEST CONDITIONS  
(Note 18) (Note 5) (Note 18)  
UNIT  
ICC  
VCC = 5.5V, perform wiper move  
operation  
150  
µA  
ICC  
VCC Current During Store Operation  
VCC = 5.5V, perform non-volatile  
store operation  
2
mA  
ISB  
ILkg  
VIH  
VIL  
Standby Current  
0.6  
3
µA  
µA  
V
PU, PD Input Leakage Current  
PU, PD Input HIGH Voltage  
PU, PD input LOW Voltage  
PU, PD Input Capacitance  
VIN = VSS to VCC  
-2  
+2  
VCC x 0.7  
VCC x 0.1  
V
CIN  
(Note 17)  
VCC = 3.3V, TA = +25°C, f = 1MHz  
10  
1
pF  
Rpull_up  
(Note 17)  
Pull-Up Resistor for PU and PD  
MΩ  
AC Electrical Specifications Over recommended operating conditions unless otherwise specified.  
MIN  
TYP  
MAX  
SYMBOL  
tGAP  
PARAMETER  
Time Between Two Separate Push Button Events  
Debounce Time  
(Note 18)  
(Note 5)  
(Note 18)  
UNIT  
ms  
ms  
ms  
ms  
s
2
tDB  
15  
250  
50  
2
28  
390  
78  
tS SLOW  
tS FAST  
Wiper Change on a Slow Mode  
100  
25  
Wiper Change on a Fast Mode  
tstdn  
Time to Enter Shutdown Mode (keep PU and PD LOW)  
(Note 17)  
tPU  
Power-Up to Wiper Stable  
VCC Power-Up Rate  
500  
50  
µs  
tR VCC  
0.2  
V/ms  
NOTES:  
5. Typical values are for TA = +25°C and 3.3V supply voltage.  
6. LSB: [V(RW)15 – V(RW)0]/15. V(RW)31 and V(RW)0 are voltage on RW pin for the DCP register set to 0F hex and 00 hex respectively. LSB is  
the incremental voltage when changing from one tap to an adjacent tap.  
7. ZS error = V(RW)0/LSB.  
8. FS error = [V(RW)31 – VCC]/LSB.  
9. DNL = [V(RW)i – V(RW)i-1]/LSB -1, for i = 1 to 15; i is the DCP register setting.  
10. INL = [V(RW)i – i • LSB – V(RW)]/LSB for i = 1 to 15  
Max(V(RW) ) Min(V(RW) )  
6
10  
i
i
11.  
for i = 5 to 15 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper  
[Max(V(RW) ) + Min(V(RW) )] ⁄ 2 +165°C voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range.  
--------------------------------------------------------------------------------------------- --------------------  
TC  
=
×
V
i
i
12. MI = |RW15 – RW0|/15. MI is a minimum increment. RW15 and RW0 are the measured resistances for the DCP register set to 1F hex and 00  
hex respectively.  
13. Roffset = RW0/MI, when measuring between RW and RL.  
Roffset = RW15/MI, when measuring between RW and RH.  
14. RDNL = (RWi – RWi-1)/MI, for i = 1 to 15.  
15. RINL = [RWi – (MI • i) – RW0]/MI, for i = 1 to 15.  
6
16.  
for i = 5 to 15, T = -40°C to +125°C. Max( ) is the maximum value of the resistance and Min ( ) is the  
minimum value of the resistance over the temperature range.  
[Max(Ri) Min(Ri)]  
10  
--------------------------------------------------------------- --------------------  
TC  
=
×
R
+165°C  
[Max(Ri) + Min(Ri)] ⁄ 2  
17. Limits should be considered typical and are not production tested.  
18. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.  
FN6679.0  
March 24, 2008  
4
ISL22512  
Slow Mode Timing  
t
DB  
t
GAP  
PU  
*
MI  
V
W
* MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage.  
Fast Mode Timing  
t
DB  
PU  
t
S FAST  
t
S SLOW  
*
MI  
V
W
1s  
* MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage.  
Shutdown Mode Timing  
t
DB  
2s  
SHUTDOWN MODE  
PU  
PD  
V
W
AUTOSTORE Mode Timing  
t
DB  
250ms  
2s  
20ms  
PU  
Memory Write  
CYCLE  
PD  
(HIGH)  
ASE  
(LOW)  
WIPER  
POSITION  
N
N + 1  
N + 2  
FN6679.0  
March 24, 2008  
5
ISL22512  
Typical Performance Curves  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
160  
V
= 5.5V  
CC  
+125ºC  
+25ºC  
140  
120  
V
= 5V  
CC  
100  
80  
60  
40  
20  
0
V
= 2.7V  
CC  
-40ºC  
0
3
6
9
12  
15  
-40  
-15  
10  
35  
60  
85  
110  
TEMPERATURE (°C)  
TAP POSITION (DECIMAL  
FIGURE 1. WIPER RESISTANCE vs TAP POSITION  
FIGURE 2. STANDBY ICC vs TEMPERATURE  
[ I(RW) = VCC/RTOTAL ] FOR 10kΩ (W)  
0.05  
0.10  
0.05  
V
= 5.5V  
CC  
0.03  
0.01  
V
= 5.5V  
CC  
0.00  
-0.01  
-0.03  
-0.05  
V
= 2.7V  
CC  
-0.05  
V
= 2.7V  
CC  
-0.10  
0
3
6
9
12  
15  
0
3
6
9
12  
15  
TAP POSITION (DECIMAL  
TAP POSITION (DECIMAL)  
FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER  
FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER  
MODE FOR 10kΩ (W)  
MODE FOR 10kΩ (W)  
0.0030  
0
V
= 2.7V  
CC  
0.0025  
0.0020  
0.0015  
0.0010  
0.0005  
0
-0.2  
-0.4  
-0.6  
-0.8  
-1  
V
= 5.5V  
V
= 5.5V  
CC  
CC  
V
= 2.7V  
CC  
-40  
-15  
10  
35  
60  
85  
110  
-40  
-15  
10  
35  
60  
85  
110  
TEMPERATURE (ºC)  
TEMPERATURE (ºC)  
FIGURE 6. FS ERROR vs TEMPERATURE  
FIGURE 5. ZS ERROR vs TEMPERATURE  
FN6679.0  
March 24, 2008  
6
ISL22512  
Typical Performance Curves (Continued)  
0.2  
0.5  
0.3  
V
= 2.7V  
V
= 2.7V  
CC  
CC  
0.1  
0.0  
0.1  
-0.1  
-0.3  
-0.5  
V
= 5.5V  
-0.1  
-0.2  
CC  
V
= 5.5V  
CC  
0
3
6
9
12  
15  
0
3
6
9
12  
15  
TAP POSITION (DECIMAL)  
TAP POSITION (DECIMAL)  
FIGURE 7. DNL vs TAP POSITION IN RHEOSTAT MODE FOR  
FIGURE 8. INL vs TAP POSITION IN RHEOSTAT MODE FOR  
10kΩ (W)  
10kΩ (W)  
1.2  
30  
25  
V
= 5.5V  
CC  
0.6  
0.0  
V
= 2.7V  
20  
15  
10  
5
CC  
V
= 5.5V  
CC  
V
= 2.7V  
CC  
-0.6  
-1.2  
0
5
7
9
11  
13  
15  
-40  
-15  
10  
35  
60  
85  
110  
TAP POSITION (DECIMAL)  
TEMPERATURE (ºC)  
FIGURE 10. TC FOR VOLTAGE DIVIDER MODE IN ppm  
FIGURE 9. END TO END RTOTAL % CHANGE vs  
TEMPERATURE  
INPUT SINEWAVE  
300  
250  
200  
V
= 2.7V  
CC  
150  
100  
50  
MIDSCALE  
OUTPUT  
V
= 5.5V  
CC  
3dB CUT OFF = 500kHz  
0
5
7
9
11  
13  
15  
TAP POSITION (DECIMAL)  
FIGURE 11. TC FOR RHEOSTAT MODE IN ppm  
FIGURE 12. FREQUENCY RESPONSE (500kHz)  
FN6679.0  
March 24, 2008  
7
ISL22512  
array is comprised of 15 individual resistors connected in  
Power-Up and Down Requirements  
series. At either end of the array and between each resistor  
is an electronic switch that transfers the potential at that  
point to the wiper.  
There are no restrictions on the power-up or power-down  
conditions of VCC and the voltages applied to the  
potentiometer pins provided that VCC is always more  
positive than or equal to VRH and VRL, i.e., VCC VRH,VRL  
The VCC ramp rate specification is always in effect.  
.
The ISL22512 is designed to interface directly to two push  
button switches for effectively moving the wiper up or down.  
The PU and PD inputs increment or decrement a 4-bit  
counter respectively. The output of this counter is decoded to  
select one of the thirty-two wiper positions along the resistive  
array. The wiper increment input, PU and the wiper  
decrement input, PD are both connected to an internal  
pull-up so that they normally remain HIGH. When pulled  
LOW by an external push button switch or a logic LOW level  
input, the wiper will be switched to the next adjacent tap  
position.  
Pin Descriptions  
RH and RL  
The RH and RL pins of the ISL22512 are equivalent to the  
fixed terminals of a mechanical potentiometer. The minimum  
voltage is V and the maximum is V . The terminology of  
SS  
CC  
RH and RL references the relative position of the terminal in  
relation to wiper movement direction.  
RW  
Internal debounce circuitry prevents inadvertent switching of  
the wiper position if PU or PD remain LOW for less than  
15ms, typical. Each of the buttons can be pushed either  
once for a single increment/decrement or continuously for a  
multiple increments/decrements. The number of  
increments/decrements of the wiper position depends on  
how long the button is being pushed. When making a  
continuous push, after the first second, the  
increment/decrement speed increases. For the first second,  
the device will be in the slow scan mode. Then, if the button  
is held for longer than 1 second, the device will go into the  
fast scan mode. As soon as the button is released, the  
ISL22512 will return to a standby condition.  
The RW pin is the wiper terminal of the potentiometer which  
is equivalent to the movable terminal of a mechanical  
potentiometer.  
PU  
The debounced PU input is used to increment the wiper  
position. An on-chip pull-up holds the PU input HIGH. A  
switch closure to ground or a LOW logic level will, after a  
debounce time, move the wiper to the next adjacent higher  
tap position.  
PD  
The debounced PD input is used to decrement the wiper  
position. An on-chip pull-up holds the PD input HIGH. A  
switch closure to ground or a LOW logic level will, after a  
debounce time, move the wiper to the next adjacent lower  
tap position.  
If two or more buttons are pressed simultaneously, all  
commands are ignored upon release of ALL buttons, except  
Shutdown Mode condition.  
The wiper, when at either fixed terminal, acts like its  
mechanical equivalent and does not move beyond the last  
position. That is, the counter does not wrap around when  
clocked to either extreme.  
ASE  
The debounced ASE (AUTOSTORE enable) pin can be in  
one of two states:  
AUTOSTORE  
1. AUTOSTORE is enabled if ASE is held LOW during  
power-up.  
The value of the counter is stored in EEPROM memory after  
2 seconds of no activity on PU or PD inputs while ASE is  
enabled (held LOW). When power is restored, the content of  
the memory is recalled and the counter resets to the last  
value stored.  
2. AUTOSTORE is disabled if ASE is held HIGH during  
power-up. A LOW to HIGH transition will initiate a manual  
store operation. This is for the user who wishes to  
connect a push button switch to this pin. For every valid  
push, the ISL22512 will store the current wiper position to  
the EEPROM.  
If AUTOSTORE is to be implemented, ASE is typically hard  
wired to VSS. If ASE is held HIGH during power-up and then  
taken LOW, the wiper will not respond to the PU or PD inputs  
until ASE is brought HIGH and held HIGH.  
Device Operation  
There are three sections of the ISL22512: the input control,  
counter and decode section; the EEPROM memory; and the  
resistor array. The input control section operates just like an  
up/down counter. The output of this counter is decoded to  
turn on a single electronic switch, connecting a point on the  
resistor array to the wiper output. Under the proper  
Manual (Push Button) Store  
When ASE is not enabled (held HIGH), a push button switch  
may be used to pull ASE LOW for more than 15ms and  
released to perform a manual store of the wiper position.  
conditions, the contents of the counter can be stored in  
EEPROM memory and retained for future use. The resistor  
During memory write cycle all inputs will be ignored.  
FN6679.0  
March 24, 2008  
8
ISL22512  
Shutdown Mode  
The ISL22512 enters into Shutdown Mode if both PU and  
PD inputs are kept LOW for 2 seconds. In this mode, the  
resistors array is totally disconnected from its RH pin and the  
wiper is moved to position closest to RL pin, as shown in  
Figure 13. Note, that PU and PD inputs must be pulled LOW  
within tDB time window of 15ms, see “Shutdown Mode  
Timing” on page 5. Otherwise all command will be ignored till  
both inputs will be released.  
RH  
RW  
RL  
FIGURE 13. DCP CONNECTION IN SHUTDOWN MODE  
Holding either PU , PD or ASE input LOW for more than  
15ms will exit shutdown mode and return wiper to prior  
shutdown position. If PU or PD will be held LOW for more  
than 250ms, the ISL22512 will start auto-increment or  
auto-decrement of wiper position.  
R
with V Removed  
CC  
TOTAL  
The end- to-end resistance of the array will fluctuate once  
CC is removed.  
V
FN6679.0  
March 24, 2008  
9
ISL22512  
Small Outline Plastic Packages (SOIC)  
M8.15 (JEDEC MS-012-AA ISSUE C)  
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE  
N
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
INCHES MILLIMETERS  
E
SYMBOL  
MIN  
MAX  
MIN  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
NOTES  
-B-  
A
A1  
B
C
D
E
e
0.0532  
0.0040  
0.013  
0.0688  
0.0098  
0.020  
-
-
1
2
3
L
9
SEATING PLANE  
A
0.0075  
0.1890  
0.1497  
0.0098  
0.1968  
0.1574  
-
-A-  
3
h x 45°  
D
4
-C-  
0.050 BSC  
1.27 BSC  
-
α
H
h
0.2284  
0.0099  
0.016  
0.2440  
0.0196  
0.050  
5.80  
0.25  
0.40  
6.20  
0.50  
1.27  
-
e
A1  
C
5
B
0.10(0.004)  
L
6
0.25(0.010) M  
C
A M B S  
N
α
8
8
7
NOTES:  
0°  
8°  
0°  
8°  
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of  
Publication Number 95.  
Rev. 1 6/05  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006  
inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. Inter-  
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per  
side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater  
above the seating plane, shall not exceed a maximum value of  
0.61mm (0.024 inch).  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact.  
FN6679.0  
March 24, 2008  
10  
ISL22512  
Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)  
L10.2.1x1.6A  
D
A
B
10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC  
PACKAGE  
6
MILLIMETERS  
INDEX AREA  
N
E
SYMBOL  
MIN  
0.45  
NOMINAL  
MAX  
0.55  
NOTES  
2X  
0.10 C  
A
A1  
A3  
b
0.50  
-
1
2
2X  
0.10 C  
-
-
0.05  
-
TOP VIEW  
0.127 REF  
-
0.15  
2.05  
1.55  
0.20  
0.25  
2.15  
1.65  
5
0.10 C  
0.05 C  
D
2.10  
-
C
A
E
1.60  
-
SEATING PLANE  
e
0.50 BSC  
-
A1  
k
0.20  
0.35  
-
0.40  
10  
4
-
-
SIDE VIEW  
L
0.45  
-
(DATUM A)  
N
2
PIN #1 ID  
Nd  
Ne  
θ
3
4xk  
1
2
NX L  
1
3
N
0
-
12  
4
(DATUM B)  
Rev. 3 6/06  
N-1  
NOTES:  
5
NX b  
e
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.  
2. N is the number of terminals.  
3. Nd and Ne refer to the number of terminals on D and E side,  
respectively.  
0.10 M C A B  
0.05 M C  
3
(ND-1) X e  
4. All dimensions are in millimeters. Angles are in degrees.  
5. Dimension b applies to the metallized terminal and is measured  
between 0.15mm and 0.30mm from the terminal tip.  
6. The configuration of the pin #1 identifier is optional, but must be  
located within the zone indicated. The pin #1 identifier may be  
either a mold or mark feature.  
BOTTOM VIEW  
C
L
(A1)  
NX (b)  
L
5
7. Maximum package warpage is 0.05mm.  
e
8. Maximum allowable burrs is 0.076mm in all directions.  
9. Same as JEDEC MO-255UABD except:  
SECTION "C-C"  
TERMINAL TIP  
C C  
No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm  
"L" MAX dimension = 0.45 not 0.42mm.  
FOR ODD TERMINAL/SIDE  
10. For additional information, to assist with the PCB Land Pattern  
Design effort, see Intersil Technical Brief TB389.  
b
2.50  
1.75  
0.05 MIN  
L
2.00  
0.80  
0.275  
0.10 MIN  
0.25  
0.50  
DETAIL “A” PIN 1 ID  
10  
LAND PATTERN  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN6679.0  
March 24, 2008  
11  

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