ISL4270EIR [INTERSIL]
QFN Packaged, +/-15kV ESD Protected, +3V to +5.5V, 300nA, 250kbps, RS-232 Transceivers with Enhanced Automatic Powerdown and a Separate Logic Supply; QFN封装， +/- 15kV ESD保护， + 3V至+ 5.5V ， 300nA的， 250kbps的， RS - 232收发器，具有增强的自动关闭电源和一个单独的逻辑电源
| 型号： | ISL4270EIR |
| 厂家： | 
Intersil |
| 描述： | QFN Packaged, +/-15kV ESD Protected, +3V to +5.5V, 300nA, 250kbps, RS-232 Transceivers with Enhanced Automatic Powerdown and a Separate Logic Supply |
| 文件： | 总13页 (文件大小：327K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL4270E
®
Data Sheet
August 2004
FN6041.1
QFN Packaged, +/-15kV ESD Protected,
+3V to +5.5V, 300nA, 250kbps, RS-232
Transceivers with Enhanced Automatic
Powerdown and a Separate Logic Supply
Features
• Available in Near Chip Scale QFN (5mmx5mm) Package
• V Supply Pin for Compatibility with Mixed Voltage
L
Systems
The Intersil ISL4270E is a 3.0V to 5.5V powered RS-232
transceiver which meets ElA/TIA-232 and V.28/V.24
• ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000)
• Manual and Enhanced Automatic Powerdown Features
• Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V
specifications, even at V
= 3.0V. Additionally, it provides
CC
±15kV ESD protection (IEC61000-4-2 Air Gap and Human
Body Model) on transmitter outputs and receiver inputs
(RS-232 pins). Targeted applications are PDAs, Palmtops,
and notebook and laptop computers where the low
operational, and even lower standby power consumption is
critical. Efficient on-chip charge pumps, coupled with manual
and enhanced automatic powerdown functions, reduce the
standby supply current to a 300nA trickle. Tiny 5mm x 5mm
Quad Flat No-Lead (QFN) packaging, and the use of small,
low value capacitors ensure board space savings as well.
Data rates greater than 250kbps are guaranteed at worst
case load conditions.
• On-Chip Charge Pumps Require Only Four External
0.1µF Capacitors
• Receivers Stay Active in Powerdown
• Very Low Supply Current . . . . . . . . . . . . . . . . . . . . 300µA
• Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps
• Wide Power Supply Range. . . . . . . . Single +3V to +5.5V
• Low Supply Current in Powerdown State. . . . . . . . 300nA
• Pb-Free Available (RoHS Compliant)
The ISL4270E features a V pin that adjusts the logic pin
L
output levels and input thresholds to values compatible with
Applications
the V
powering the external logic (e.g., a UART).
• Any System Requiring RS-232 Communication Ports
- Battery Powered, Hand-Held, and Portable Equipment
- Laptop Computers, Notebooks, Palmtops
- Digital Cameras
CC
This device includes an enhanced automatic powerdown
function which powers down the on-chip power-supply and
driver circuits. This occurs when all receiver and transmitter
inputs detect no signal transitions for a period of 30 seconds.
It power back up, automatically, whenever it senses a
transition on any transmitter or receiver input.
- PDA’s and PDA Cradles
- Cellular/Mobile Phones
Ordering Information
Table 1 summarizes the features of the ISL4270E, while
Application Note AN9863 summarizes the features of each
device comprising the 3V RS-232 family.
TEMP.
RANGE ( C)
PKG. DWG.
#
o
PART NO.
PACKAGE
32 Ld QFN
ISL4270EIR
-40 to 85
L32.5x5
L32.5x5
ISL4270EIRZ
(See Note)
-40 to 85
32 Ld QFN
(Pb-free)
*Add “-T” suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020C.
TABLE 1. SUMMARY OF FEATURES
NO. OF NO.OF DATARATE Rx. ENABLE LOGIC
PART
V
MANUAL
ENHANCED AUTOMATIC
L
NUMBER
Tx.
Rx.
(kbps)
FUNCTION?
SUPPLY PIN?
POWER- DOWN? POWERDOWN FUNCTION?
ISL4270E
3
3
250
NO
YES
YES
YES
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved
1
ISL4270E
Pinout
ISL4270E (QFN)
TOP VIEW
32 31 30 29 28 27 26 25
NC
C2+
C2-
V-
NC
T1
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
OUT
T2
T3
OUT
OUT
R1
R2
R3
T1
IN
IN
IN
IN
T2
IN
INVALID
NC
NC
9
10 11 12 13 14 15 16
Pin Descriptions
PIN
FUNCTION
V
System power supply input (3.0V to 5.5V).
CC
V+
Internally generated positive transmitter supply (+5.5V).
Internally generated negative transmitter supply (-5.5V).
Ground connection.
V-
GND
C1+
C1-
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
C2+
C2-
T
TTL/CMOS compatible transmitter Inputs. The switching point is a function of the V voltage.
L
IN
T
±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs.
±15kV ESD Protected, RS-232 compatible receiver inputs.
OUT
R
IN
R
TTL/CMOS level receiver outputs. Swings between GND and V .
L
OUT
V
Logic-Level Supply. All TTL/CMOS inputs and outputs are powered by this supply.
L
INVALID
Active low output that indicates if no valid RS-232 levels are present on any receiver input. Swings between GND and V .
L
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (see Table 2).
The switching point is a function of the V voltage.
L
FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active (FORCEOFF must be high). The
switching point is a function of the V voltage.
L
2
ISL4270E
Typical Operating Circuit
+3.3V
+
0.1µF
27
29
C
0.1µF
C1+
1
V
30
4
C
0.1µF
CC
3
+
+
+
V+
V-
31
2
C1-
C
0.1µF
2
C2+
C
4
0.1µF
3
5
C2-
+
T
T
1
2
23
T1
T1
T2
T3
IN
IN
IN
OUT
OUT
OUT
6
22
21
RS-232
LEVELS
T2
T
3
10
T3
TTL/CMOS
LOGIC LEVELS
R
R
1
2
14
20
19
18
R1
R2
R1
R2
OUT
OUT
IN
IN
5kΩ
5kΩ
5kΩ
13
12
RS-232
LEVELS
R
3
R3
R3
OUT
IN
V
L
15
11
LOGIC V
CC
0.1µF
+
FORCEON
28
7
V
CC
FORCEOFF
GND
26
TO POWER
CONTROL LOGIC
INVALID
3
ISL4270E
Absolute Maximum Ratings
Thermal Information
o
V
V
to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V
Thermal Resistance (Typical, Note 1)
θJA ( C/W)
CC
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
L
32 Ld QFN Package. . . . . . . . . . . . . . . . . . . . . . . . .
Moisture Sensitivity (see Technical Brief TB363)
32
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V
Input Voltages
QFN Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Junction Temperature (Plastic Package) . . . . . . . 150 C
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C
o
o
o
o
T
R
, FORCEON, FORCEOFF . . . . . . . . . . . . . . . . . . -0.3V to 6V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
IN
Output Voltages
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V
Operating Conditions
T
R
OUT
Temperature Range
, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (V +0.3V)
OUT
L
o
o
ISL4270EIR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 C to 85 C
Short Circuit Duration
T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
OUT
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
JA
Tech Brief TB379, and Tech Brief TB389.
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF, V = V ; Unless Otherwise Specified.
CC
1
4
L
CC
o
Typicals are at T = 25 C, V
= V = 3.3V
A
CC
L
TEMP
o
PARAMETER
TEST CONDITIONS
( C)
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Supply Current, Automatic
Powerdown
All R Open, FORCEON = GND, FORCEOFF = V
IN
25
-
0.3
5
µA
CC
Supply Current, Powerdown
FORCEOFF = GND
25
25
-
-
0.3
0.3
5
1
µA
Supply Current,
All Outputs Unloaded, FORCEON = FORCEOFF = V
,
mA
CC
Automatic Powerdown Disabled
V
= 3.15V
CC
LOGIC AND TRANSMITTER INPUTS
Input Logic Threshold Low
Input Logic Threshold High
T
T
, FORCEON, FORCEOFF
V
V
V
V
V
V
= 3.3V or 5V
= 2.5V
Full
Full
Full
Full
Full
25
-
-
-
0.8
V
V
IN
L
L
L
L
L
L
-
0.6
, FORCEON, FORCEOFF
= 5V
2.4
2.0
1.4
-
-
-
-
V
IN
= 3.3V
-
V
= 2.5V
-
-
V
= 1.8V
0.9
0.5
±0.01
-
-
V
Transmitter Input Hysteresis
Input Leakage Current
RECEIVER OUTPUTS
Output Voltage Low
25
-
V
T
, FORCEON, FORCEOFF
Full
-
±1.0
µA
IN
I
I
= 1.6mA
= -1.0mA
Full
Full
-
-
0.4
-
V
V
OUT
Output Voltage High
RECEIVER INPUTS
Input Voltage Range
Input Threshold Low
V - 0.6 V - 0.1
L L
OUT
Full
25
25
25
25
25
25
-25
-
25
-
V
V
V
V
V
V
= V = 5.0V
0.8
1.5
1.2
1.8
1.5
0.5
5
CC
CC
CC
CC
L
= V = 3.3V
0.6
-
V
L
Input Threshold High
= V = 5.0V
-
-
2.4
2.4
-
V
L
= V = 3.3V
V
L
Input Hysteresis
Input Resistance
-
V
3
7
kΩ
4
ISL4270E
Electrical Specifications Test Conditions: V = 3V to 5.5V, C - C = 0.1µF, V = V ; Unless Otherwise Specified.
CC
1
4
L
CC
o
Typicals are at T = 25 C, V
= V = 3.3V (Continued)
A
CC
L
TEMP
o
PARAMETER
TRANSMITTER OUTPUTS
Output Voltage Swing
TEST CONDITIONS
( C)
MIN
TYP
MAX
UNITS
All Transmitter Outputs Loaded with 3kΩ to Ground
Full
Full
Full
Full
±5.0
±5.4
10M
±35
-
-
V
Ω
Output Resistance
V
V
= V+ = V- = 0V, Transmitter Output = ±2V
300
-
CC
Output Short-Circuit Current
Output Leakage Current
= 0V
-
-
±60
±25
mA
µA
OUT
V
= ±12V, V
= 0V or 3V to 5.5V
OUT
CC
Automatic Powerdown or FORCEOFF = GND
ENHANCED AUTOMATIC POWERDOWN (FORCEON = GND, FORCEOFF = V
)
CC
Receiver Input Thresholds to
INVALID High
See Figure 4
See Figure 4
Full
Full
-2.7
-0.3
-
-
-
2.7
0.3
V
V
Receiver Input Thresholds to
INVALID Low
INVALID Output Voltage Low
INVALID Output Voltage High
I
I
= 1.6mA
= -1.0mA
Full
Full
25
-
-
0.4
V
V
OUT
OUT
V
- 0.6
-
-
L
Receiver Positive or Negative
Threshold to INVALID High Delay
See Figure 7
-
-
1
µs
(t
)
INVH
Receiver Positive or Negative
See Figure 7
25
30
-
µs
Threshold to INVALID Low Delay
(t
)
INVL
Receiver or Transmitter Edge to
Transmitters Enabled Delay (t
Note 2, See Figure 7
Note 2, See Figure 7
25
-
100
30
-
µs
)
WU
Receiver or Transmitter Edge to
Transmitters Disabled Delay
Full
15
60
sec
(t
)
AUTOPWDN
TIMING CHARACTERISTICS
Maximum Data Rate
R
= 3kΩ, C = 1000pF, One Transmitter Switching
Full
25
25
25
25
25
25
25
250
500
0.15
0.15
100
100
50
-
-
kbps
µs
L
L
Receiver Propagation Delay
Receiver Input to Receiver
Output, C = 150pF
t
t
-
-
PHL
PLH
L
-
µs
Time to Exit Powerdown
Transmitter Skew
T
| V
OUT
| ≥ 3.7V
-
-
µs
X
t
t
- t
PHL PLH
-
-
ns
Receiver Skew
- t
PHL PLH
-
-
ns
Transition Region Slew Rate
V
R
= 3.3V,
C = 150pF to 1000pF
6
4
18
30
30
V/µs
V/µs
CC
L
= 3kΩ to 7kΩ,
L
C = 150pF to 2500pF
13
L
Measured From 3V to -3V or -3V
to 3V
ESD PERFORMANCE
RS-232 Pins (T , R
OUT IN
)
Human Body Model
25
25
25
-
-
-
±15
±15
±8
-
-
-
kV
kV
kV
IEC61000-4-2 Air Gap Discharge
IEC61000-4-2 Contact Discharge
NOTES:
2. An “edge” is defined as a transition through the transmitter or receiver input thresholds.
5
ISL4270E
from GND to V , and do not tristate in powerdown (see
Table 2).
Detailed Description
L
The ISL4270E operates from a single +3V to +5.5V supply,
guarantees a 250kbps minimum data rate, requires only four
small external 0.1µF capacitors, features low power
consumption, and meets all ElA RS-232C and V.28
specifications. The circuit is divided into three sections: The
charge pump, the transmitters, and the receivers.
V
L
R
R
XIN
XOUT
GND ≤ V
≤ V
-25V ≤ V
≤ +25V
5kΩ
ROUT
L
RIN
GND
Charge-Pump
FIGURE 1. RECEIVER CONNECTIONS
Intersil’s new ISL4270E utilizes regulated on-chip dual
charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a V
supply as
Low Power Operation
CC
low as 3.0V. This allows these devices to maintain RS-232
compliant output levels over the ±10% tolerance range of
3.3V powered systems. The efficient on-chip power supplies
require only four small, external 0.1µF capacitors for the
This 3V device requires a nominal supply current of 0.3mA,
even at V = 5.5V, during normal operation (not in
CC
powerdown mode). This is considerably less than the 11mA
current required by comparable 5V RS-232 devices, allowing
users to reduce system power simply by replacing the old
style device with the ISL4270E in new designs.
voltage doubler and inverter functions over the full V
CC
range; other capacitor combinations can be used as shown
in Table 3. The charge pumps operate discontinuously (i.e.,
they turn off as soon as the V+ and V- supplies are pumped
up to the nominal values), resulting in significant power
savings.
Powerdown Functionality
The already low current requirement drops significantly
when the device enters powerdown mode. In powerdown,
supply current drops to 1µA, because the on-chip charge
Transmitters
pump turns off (V+ collapses to V , V- collapses to GND),
CC
The transmitters are proprietary, low dropout, inverting
drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. Coupled with the on-chip ±5.5V supplies, these
transmitters deliver true RS-232 levels over a wide range of
single supply system voltages.
and the transmitter outputs tristate. This micro-power mode
makes these devices ideal for battery powered and portable
applications.
Software Controlled (Manual) Powerdown
All transmitter outputs disable and assume a high
impedance state when the device enters the powerdown
mode (see Table 2). These outputs may be driven to ±12V
when disabled.
This device allows the user to force the IC into the low power,
standby state, and utilizes a two pin approach where the
FORCEON and FORCEOFF inputs determine the IC’s
mode. For always enabled operation, FORCEON and
FORCEOFF are both strapped high. To switch between
active and powerdown modes, under logic or software
control, only the FORCEOFF input need be driven. The
FORCEON state isn’t critical, as FORCEOFF dominates
over FORCEON. Nevertheless, if strictly manual control over
powerdown is desired, the user must strap FORCEON high
to disable the enhanced automatic powerdown circuitry.
All devices guarantee a 250kbps data rate for full load
conditions (3kΩ and 1000pF), V
≥ 3.0V, with one
CC
transmitter operating at full speed. Under more typical
conditions of V ≥ 3.3V, R = 3kΩ, and C = 250pF, one
CC
L
L
transmitter easily operates at 1.25Mbps.
The transmitter input threshold is set by the voltage applied
to the V supply pin. Transmitter inputs float if left
unconnected (there are no pull-up resistors), and may cause
L
Connecting FORCEOFF and FORCEON together disables
the enhanced automatic powerdown feature, enabling them
to function as a manual SHUTDOWN input (see Figure 2).
I
increases. Connect unused inputs to GND for the best
CC
performance.
With any of the above control schemes, the time required to
exit powerdown, and resume transmission is only 100µs.
Receivers
The ISL4270E contains standard inverting receivers that
convert RS-232 signals to CMOS output levels and accept
inputs up to ±25V while presenting the required 3kΩ to 7kΩ
input impedance (see Figure 1) even if the power is off
When using both manual and enhanced automatic
powerdown (FORCEON = 0), the ISL4270E won’t power up
from manual powerdown until both FORCEOFF and
FORCEON are driven high, or until a transition occurs on a
receiver or transmitter input. Figure 3 illustrates a circuit for
ensuring that the ISL4270E powers up as soon as
(V
= 0V). The receivers’ Schmitt trigger input stage uses
CC
hysteresis to increase noise immunity and decrease errors
due to slow input signal transitions. Receiver outputs swing
FORCEOFF switches high. The rising edge of the Master
Powerdown signal forces the device to power up, and the
ISL4270E returns to enhanced automatic powerdown
6
ISL4270E
TABLE 2. POWERDOWN LOGIC TRUTH TABLE
RS-232 LEVEL
RCVR OR XMTR
EDGE WITHIN 30 FORCEOFF FORCEON TRANSMITTER RECEIVER
PRESENT AT
INVALID
SEC?
NO
NO
YES
YES
NO
NO
X
INPUT
INPUT
OUTPUTS
OUTPUTS RECEIVER INPUT? OUTPUT
MODE OF OPERATION
H
H
H
H
H
H
L
H
H
L
Active
Active
Active
Active
Active
Active
Active
Active
Active
NO
YES
NO
L
H
L
Normal Operation (Enhanced
Auto Powerdown Disabled)
Active
Active
Normal Operation (Enhanced
Auto Powerdown Enabled)
L
Active
YES
NO
H
L
L
High-Z
High-Z
High-Z
High-Z
Powerdown Due to Enhanced
Auto Powerdown Logic
L
YES
NO
H
L
X
X
Manual Powerdown
X
L
YES
H
INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWERDOWN)
X
X
NOTE 3
NOTE 3
NOTE 3
NOTE 3
Active
Active
Active
YES
NO
H
L
Normal Operation
High-Z
Forced Auto Powerdown
NOTES:
3. Input is connected to INVALID Output.
MASTER POWERDOWN LINE
FORCEOFF, FORCEON
INVALID
POWER
MANAGEMENT
UNIT
PWR
MGT
LOGIC
0.1µF
1MΩ
I/O CHIP
POWER SUPPLY
FORCEOFF
FORCEON
V
L
ISL4270E
ISL4270E
V
CC
FIGURE 3. CIRCUIT TO ENSURE IMMEDIATE POWER UP
WHEN EXITING FORCED POWERDOWN
V Logic Supply Input
L
Unlike other RS-232 interface devices where the CMOS
I/O
UART
CPU
outputs swing between 0 and V , the ISL4270E features a
CC
separate logic supply input (V ; 1.8V to 5V, regardless of
L
V
) that sets V for the receiver and INVALID outputs.
CC
OH
Connecting V to a host logic supply lower than V
,
L
CC
prevents the ISL4270E outputs from forward biasing the
input diodes of a logic device powered by that lower supply.
Connecting V to a logic supply greater than V
ensures
L
CC
that the receiver and INVALID output levels are compatible
even with the CMOS input V of AC, HC, and CD4000
FIGURE 2. CONNECTIONS FOR MANUAL POWERDOWN
IH
devices. Note that the V supply current increases to 100µA
mode an RC time constant after this rising edge. The time
constant isn’t critical, because the ISL4270E remains
powered up for 30 seconds after the FORCEON falling edge,
even if there are no signal transitions. This gives slow-to-
wake systems (e.g., a mouse) plenty of time to start
transmitting, and as long as it starts transmitting within 30
seconds both systems remain enabled.
L
with V = 5V and V
= 3.3V (see Figure 16). V also
L
CC
L
powers the transmitter and logic inputs, thereby setting their
switching thresholds to levels compatible with the logic
supply. This separate logic supply pin allows a great deal of
flexibility in interfacing to systems with different logic
supplies. If logic translation isn’t required, connect V to the
L
ISL4270E V
.
CC
INVALID Output
The INVALID output always indicates (see Table 2) whether
or not 30µs have elapsed with invalid RS-232 signals (see
7
ISL4270E
Figures 4 and 7) persisting on all of the receiver inputs,
Figure 5 illustrates the enhanced powerdown control logic.
Note that once the ISL4270E enters powerdown (manually
or automatically), the 30 second timer remains timed out
(set), keeping the ISL4270E powered down until FORCEON
transitions high, or until a transition occurs on a receiver or
transmitter input.
giving the user an easy way to determine when the interface
block should power down. Invalid receiver levels occur
whenever the driving peripheral’s outputs are shut off
(powered down) or when the RS-232 interface cable is
disconnected. In the case of a disconnected interface cable
where all the receiver inputs are floating (but pulled to GND
by the internal receiver pull down resistors), the INVALID
logic detects the invalid levels and drives the output low. The
power management logic then uses this indicator to power
down the interface block. Reconnecting the cable restores
valid levels at the receiver inputs, INVALID switches high,
and the power management logic wakes up the interface
block. INVALID can also be used to indicate the DTR or
RING INDICATOR signal, as long as the other receiver
inputs are floating, or driven to GND (as in the case of a
powered down driver).
As stated previously, the INVALID output switches low
whenever invalid levels have persisted on all of the receiver
inputs for more than 30µs (see Figure 7), but this has no
direct effect on the state of the ISL4270E (see the next
sections for methods of utilizing INVALID to power down the
device).
The time to recover from automatic powerdown mode is
typically 100µs.
FORCEOFF
EDGE
T_IN
DETECT
INVALID switches high 1µs after detecting a valid RS-232
level on a receiver input. INVALID operates in all modes
(forced or automatic powerdown, or forced on), so it is also
useful for systems employing manual powerdown circuitry.
S
30s
AUTOPWDN
TIMER
R
EDGE
DETECT
R_IN
VALID RS-232 LEVEL - INVALID = 1
2.7V
INDETERMINATE
FORCEON
FIGURE 5. ENHANCED AUTOMATIC POWERDOWN LOGIC
0.3V
INVALID LEVEL - INVALID = 0
-0.3V
Emulating Standard Automatic Powerdown
If enhanced automatic powerdown isn’t desired, the user can
implement the standard automatic powerdown feature
(mimics the function on the ICL3221E/23E/43E) by
connecting the INVALID output to the FORCEON and
FORCEOFF inputs, as shown in Figure 6. After 30µs of
INDETERMINATE
-2.7V
VALID RS-232 LEVEL - INVALID = 1
FIGURE 4. DEFINITION OF VALID RS-232 RECEIVER LEVELS
Enhanced Automatic Powerdown
Even greater power savings is available by using the
enhanced automatic powerdown function. When the
enhanced powerdown logic determines that no transitions
have occurred on any of the transmitter nor receiver inputs
for 30 seconds, the charge pump and transmitters
powerdown, thereby reducing supply current to 1µA. The
ISL4270E automatically powers back up whenever it detects
a transition on one of these inputs. This automatic
powerdown feature provides additional system power
savings without changes to the existing operating system.
ISL4270E
I/O
UART
CPU
Enhanced automatic powerdown operates when the
FORCEON input is low, and the FORCEOFF input is high.
Tying FORCEON high disables automatic powerdown, but
manual powerdown is always available via the overriding
FORCEOFF input. Table 2 summarizes the enhanced
automatic powerdown functionality.
FIGURE 6. CONNECTIONS FOR AUTOMATIC POWERDOWN
WHEN NO VALID RECEIVER SIGNALS ARE
PRESENT
invalid receiver levels, INVALID switches low and drives the
ISL4270E into a forced powerdown condition. INVALID
switches high as soon as a receiver input senses a valid
8
ISL4270E
RECEIVER
INPUTS
INVALID
REGION
}
TRANSMITTER
INPUTS
TRANSMITTER
OUTPUTS
t
INVH
INVALID
OUTPUT
t
INVL
t
AUTOPWDN
t
WU
t
WU
t
AUTOPWDN
V+
V
CC
0
V-
FIGURE 7. ENHANCED AUTOMATIC POWERDOWN AND INVALID TIMING DIAGRAMS
RS-232 level, forcing the ISL4270E to power on. See the
“INVALID DRIVING FORCEON AND FORCEOFF” section
of Table 2 for an operational summary. This operational
mode is perfect for handheld devices that communicate with
another computer via a detachable cable. Detaching the
cable allows the internal receiver pull-down resistors to pull
the inputs to GND (an invalid RS-232 level), causing the
30µs timer to time-out and drive the IC into powerdown.
Reconnecting the cable restores valid levels, causing the IC
to power back up.
reduces ripple on the transmitter outputs and slightly
reduces power consumption.
TABLE 3. REQUIRED CAPACITOR VALUES
V
C
C , C , C
CC
1
2
3
4
(V)
(µF)
(µF)
3.0 to 3.6
4.5 to 5.5
3.0 to 5.5
0.1
0.1
0.33
1
0.047
0.22
When using minimum required capacitor values, make sure
that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal
value. The capacitor’s equivalent series resistance (ESR)
usually rises at low temperatures and it influences the
amount of ripple on V+ and V-.
Hybrid Automatic Powerdown Options
For devices which communicate only through a detachable
cable, connecting INVALID to FORCEOFF (with
FORCEON = 0) may be a desirable configuration. While the
cable is attached INVALID and FORCEOFF remain high, so
the enhanced automatic powerdown logic powers down the
RS-232 device whenever there is 30 seconds of inactivity on
the receiver and transmitter inputs. Detaching the cable
allows the receiver inputs to drop to an invalid level (GND),
so INVALID switches low and forces the RS-232 device to
power down. The ISL4270E remains powered down until the
cable is reconnected (INVALID = FORCEOFF = 1) and a
transition occurs on a receiver or transmitter input (see
Figure 5). For immediate power up when the cable is
reattached, connect FORCEON to FORCEOFF through a
network similar to that shown in Figure 3.
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is
adequate. In applications that are particularly sensitive to
power supply noise, decouple V
to ground with a
CC
capacitor of the same value as the charge-pump capacitor C .
1
Connect the bypass capacitor as close as possible to the IC.
Transmitter Outputs when Exiting
Powerdown
Figure 8 shows the response of two transmitter outputs
when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels,
with no glitching, ringing, nor undesirable transients. Each
transmitter is loaded with 3kΩ in parallel with 2500pF. Note
that the transmitters enable only when the magnitude of the
supplies exceed approximately 3V.
Capacitor Selection
The ISL4270E charge pumps require only 0.1µF capacitors
for the full operational voltage range. Table 3 lists other
acceptable capacitor values for various supply voltage
ranges. Do not use values smaller than those listed in
Table 3. Increasing the capacitor values (by a factor of 2)
9
ISL4270E
5V/DIV.
T1
5V/DIV
2V/DIV
FORCEOFF
T1
IN
T1
OUT
OUT
T2
R1
V
= +3.3V
CC
C1 - C4 = 0.1µF
V
= +3.3V
CC
C1 - C4 = 0.1µF
TIME (20µs/DIV.)
5µs/DIV.
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
FIGURE 10. LOOPBACK TEST AT 120kbps
High Data Rates
5V/DIV.
The ISL4270E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 9
details a transmitter loopback test circuit, and Figure 10
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 11 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
T1
IN
T1
R1
OUT
OUT
V
= +3.3V
V
CC
C1 - C4 = 0.1µF
CC
+
0.1µF
2µs/DIV.
FIGURE 11. LOOPBACK TEST AT 250kbps
V
V
CC
L
+
+
V+
V-
C1+
+
C
C
1
2
C
3
4
C1-
C2+
C2-
Interconnection with 3V and 5V Logic
Standard 3.3V powered RS-232 devices interface well with
3V and 5V powered TTL compatible logic families (e.g., ACT
ISL4270E
C
+
and HCT), but the logic outputs (e.g., R
) fail to reach
OUTS
T
T
IN
OUT
the V level of 5V powered CMOS families like HC, AC, and
IH
CD4000. The ISL4270E V supply pin solves this problem.
L
1000pF
R
IN
R
OUT
By connecting V to the same supply (1.8V to 5V) powering
L
the logic device, the ISL4270E logic outputs will swing from
FORCEON
5K
GND to the logic V
.
CC
V
FORCEOFF
CC
±15kV ESD Protection
FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT
All pins on the 3V interface devices include ESD protection
structures, but the ISL4270E incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to ±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
10
ISL4270E
without allowing any latchup mechanism to activate, and
resistor coupled with the larger charge storage capacitor yields
don’t interfere with RS-232 signals as large as ±25V.
a test that is much more severe than the HBM test. The extra
ESD protection built into this device’s RS-232 pins allows the
design of equipment meeting level 4 criteria without the need
for additional board level protection on the RS-232 port.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5kΩ current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330Ω limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the IC
pin until the voltage arcs to it. The current waveform delivered to
the IC pin depends on approach speed, humidity, temperature,
etc., so it is difficult to obtain repeatable results. The “E” device
RS-232 pins withstand ±15kV air-gap discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely to
suffer an ESD event are those that are exposed to the outside
world (the RS-232 pins in this case), and the IC is tested in its
typical application configuration (power applied) rather than
testing each pin-to-pin combination. The lower current limiting
o
Typical Performance Curves V = V = 3.3V, T = 25 C
CC
L
A
30
25
20
6.0
V
+
OUT
4.0
2.0
0
1 TRANSMITTER AT 250kbps
OTHER TRANSMITTERS AT 30kbps
+SLEW
15
-2.0
-4.0
-SLEW
10
V
-
OUT
-6.0
5
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
FIGURE 13. SLEW RATE vs LOAD CAPACITANCE
FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
11
ISL4270E
o
Typical Performance Curves V = V = 3.3V, T = 25 C (Continued)
CC
L
A
45
40
35
30
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
NO LOAD
ALL OUTPUTS STATIC
250kbps
120kbps
25
20
20kbps
4000
15
10
5000
2000
3000
1000
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
LOAD CAPACITANCE (pF)
FIGURE 14. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGE
10m
NO LOAD
ALL OUTPUTS STATIC
= 3.3V
1m
100µ
10µ
1µ
V
CC
V
≤ V
V > V
L CC
L
CC
100n
10n
1n
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
V
(V)
L
FIGURE 16. V SUPPLY CURRENT vs V VOLTAGE
L
L
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP)
GND
TRANSISTOR COUNT
ISL4270E: 1063
PROCESS
Si Gate CMOS
12
ISL4270E
Quad Flat No-Lead Plastic Package (QFN)
Micro Lead Frame Plastic Package (MLFP)
L32.5x5
32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VHHD-2 ISSUE C
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
1.00
0.05
1.00
NOTES
A
A1
A2
A3
b
0.80
0.90
-
-
-
-
-
-
9
0.20 REF
9
0.18
2.95
2.95
0.23
0.30
3.25
3.25
5,8
D
5.00 BSC
-
D1
D2
E
4.75 BSC
9
3.10
7,8
5.00 BSC
-
E1
E2
e
4.75 BSC
9
3.10
7,8
0.50 BSC
-
k
0.25
0.30
-
-
-
-
L
0.40
0.50
0.15
8
L1
N
-
32
8
8
-
10
2
Nd
Ne
P
3
8
-
3
0.60
12
9
θ
-
-
9
Rev. 1 10/02
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensionsare provided toassistwith PCBLandPattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
13
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