ISL55004_06 [INTERSIL]

High Supply Voltage 200MHz Unity-Gain Stable Operational Amplifier; 高电源电压200MHz的单位增益稳定运算放大器
ISL55004_06
型号: ISL55004_06
厂家: Intersil    Intersil
描述:

High Supply Voltage 200MHz Unity-Gain Stable Operational Amplifier
高电源电压200MHz的单位增益稳定运算放大器

运算放大器
文件: 总12页 (文件大小:509K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ISL55004  
®
Data Sheet  
July 27, 2006  
FN6219.2  
High Supply Voltage 200MHz Unity-Gain  
Stable Operational Amplifier  
Features  
• 200MHz -3dB bandwidth  
• Unity-gain stable  
The ISL55004 is a high speed, low power, low cost  
monolithic operational amplifier. The ISL55004 is unity-gain  
stable and features a 300V/µs slew rate and 200MHz  
bandwidth while requiring only 8.5mA of supply current per  
amplifier.  
• Low supply current: 8.5mA per amplifier  
• Wide supply range: ±2.5V to ±15V dual-supply and 5V to  
30V single-supply  
The power supply operating range of the ISL55004 is from  
±15V down to ±2.5V. For single-supply operation, the  
ISL55004 operates from 30V down to 5V.  
• High slew rate: 300V/µs  
• Fast settling: 75ns to 0.1% for a 10V step  
• Wide output voltage swing: -12.75V/+13.4V with  
The ISL55004 also features an extremely wide output  
V = ±15V, R = 1k  
S
L
voltage swing of -12.75V/+13.4V with V = ±15V and  
S
• Enhanced replacement for EL2444  
R = 1k.  
L
• Pb-free plus anneal available (RoHS compliant)  
At a gain of +1, the ISL55004 has a -3dB bandwidth of  
200MHz with a phase margin of 55°. Because of its  
conventional voltage-feedback topology, the ISL55004 allow  
the use of reactive or non-linear elements in its feedback  
network. This versatility combined with low cost and 140mA  
of output-current drive makes the ISL55004 an ideal choice  
for price-sensitive applications requiring low power and high  
speed.  
Applications  
• Video amplifiers  
• Single-supply amplifiers  
• Active filters/integrators  
• High speed sample-and-hold  
• High speed signal processing  
• ADC/DAC buffers  
The ISL55004 is in a 14 Ld SO (0.150”) package and  
specified for operation over the full -40°C to +85°C  
temperature range.  
• Pulse/RF amplifiers  
• Pin diode receivers  
• Log amplifiers  
Ordering Information  
TAPE  
PART  
&
PKG.  
DWG. #  
PART NUMBER MARKING REEL  
PACKAGE  
• Photo multiplier amplifiers  
• Difference amplifiers  
ISL55004IB  
55004IB  
55004IB  
-
14 Ld SO (0.150”) MDP0027  
ISL55004IB-T7  
7” 14 Ld SO (0.150”) MDP0027  
13” 14 Ld SO (0.150”) MDP0027  
ISL55004IB-T13 55004IB  
Pinout  
ISL55004  
[14 LD SO (0.150”)]  
TOP VIEW  
ISL55004IBZ  
(See Note)  
55004IBZ  
-
14 Ld SO (0.150”) MDP0027  
(Pb-Free)  
ISL55004IBZ-T7 55004IBZ  
(See Note)  
7” 14 Ld SO (0.150”) MDP0027  
(Pb-Free)  
OUT1  
IN1-  
1
2
3
4
5
6
7
14 OUT4  
13 IN4-  
12 IN4+  
11 VS-  
ISL55004IBZ-T13 55004IBZ  
(See Note)  
13” 14 Ld SO (0.150”) MDP0027  
(Pb-Free)  
-
-
+
+
+
+
-
-
IN1+  
VS+  
NOTE: Intersil Pb-free plus anneal products employ special Pb-free  
material sets; molding compounds/die attach materials and 100%  
matte tin plate termination finish, which are RoHS compliant and  
compatible with both SnPb and Pb-free soldering operations. Intersil  
Pb-free products are MSL classified at Pb-free peak reflow  
temperatures that meet or exceed the Pb-free requirements of  
IPC/JEDEC J STD-020.  
IN2+  
IN2-  
10 IN3+  
9
8
IN3-  
OUT2  
OUT3  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
ISL55004  
Absolute Maximum Ratings (T = 25°C)  
A
Supply Voltage (V ). . . . . . . . . . . . . . . . . . . . . . . . . . ±16.5V or 33V  
Power Dissipation (P ) . . . . . . . . . . . . . . . . . . . . . . . . . See Curves  
D
S
Input Voltage (V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±V  
Operating Temperature Range (T ). . . . . . . . . . . . . .-40°C to +85°C  
IN)  
S
A
Differential Input Voltage (dV ). . . . . . . . . . . . . . . . . . . . . . . . .±10V  
Operating Junction Temperature (T ) . . . . . . . . . . . . . . . . . . +150°C  
J
IN  
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 60mA  
Storage Temperature (T ) . . . . . . . . . . . . . . . . . . .-65°C to +150°C  
ST  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests  
are at the specified temperature and are pulsed tests, therefore: T = T = T  
A
J
C
DC Electrical Specifications  
V
= ±15V, A = +1, R = 1k, T = 25°C, unless otherwise specified.  
S
V
L
A
PARAMETER  
DESCRIPTION  
Input Offset Voltage  
CONDITION  
MIN  
TYP  
1.2  
MAX  
UNIT  
mV  
µV/°C  
µA  
µA  
nA/°C  
V/V  
dB  
dB  
V
V
V
= ±15V  
5
OS  
S
TCV  
Average Offset Voltage Drift (Note 1)  
Input Bias Current  
17  
OS  
I
I
V
V
= ±15V  
= ±15V  
0.6  
3.5  
2
B
S
S
Input Offset Current  
0.2  
OS  
TCI  
Average Offset Current Drift (Note 1)  
Open-loop Gain  
0.2  
OS  
A
V
V
V
V
= ±15V, V  
= ±10V, R = 1kΩ  
12000  
75  
21000  
100  
90  
VOL  
S
OUT  
L
PSRR  
CMRR  
CMIR  
Power Supply Rejection Ratio  
Common-mode Rejection Ratio  
Common-mode Input Range  
Output Voltage Swing  
= ±5V to ±15V  
S
= ±10V, V  
= 0V  
OUT  
75  
CM  
= ±15V  
13  
S
V
V +, R = 1kΩ  
13.25  
-12.6  
9.6  
13.4  
-12.75  
10.7  
-9.4  
140  
8.5  
V
OUT  
O
L
V -, R = 1kΩ  
V
O
L
V +, R = 150Ω  
V
O
L
V -, R = 150Ω  
-8.3  
80  
V
O
L
I
I
Output Short Circuit Current  
Supply Current (per amplifier)  
Input Resistance  
mA  
mA  
MΩ  
pF  
SC  
V
= ±15V, no load  
9.25  
S
S
R
C
R
2.0  
3.2  
IN  
Input Capacitance  
A
= +1  
= +1  
1
IN  
V
Output Resistance  
A
50  
mΩ  
V
OUT  
V
PSOR  
Power Supply Operating Range  
Dual supply  
±2.25  
4.5  
±15  
30  
Single supply  
V
NOTE:  
1. Measured from T  
MIN  
to T .  
MAX  
AC Electrical Specifications  
V
= ±15V, A = +1, R = 1k, T = 25°C, unless otherwise specified.  
S
V
L
A
PARAMETER  
BW  
DESCRIPTION  
CONDITION  
= ±15V, A = +1  
MIN  
TYP  
200  
55  
MAX  
UNIT  
MHz  
MHz  
MHz  
MHz  
MHz  
°
-3dB Bandwidth (V  
= 0.4V  
)
V
V
V
V
V
OUT  
PP  
S
S
S
S
S
V
= ±15V, A = -1  
V
= ±15V, A = +2  
53  
V
= ±15V, A = +5  
V
17  
GBWP  
PM  
Gain Bandwidth Product  
Phase Margin  
= ±15V  
70  
R
= 1k, C = 5pF  
55  
L
L
SR  
Slew Rate (Note 1)  
260  
300  
V/µs  
FN6219.2  
July 27, 2006  
2
ISL55004  
AC Electrical Specifications  
V
= ±15V, A = +1, R = 1k, T = 25°C, unless otherwise specified. (Continued)  
S
V
L
A
PARAMETER  
DESCRIPTION  
CONDITION  
MIN  
TYP  
9.5  
MAX  
UNIT  
MHz  
ns  
FPBW  
Full-power Bandwidth (Note 2)  
V
V
= ±15V  
S
S
t
Settling to +0.1% (A = +1)  
V
= ±15V, 10V step  
75  
S
dG  
dP  
Differential Gain (Note 3)  
Differential Phase  
NTSC/PAL  
NTSC/PAL  
10kHz  
0.01  
0.05  
12  
%
°
eN  
Input Noise Voltage  
Input Noise Current  
nV/Hz  
pA/Hz  
iN  
10kHz  
1.5  
NOTES:  
1. Slew rate is measured on rising edge.  
2. For V = ±15V, V = 10V , for V = ±5V, V  
= 5V . Full-power bandwidth is based on slew rate measurement using FPBW = SR/(2π *  
PP  
S
OUT  
PP  
S
OUT  
V
).  
PEAK  
3. Video performance measured at V = ±15V, A = +2 with two times normal video level across R = 150. This corresponds to standard video  
S
V
L
levels across a back-terminated 75load. For other values or R , see curves.  
L
Typical Performance Curves  
FIGURE 1. OPEN-LOOP GAIN vs FREQUENCY  
4
FIGURE 2. OPEN-LOOP PHASE vs FREQUENCY  
4
V
R
R
= ±15V  
= 500Ω  
= 500Ω  
V
R
R
= ±15V  
= 500Ω  
= 500Ω  
S
F
L
S
F
L
3
2
3
2
1
0
1
0
A
= +1  
V
A
= -1  
V
A
= +2  
V
-1  
-2  
-1  
-2  
A
= -2  
V
A
= +5  
V
-3  
-4  
-5  
-3  
-4  
-5  
A
= -5  
V
-6  
100k  
-6  
100k  
1M  
10M  
100M  
1G  
1M  
10M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 3. GAIN vs FREQUENCY FOR VARIOUS NON-  
INVERTING GAIN SETTINGS  
FIGURE 4. GAIN vs FREQUENCY FOR VARIOUS INVERTING  
GAIN SETTINGS  
FN6219.2  
July 27, 2006  
3
ISL55004  
Typical Performance Curves (Continued)  
FIGURE 5. PHASE vs FREQUENCY FOR VARIOUS NON-  
INVERTING GAIN SETTINGS  
FIGURE 6. PHASE vs FREQUENCY FOR VARIOUS  
INVERTING GAIN SETTINGS  
100  
350  
R =500Ω  
A =+2  
V
L
R =500Ω  
F
R =500Ω  
L
80  
300  
POSITIVE SLEW RATE  
NEGATIVE SLEW RATE  
C =5pF  
L
60  
40  
20  
0
250  
200  
150  
100  
0
3
6
9
12  
15  
0
3
6
9
12  
15  
SUPPLY VOLTAGES (±V)  
SUPPLY VOLTAGES (±V)  
FIGURE 7. GAIN BANDWIDTH PRODUCT vs SUPPLY  
FIGURE 8. SLEW RATE vs SUPPLY  
4
4
V
R
C
= ±15V  
= 500Ω  
= 5pF  
= +2  
S
F
L
V
R
C
= ±15V  
= 0Ω  
3
2
S
F
L
3
2
= 5pF  
A
V
R
= 500Ω  
L
A
= +1  
V
1
0
R
= 1kΩ  
1
0
L
R
= 1kΩ  
L
-1  
-2  
R
= 150Ω  
R = 150Ω  
L
-1  
-2  
L
R
= 500Ω  
L
R
= 50Ω  
L
-3  
-4  
-5  
-3  
-4  
-5  
R
= 50Ω  
L
-6  
100k  
-6  
1M  
10M  
100M  
1G  
100k  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
FREQUENCY (Hz)  
FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS R  
FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS R  
LOAD  
LOAD  
(A = +1)  
(A = +2)  
V
V
FN6219.2  
July 27, 2006  
4
ISL55004  
Typical Performance Curves (Continued)  
4
4
V
R
R
= ±15V  
= 500Ω  
= 500Ω  
= +2  
S
F
L
V
= ±15V  
S
F
L
3
2
3
2
C
= 100pF  
C
= 47pF  
L
C
= 68pF  
L
L
R
R
A
= 0Ω  
= 500Ω  
= +1  
C
= 27pF  
A
L
V
V
1
0
1
0
C
= 39pF  
L
C
= 15pF  
L
C
= 22pF  
C
L
C
= 5pF  
L
-1  
-2  
-1  
-2  
= 5pF  
L
-3  
-4  
-5  
-3  
-4  
-5  
C
= 0pF  
L
-6  
100k  
-6  
100k  
1M  
10M  
100M  
1G  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
FREQUENCY (Hz)  
FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS C  
FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS C  
LOAD  
LOAD  
(A = +1)  
(A = +2)  
V
V
4
4
V
R
C
= ±15V  
V
= ±15V  
S
L
L
S
L
L
R
= 500Ω  
3
2
3
2
F
= 500Ω  
R
C
A
= 500Ω  
= 5pF  
= +2  
= 5pF  
= +1  
A
V
V
R
= 500Ω  
F
1
0
1
0
R
= 100Ω  
F
R
= 1kΩ  
F
R
= 250Ω  
F
R
= 250Ω  
F
-1  
-2  
-1  
-2  
R
= 0Ω  
F
R
= 100Ω  
F
-3  
-4  
-5  
-3  
-4  
-5  
-6  
100k  
-6  
100k  
1M  
10M  
100M  
1G  
1M  
10M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS R  
FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS R  
FEEDBACK  
FEEDBACK  
(A = +1)  
(A = +2)  
V
V
4
4
V
R
R
= ±15V  
R
R
C
= 0Ω  
S
F
L
L
F
L
L
3
2
C
= 10pF  
3
2
IN  
= 500Ω  
= 500Ω  
= 5pF  
= +2  
= 500Ω  
C
= 6.8pF  
IN  
= 5pF  
= +1  
V = ±2.5V  
S
C
A
V
A
1
0
V
C
= 4.7pF  
1
0
IN  
V
= ±10V  
S
-1  
-2  
-1  
-2  
C
= 2.2pF  
IN  
V
= ±15V  
S
C
= 0pF  
IN  
-3  
-4  
-5  
-3  
-4  
-5  
V
= ±5V  
S
-6  
100k  
-6  
100k  
1M  
10M  
100M  
1G  
1M  
10M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS INVERTING  
FIGURE 16. GAIN vs FREQUENCY FOR VARIOUS SUPPLY  
SETTINGS  
INPUT CAPACITANCE (C  
)
IN  
FN6219.2  
July 27, 2006  
5
ISL55004  
Typical Performance Curves (Continued)  
FIGURE 17. COMMON-MODE REJECTION RATIO (CMRR)  
FIGURE 18. POWER SUPPLY REJECTION RATIO (PSRR)  
-20  
V =±15V  
S
A =+1  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
-100  
V
THD  
R =0Ω  
F
R =500Ω  
L
C =5pF  
L
OUT  
V
=2V  
P-P  
2ND HD  
3RD HD  
10M  
500K  
1M  
40M  
FREQUENCY (Hz)  
FIGURE 19. HARMONIC DISTORTION vs FREQUENCY  
(A = +1)  
FIGURE 20. HARMONIC DISTORTION vs OUTPUT VOLTAGE  
(A = +2)  
V
V
25  
20  
R =500Ω  
L
L
A =+1  
V
C =5pF  
A =+2  
V
R =500Ω  
F
15  
10  
5
0
0
3
6
9
12  
15  
SUPPLY VOLTAGES (±V)  
FIGURE 21. OUTPUT SWING vs FREQUENCY FOR VARIOUS  
GAIN SETTINGS  
FIGURE 22. OUTPUT SWING vs SUPPLY VOLTAGE FOR  
VARIOUS GAIN SETTINGS  
FN6219.2  
July 27, 2006  
6
ISL55004  
Typical Performance Curves (Continued)  
20% to 80%  
80% to 20%  
20% to 80% 80% to 20%  
FIGURE 23. LARGE SIGNAL RISE AND FALL TIMES  
FIGURE 24. SMALL SIGNAL RISE AND FALL TIMES  
JEDEC JESD51-3 LOW EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
25  
20  
1.2  
SO14  
=120°C/W  
1
0.8  
0.6  
0.4  
0.2  
0
1.042W  
θ
JA  
15  
10  
A =+1  
V
R =0Ω  
5
0
F
R =500Ω  
L
C =5pF  
L
0
3
6
9
12  
15  
0
25  
50  
75 85 100  
125  
150  
AMBIENT TEMPERATURE (°C)  
SUPPLY VOLTAGES (±V)  
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
FIGURE 25. SUPPLY CURRENT vs SUPPLY VOLTAGE  
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
1.8  
1.6  
1.420W  
1.4  
SO14  
1.2  
θ
=88°C/W  
JA  
1
0.8  
0.6  
0.4  
0.2  
0
0
25  
50  
75 85 100  
125  
150  
AMBIENT TEMPERATURE (°C)  
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
FN6219.2  
July 27, 2006  
7
ISL55004  
the gain slightly. If the gain setting is greater than 1, the gain  
Product Description  
resistor R can then be chosen to make up for any gain loss  
G
The ISL55004 is a wide bandwidth, low power, and low offset  
voltage feedback operational amplifier. This device is  
internally compensated for closed loop gain of +1 or greater.  
Connected in voltage follower mode and driving a 500Ω  
load, the -3dB bandwidth is around a 200MHz. Driving a  
150load and a gain of 2, the bandwidth is about 90MHz  
while maintaining a 300V/µs slew rate.  
which may be created by the additional series resistor at the  
output.  
When used as a cable driver, double termination is always  
recommended for reflection-free performance. For those  
applications, a back-termination series resistor at the  
amplifier's output will isolate the amplifier from the cable and  
allow extensive capacitive drive. However, other applications  
may have high capacitive loads without a back-termination  
resistor. Again, a small series resistor at the output can help  
to reduce peaking.  
The ISL55004 is designed to operate with supply voltage  
from +15V to -15V. That means for single supply application,  
the supply voltage is from 0V to 30V. For split supplies  
application, the supply voltage is from ±15V. The amplifier  
has an input common-mode voltage range from 1.5V above  
Output Drive Capability  
the negative supply (V - pin) to 1.5V below the positive  
S
The ISL55004 does not have internal short circuit protection  
circuitry. It has a typical short circuit current of 140mA. If the  
output is shorted indefinitely, the power dissipation could  
easily overheat the die or the current could eventually  
compromise metal integrity. Maximum reliability is  
supply (V + pin). If the input signal is outside the above  
S
specified range, it will cause the output signal to be distorted.  
The outputs of the ISL55004 can swing from -12.75V to  
+13.4V for V = ±15V. As the load resistance becomes  
S
maintained if the output current never exceeds ±60mA. This  
limit is set by the design of the internal metal interconnect.  
Note that in transient applications, the part is robust.  
lower, the output swing is lower.  
Choice of Feedback Resistor and Gain Bandwidth  
Product  
Short circuit protection can be provided externally with a  
back match resistor in series with the output placed close as  
possible to the output pin. In video applications this would be  
a 75resistor and will provide adequate short circuit  
protection to the device. Care should still be taken not to  
stress the device with a short at the output.  
For applications that require a gain of +1, no feedback  
resistor is required. Just short the output pin to the inverting  
input pin. For gains greater than +1, the feedback resistor  
forms a pole with the parasitic capacitance at the inverting  
input. As this pole becomes smaller, the amplifier's phase  
margin is reduced. This causes ringing in the time domain  
Power Dissipation  
and peaking in the frequency domain. Therefore, R can't be  
F
With the high output drive capability of the ISL55004, it is  
possible to exceed the 150°C absolute maximum junction  
temperature under certain load current conditions.  
Therefore, it is important to calculate the maximum junction  
temperature for an application to determine if load conditions  
or package types need to be modified to assure operation of  
the amplifier in a safe operating area.  
very big for optimum performance. If a large value of R  
must be used, a small capacitor in the few Pico Farad range  
F
in parallel with R can help to reduce the ringing and  
F
peaking at the expense of reducing the bandwidth. For gain  
of +1, R = 0 is optimum. For the gains other than +1,  
F
optimum response is obtained with R with proper selection  
F
of R and R (see Figures15 and 16 for selection).  
F
G
The maximum power dissipation allowed in a package is  
determined according to:  
Video Performance  
For good video performance, an amplifier is required to  
maintain the same output impedance and the same  
frequency response as DC levels are changed at the output.  
This is especially difficult when driving a standard video load  
of 150, because of the change in output current with DC  
level. The dG and dP of this device is about 0.01% and  
0.05°, while driving 150at a gain of 2. Driving high  
impedance loads would give a similar or better dG and dP  
performance.  
T
T  
AMAX  
JMAX  
PD  
= --------------------------------------------  
MAX  
Θ
JA  
Where:  
• T  
• T  
= Maximum junction temperature  
= Maximum ambient temperature  
JMAX  
AMAX  
θ = Thermal resistance of the package  
JA  
Driving Capacitive Loads and Cables  
The maximum power dissipation actually produced by an IC  
is the total quiescent supply current times the total power  
supply voltage, plus the power in the IC due to the load, or:  
The ISL55004 can drive 47pF loads in parallel with 500Ω  
with less than 3dB of peaking at gain of +1 and as much as  
100pF at a gain of +2 with under 3db of peaking. If less  
peaking is desired in applications, a small series resistor  
(usually between 5to 50) can be placed in series with the  
output to eliminate most peaking. However, this will reduce  
FN6219.2  
July 27, 2006  
8
ISL55004  
Application Circuits  
For sourcing:  
n
V
OUTi  
R
Li  
Sallen Key Low Pass Filter  
-----------------  
) ×  
OUTi  
PD  
= V × I  
+
+
(V V  
MAX  
S
SMAX  
S
A common and easy to implement filter taking advantage of  
the wide bandwidth, low offset and low power demands of  
the ISL55004. A derivation of the transfer function is  
provided for convenience (See Figure 28).  
i = 1  
For sinking:  
n
PD  
= V × I  
(V  
V ) × I  
OUTi S LOADi  
MAX  
S
SMAX  
Sallen Key High Pass Filter  
i = 1  
Again this useful filter benefits from the characteristics of the  
ISL55004. The transfer function is very similar to the low  
pass so only the results are presented (See Figure 29).  
Where:  
• V = Supply voltage  
S
• I  
SMAX  
= Maximum quiescent supply current  
• V  
= Maximum output voltage of the application  
OUT  
• R  
= Load resistance tied to ground  
LOAD  
• I  
LOAD  
= Load current  
• N = number of amplifiers (max = 4)  
By setting the two PD equations equal to each other, we  
MAX  
can solve the output current and R  
to avoid the device  
LOAD  
overheat.  
Caution: For supply voltages greater then 20V, the  
maximum power dissipation at 85°C ambient temperature  
could be exceeded. For higher supply voltages the  
maximum ambient temperature must be de-rated according  
to the Package Power Dissipation curve Figure 27. The  
maximum power dissipation is highly dependent upon the  
thermal conductivity of the PCB. For lower thermal  
conductivity boards use Figure 26.  
Power Supply Bypassing Printed Circuit Board  
Layout  
As with any high frequency device, a good printed circuit  
board layout is necessary for optimum performance. Lead  
lengths should be as short as possible. The power supply  
pin must be well bypassed to reduce the risk of oscillation.  
For normal single supply operation, where the V - pin is  
S
connected to the ground plane, a single 4.7µF tantalum  
capacitor in parallel with a 0.1µF ceramic capacitor from V +  
S
to GND will suffice. This same capacitor combination should  
be placed at each supply pin to ground if split supplies are to  
be used. In this case, the V - pin becomes the negative  
S
supply rail.  
Printed Circuit Board Layout  
For good AC performance, parasitic capacitance should be  
kept to minimum. Use of wire wound resistors should be  
avoided because of their additional series inductance. Use  
of sockets should also be avoided if possible. Sockets add  
parasitic inductance and capacitance that can result in  
compromised performance. Minimizing parasitic capacitance  
at the amplifier's inverting input pin is very important. The  
feedback resistor should be placed very close to the  
inverting input pin. Strip line design techniques are  
recommended for the signal traces.  
FN6219.2  
July 27, 2006  
9
ISL55004  
RB  
RA  
V
5V  
K = 1+  
Vo = K  
2
1
C
5
V1  
R2C2s +1  
Vo  
1nF  
C
V1Vi  
R1  
Vo Vi  
1
1
K V1  
1+  
+
= 0  
R2  
1nF  
C1s  
R
R
2
1
K
V+  
+
-
H(s) =  
V
OUT  
2
1kΩ  
1kC  
2
V
R1C1R2C2s + ((1K)R1C1+ R1C2 + R21C2)s +1  
1
R
1kΩ  
7
1nF  
V-  
1
H(jw) =  
2
1w R1C1R2C2 + jw((1K)R1C1+ R1C2 + R2C2)  
R
B
Holp = K  
1kΩ  
R
1kΩ  
1
A
C
5
wo =  
R1C1R2C2  
1nF  
1
Q =  
R1C1  
R1C2  
R2C1  
R2C2  
R1C1  
V
3
(1K)  
+
+
5V  
R2C2  
Holp = K  
Equations simplify if we let all  
components be equal R=C  
1
FIGURE 28. SALLEN KEY LOW PASS FILTER  
wo =  
RC  
1
Q =  
3 K  
V
5V  
2
Holp = K  
1
C
5
wo =  
R1C1R2C2  
1
1nF  
C
1
Q =  
R1C1  
R1C2  
R2C1  
R2C2  
R1C1  
(1K)  
+
+
1nF  
R2C2  
R
R
2
1
V+  
+
-
V
OUT  
1kΩ  
1kC  
2
V
1
R
1kΩ  
7
1nF  
V-  
R
K
4 K  
2
B
Holp =  
wo =  
1kΩ  
R
1kΩ  
A
C
Equations simplify if we let  
5
all components be equal R=C  
RC  
1nF  
2
Q =  
V
3
4 K  
5V  
FIGURE 29. SALLEN KEY HIGH PASS FILTER  
FN6219.2  
July 27, 2006  
10  
ISL55004  
Differential Output Instrumentation Amplifier  
e
= –(1 + 2R R )(e e )  
e
= (1 + 2R R )(e e )  
o4 2 G 1 2  
o3  
2
G
1
2
The addition of a third amplifier to the conventional three  
amplifier instrumentation amplifier introduces the benefits of  
differential signal realization, specifically the advantage of  
using common-mode rejection to remove coupled noise and  
ground potential errors inherent in remote transmission. This  
configuration also provides enhanced bandwidth, wider  
output swing and faster slew rate than conventional three  
amplifier solutions with only the cost of an additional  
amplifier and few resistors.  
e
= –2(1 + 2R R )(e e )  
2 G 1 2  
o
2f  
C1, 2  
A
= –2(1 + 2R R )  
2 G  
Di  
BW = -----------------  
A
Di  
Strain Gauge  
The strain gauge is an ideal application to take advantage of  
the moderate bandwidth and high accuracy of the ISL55004.  
The operation of the circuit is very straightforward. As the  
strain variable component resistor in the balanced bridge is  
subjected to increasing strain, its resistance changes,  
resulting in an imbalance in the bridge. A voltage variation  
from the referenced high accuracy source is generated and  
translated to the difference amplifier through the buffer  
stage. This voltage difference as a function of the strain is  
converted into an output voltage.  
A
1
R
R
3
3
e
1
+
-
A
3
R
e 3  
2
o
-
+
+
R
R
3
3
REF  
R
e
G
o
R
R
3
3
A
4
R
2
-
+
-
e 4  
o
A
2
R
R
3
3
-
+
e
2
FIGURE 30. DIFFERENTIAL OUTPUT AMPLIFIER  
+
V
2
5V  
-
C
6
VARIABLE SUBJECT  
TO STRAIN  
1nF  
1kΩ  
16  
1kΩ  
+
R
R
1kΩ  
1kΩ  
17  
18  
V
0V  
R
1kΩ  
R
5
15  
V+  
V-  
+
-
-
V
OUT  
(V1+V2+V3+V4)  
R
1kΩ  
L
1kΩ  
R
F
1kΩ  
C
12  
1nF  
+
-
V
5V  
4
FIGURE 31. STRAIN GAUGE  
FN6219.2  
July 27, 2006  
11  
ISL55004  
Small Outline Package Family (SO)  
A
D
h X 45°  
(N/2)+1  
N
A
PIN #1  
I.D. MARK  
E1  
E
c
SEE DETAIL “X”  
1
(N/2)  
B
L1  
0.010 M  
C A B  
e
H
C
A2  
A1  
GAUGE  
PLANE  
SEATING  
PLANE  
0.010  
L
4° ±4°  
0.004 C  
b
0.010 M  
C
A
B
DETAIL X  
MDP0027  
SMALL OUTLINE PACKAGE FAMILY (SO)  
SO16  
(0.150”)  
SO16 (0.300”)  
(SOL-16)  
SO20  
(SOL-20)  
SO24  
(SOL-24)  
SO28  
(SOL-28)  
SYMBOL  
SO-8  
0.068  
0.006  
0.057  
0.017  
0.009  
0.193  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
8
SO-14  
0.068  
0.006  
0.057  
0.017  
0.009  
0.341  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
14  
TOLERANCE  
MAX  
NOTES  
A
A1  
A2  
b
0.068  
0.006  
0.057  
0.017  
0.009  
0.390  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.406  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.504  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
20  
0.104  
0.007  
0.092  
0.017  
0.011  
0.606  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
24  
0.104  
0.007  
0.092  
0.017  
0.011  
0.704  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
28  
-
±0.003  
±0.002  
±0.003  
±0.001  
±0.004  
±0.008  
±0.004  
Basic  
-
-
-
c
-
D
1, 3  
E
-
E1  
e
2, 3  
-
L
±0.009  
Basic  
-
L1  
h
-
Reference  
Reference  
-
N
-
Rev. L 2/01  
NOTES:  
1. Plastic or metal protrusions of 0.006” maximum per side are not included.  
2. Plastic interlead protrusions of 0.010” maximum per side are not included.  
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN6219.2  
July 27, 2006  
12  

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