ISL91108IIAZ-T7A [INTERSIL]

Selectable forced PWM mode and external synchronization;


型号：	ISL91108IIAZ-T7A
厂家：	Intersil
描述：	Selectable forced PWM mode and external synchronization 开关
文件：	总9页 (文件大小：387K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

DATASHEET

High Efficiency Buck-Boost Regulator with 4.2A Switches

ISL91108

Features

The ISL91108 is a highly-integrated buck-boost switching

regulator that accepts input voltages either above or below the

regulated output voltage. Unlike other buck-boost regulators,

this regulator automatically transitions between operating

modes without significant output disturbance.

• Accepts input voltages above or below regulated output

voltage

• Automatic and seamless transitions between buck and

boost modes

• Input voltage range: 1.8V to 5.5V

This device is capable of delivering up to 2.7A of burst current

• Output current: up to 1.6A DC (PVIN = 2.8V, V

OUT

= 3.3V)

(PVIN = 3V, V

= 3.3V), and provides excellent efficiency due

OUT

• Burst current: up to 2.7A (PVIN = 3V, V

<600µs, t = 4.6ms)

= 3.3V, t

to its fully synchronous 4-switch architecture. No load

quiescent current of only 27.5µA also optimizes efficiency

under light-load conditions. Forced PWM and/or

synchronization to an external clock may also be selected for

noise sensitive applications.

OUT

• High efficiency: up to 95%

• 27.5µA quiescent current maximizes light load efficiency

• 2.6MHz switching frequency minimizes external component

size

The ISL91108 is designed for standalone applications and

supports a 3.3V fixed output voltage or variable output

voltages with an external resistor divider. Output voltages as

low as 1V or as high as 5.2V are supported using an external

resistor divider.

• Selectable forced PWM mode and external synchronization

• Fully protected for short-circuit, over-temperature, and

undervoltage

The ISL91108 requires only a single inductor and very few

external components. Power supply solution size is minimized

by a 2.34mmx1.72mm WLCSP and a 2.6MHz switching

frequency, which further reduces the size of external

components.

• Small 2.34mm x 1.72mm WLCSP

Applications

• Smartphones and tablets

• Wireless communication devices

• 2G/3G/4G power amplifiers

Related Literature

• AN1903 “ISL91108IIA-EVZ/ISL91108IIN-EVZ Evaluation

Board User Guide”

100

4.5VIN

1.8V TO 5.5V

ISL91108IINZ

3.5VIN

PVIN

LX1

1µH

2x10µF

3.0VIN

2.7VIN

2.5VIN

VIN

LX2

= 3.3V

MODE

VOUT

OUT

2x22µF

0.001

0.01

0.1

(A)

OUT

FIGURE 1. TYPICAL FIXED OUTPUT APPLICATION

FIGURE 2. ISL91108IINZ EFFICIENCY vs OUTPUT CURRENT

November 12, 2014

FN8448.1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

ISL91108

Block Diagram

LX1

LX2

A2 B2 C2

B4 C4

PVIN

VOUT

PGND

SOFT

DISCHARGE

GATE

DRIVERS

& ANTI-

SHOOT THRU

VIN

V_REF

PVIN

MONITOR

VOUT

CLAMP

THERMAL

SHUTDOWN

PWM

CONTROL

CURRENT

DETECT

MODE

VOUT

MONITOR

OSC

REF

ERROR

AMP

VOLTAGE

PROG.

GND

Pin Configuration

Pin Descriptions

ISL91108

PIN #

PIN NAMES

DESCRIPTION

(20 BUMP WLCSP)

TOP VIEW

A5, B5, C5

VOUT

Buck-boost output. Connect 2x22µF

capacitor to PGND.

A4, B4, C4

A3, B3, C3

A2, B2, C2

A1, B1, C1

LX2

PGND

LX1

Inductor connection, output side.

Power ground for high switching current.

Inductor connection, input side.

PVIN

Power input. Range: 1.8V to 5.5V. Connect

2x 10µF capacitor to PGND.

VIN

Supply input. Range: 1.8V to 5.5V.

Logic input, drive HIGH to enable device.

MODE/

SYNC

Logic input, HIGH for auto PFM mode. LOW

for forced PWM operation. Also, this pin

can be used with an external clock sync

input. Range: 2.75MHz to 3.25MHz.

GND

Analog ground pin.

Voltage feedback pin.

FN8448.1

November 12, 2014

Submit Document Feedback

ISL91108

Ordering Information

PACKAGE

Tape and Reel

(Pb-free)

PART NUMBER

(Notes 1, 2, 3)

PART

MARKING

VOUT

(V)

TEMP RANGE

PKG.

DWG. #

(°C)

ISL91108IINZ-T

GAZA

3.3

-40 to +85

20 Bump WLCSP

W4x5.20F

ISL91108IINZ-T7A

ISL91108IIAZ-T

ISL91108IIAZ-T7A

ISL91108IIN-EVZ

ISL91108IIA-EVZ

NOTES:

GAZA

GAXA

3.3

20 Bump WLCSP

ADJ.

Evaluation Board for ISL91108IINZ

Evaluation Board for ISL91108IIAZ

1. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte

tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil

Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for ISL91108. For more information on MSL please see techbrief TB363.

FN8448.1

November 12, 2014

Submit Document Feedback

ISL91108

Absolute Maximum Ratings

Thermal Information

PVIN, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V

LX1, LX2 (Note 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V

FB (ISL91108IIAZ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 2.7V

FB (ISL91108IINZ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V

GND, PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 0.3V

All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V

ESD Rating

Human Body Model (Tested per JESD22-A114E). . . . . . . . . . . . . . .2.5kV

Machine Model (Tested per JESD22-A115-A). . . . . . . . . . . . . . . . . 200V

Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV

Latch Up (Tested per JESD-78B; Class 2, Level A) . . . . . . . . . . . . . . 100mA

Thermal Resistance (Typical)

2.34x1.72 WLCSP (Notes 4, 5). . . . . . . . . .

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C

Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493



_JA(°C/W)



_JC(°C/W)

1.0

Recommended Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

Supply Voltage (V ) Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V to 5.5V

Load Current (I

) Range (DC) . . . . . . . . . . . . . . . . . . . . . . . . . . 0A to 1.6A

OUT

Maximum Burst Current (t <600µs, t = 4.6ms) . . . . . . . . . . . . . . . . .2.7A

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product

reliability and result in failures not covered by warranty.

NOTES:

4.  is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech

Brief TB379

5. For  , the “case temp” location is the center of the exposed metal pad on the package underside.

6. LX1 and LX2 pins can withstand switching transients of -1.5V for 100ns, and 7V for 20ms.

Analog Specifications

= PVIN = EN = 3.6V, V

OUT

= 3.3V, L = 1µH, C = 2x 10µF, C = 2x 22µF, T = +25°C. Boldface limits apply

across the recommended operating temperature range, -40°C to +85°C and input voltage ranges.

MIN

TYP

MAX

SYMBOL

PARAMETER

TEST CONDITIONS

(Note 7)

(Note 7) UNITS

POWER SUPPLY

VIN

Input Voltage Range

1.8

5.5

Undervoltage Lockout Threshold

Rising

Falling

1.725

1.650

27.5

1.775

UVLO

1.550

Supply Current

PFM mode, no external load on V

(Note 8)

OUT

µA

VIN

Supply Current, Shutdown

EN = GND

0.4

1.0

OUTPUT VOLTAGE REGULATION

VOUT

Output Voltage Range

ISL91108IIAZ, I

= 100mA

1.00

-2

5.20

OUT

Output Voltage Accuracy

= 0mA, PWM mode

= 1mA, PFM mode

OUT

-3

FB Pin Voltage Regulation

FB Pin Bias Current

For adjustable output version (ISL91108IIAZ)

0.788

0.80

0.812

0.2

µA

VOUT / Line Regulation, PWM Mode

VIN

= 500mA, MODE = GND, V step from 2.3V to

±0.005

±12.5

±0.4

mV/mV

OUT

5.5V

VOUT / Load Regulation, PWM Mode

= 3.7V, MODE = GND, I

step from 0mA to

OUT

mV/mA

mV/V

500mA

I

OUT

VOUT/

VIN

Line Regulation, PFM Mode

Load Regulation, PFM Mode

= 100mA, MODE = V , V step from 2.3V to

IN IN

OUT

5.5V

VOUT/

= 3.7V, MODE = V , I

IN OUT

step from 0mA to

mV/mA

I

100mA

OUT

Output Voltage Clamp

Rising

5.25

5.95

CLAMP

Output Voltage Clamp Hysteresis

400

FN8448.1

November 12, 2014

Submit Document Feedback

ISL91108

Analog Specifications

= PVIN = EN = 3.6V, V

OUT

= 3.3V, L = 1µH, C = 2x 10µF, C = 2x 22µF, T = +25°C. Boldface limits apply

across the recommended operating temperature range, -40°C to +85°C and input voltage ranges. (Continued)

MIN

TYP

MAX

SYMBOL

PARAMETER

TEST CONDITIONS

(Note 7)

(Note 7) UNITS

DC/DC SWITCHING SPECIFICATIONS

Oscillator Frequency

Minimum On Time

= 3.6V

2.4

2.6

2.9

MHz

ONMIN

I_PFETLEAKLX1 Pin Leakage Current

I_NFETLEAKLX2 Pin Leakage Current

SOFT-START and SOFT DISCHARGE

-0.5

+0.5

µA

Soft-start Time

Time from when EN signal asserts to when output

voltage ramp starts.

Time from when output voltage ramp starts to

when output voltage reaches 95% of its nominal

value with device operating in buck mode.

= 4V, I

= 200mA

OUT

Time from when output voltage ramp starts to

when output voltage reaches 95% of its nominal

value with device operating in boost mode.

= 2V, I = 200mA

OUT

VOUT Soft-Discharge ON-Resistance

EN < V

110

DISCHG

POWER MOSFET

P-Channel MOSFET ON-Resistance

N-Channel MOSFET ON-Resistance

P-Channel MOSFET Peak Current Limit

= 200mA

mΩ

DSON_P

DSON_N

PK_LMT

OUT

3.7

4.2

4.7

PFM/PWM TRANSITION

Load Current Threshold, PFM to PWM

200

MHz

°C

Load Current Threshold, PWM to PFM

External Synchronization Frequency Range

Thermal Shutdown

±2%

2.75

3.25

150

Thermal Shutdown Hysteresis

°C

LOGIC INPUTS

Input Leakage

0.03

0.5

0.4

µA

LEAK

Input HIGH Voltage

Input LOW Voltage

1.4

NOTES:

7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization

and are not production tested.

8. Quiescent current measurements are taken when the output is not switching.

FN8448.1

November 12, 2014

Submit Document Feedback

ISL91108

Short Circuit Protection

Functional Description

Functional Overview

Refer to the “Block Diagram” on page 2. The ISL91108

implements a complete buck-boost switching regulator, with

PWM controller, internal switches, references, protection

circuitry, and control inputs.

The ISL91108 provides short-circuit protection by monitoring the

FB voltage. When FB voltage is sensed to be lower than a certain

threshold, the PWM oscillator frequency is reduced in order to

protect the device from damage. The P-Channel MOSFET peak

current limit remains active during this state.

Undervoltage Lockout

The PWM controller automatically switches between buck and

boost modes as necessary to maintain a steady output voltage

with changing input voltages and dynamic external loads.

The undervoltage lockout (UVLO) feature prevents abnormal

operation in the event that the supply voltage is too low to

guarantee proper operation. When the VIN voltage falls below the

UVLO threshold, the regulator is disabled.

Internal Supply and References

Referring to the “Block Diagram” on page 2, the ISL91108

provides two power input pins. The PVIN pin supplies input power

to the DC/DC converter, while the VIN pin provides operating

Thermal Shutdown

A built-in thermal protection feature protects the ISL91108, if the

die temperature reaches +150°C (typical). At this die

temperature, the regulator is completely shut down. The die

temperature continues to be monitored in this thermal shutdown

mode. When the die temperature falls to +115°C (typical), the

device will resume normal operation.

voltage source required for stable V

generation. Separate

REF

ground pins (GND and PGND) are provided to avoid problems

caused by ground shift due to the high switching currents.

Enable Input

When exiting thermal shutdown, the ISL91108 will execute its

soft-start sequence.

A master enable pin EN allows the device to be enabled. Driving

EN LOW invokes a power-down mode, where most internal device

functions, including input and output power-good detection, are

disabled.

External Synchronization

An external sync feature is provided. Applying a clock signal with

a frequency between 2.75MHz and 3.25MHz at the MODE input

forces the ISL91108 to synchronize to this external clock. The

MODE input supports standard logic levels.

Soft Discharge

When the device is disabled by driving EN LOW, an internal

resistor between VOUT and GND is activated. This internal

resistor has a typical resistance of 110Ω.

Buck-Boost Conversion Topology

POR Sequence and Soft-start

The ISL91108 operates in either buck or boost mode. When

operating in conditions where VIN is close to VOUT, the ISL91108

alternates between buck and boost mode as necessary to

provide a regulated output voltage.

Bringing the EN pin HIGH allows the device to power-up. A number

of events occur during the start-up sequence. The internal voltage

reference powers up and stabilizes. The device then starts

operating. There is a 1ms (typical) delay between assertion of the

EN pin and the start of switching regulator soft-start ramp.

LX1

LX2

SWITCH D

The soft-start feature minimizes output voltage overshoot and

input inrush currents. During soft-start, the reference voltage is

ramped to provide a ramping VOUT voltage. While output voltage

is lower than approximately 20% of the target output voltage,

switching frequency is reduced to a fraction of the normal

switching frequency to aid in producing low duty cycles necessary

to avoid input in-rush current spikes. Once the output voltage

exceeds 20% of the target voltage, switching frequency is

increased to its nominal value.

SWITCH A

PVIN

VOUT

SWITCH B

SWITCH C

FIGURE 3. BUCK-BOOST TOPOLOGY

When the target output voltage is higher than the input voltage,

there will be a transition from buck mode to boost mode during

the soft-start sequence. At the time of this transition, the ramp

rate of the reference voltage is decreased, such that the output

voltage slew rate is decreased. This provides a slower output

voltage slew rate.

Figure 3 shows a simplified diagram of the internal switches and

external inductor.

PWM Operation

In buck PWM mode, Switch D is continuously closed and Switch C

is continuously open. Switches A and B operate as a synchronous

buck converter when in this mode.

The VOUT ramp time is not constant for all operating conditions.

Soft-start into boost mode will take longer than soft-start into

buck mode. The total soft-start time into buck operating mode is

typically 2ms, whereas the typical soft-start time into boost

mode operating mode is typically 3ms. Increasing the load

current will increase these typical soft-start times.

In boost PWM mode, Switch A remains closed and Switch B

remains open. Switches C and D operate as a synchronous boost

converter when in this mode.

FN8448.1

November 12, 2014

Submit Document Feedback

ISL91108

PFM Operation

1.8V TO 5.5V

ISL91108IIAZ

During PFM operation in buck mode, Switch D is continuously

closed and Switch C is continuously open. Switches A and B

operate in discontinuous mode during PFM operation. During

PFM operation in boost mode, the ISL91108 closes Switch A and

Switch C to ramp up the current in the inductor. When inductor

current reaches a certain threshold, the device turns OFF

Switches A and 10 C, then turns ON Switches B and D. With

Switches B and D closed, output voltage increases as the

inductor current ramps down.

PVIN

LX1

2x10µF

1µH

VIN

LX2

MODE

VOUT

= 3.3V

OUT

27pF

187k

2x22µF

60k

In most operating conditions, there will be multiple PFM pulses

to charge up the output capacitor. These pulses continue until

FIGURE 4. TYPICAL ISL91108IIAZ APPLICATION

has achieved the upper threshold of the PFM hysteretic

OUT

controller. Switching then stops, and remains stopped until V

Output Voltage Programming, Adjustable

Version

OUT

decays to the lower threshold of the hysteretic PFM controller.

Setting and controlling the output voltage of the ISL91108IIAZ

(adjustable output version) can be accomplished by selecting the

external resistor values.

Operation With V Close to V

OUT

When the output voltage is close to the input voltage, the

ISL91108 will rapidly and smoothly switch from boost to buck

mode as needed to maintain the regulated output voltage. This

behavior provides excellent efficiency and very low output

voltage ripple.

Equation 1 can be used to derive the R and R resistor values:









(EQ. 1)

------

VOUT = 0.8V  1 +





When designing a PCB, include a GND guard band around the FB

resistor network to reduce noise and improve accuracy and

Output Voltage Programming

The ISL91108 is available in fixed and adjustable output voltage

versions. To use the fixed output version (ISL91108IINZ), the

VOUT pin must be connected directly to FB.

stability. Resistors R and R should be positioned close to the

FB pin.

Feed-Forward Capacitor Selection

In the adjustable output voltage version (ISL91108IIAZ), an

external resistor divider is required to program the output

voltage. The FB pin has very low input leakage current, so it is

A small capacitor (C in Figure 4) in parallel with resistor R is

required to provide the specified load and line regulation. The

suggested value of this capacitor is 27pF for R = 187kΩ. An

possible to use large value resistors (e.g., R = 187kΩ and

NPO type capacitor is recommended.

R = 60kΩ) in the resistor divider connected to the FB input.

Nonadjustable Version FB Pin Connection

The fixed output versions of the ISL91108 does not require

external resistors or a capacitor on the FB pin. Simply connect

VOUT to FB, as shown in Figure 5.

Applications Information

Component Selection

The fixed-output version of the ISL91108 requires only three

external power components to implement the buck boost

converter: an inductor, an input capacitor, and an output

capacitor.

1.8V TO 5.5V

ISL91108IINZ

PVIN

LX1

1µH

2x10µF

The adjustable ISL91108 versions require three additional

components to program the output voltage. Two external

resistors program the output voltage, and a small capacitor is

added to improve stability and response.

VIN

LX2

MODE

VOUT

= 3.3V

OUT

2x22µF

An optional input supply filtering capacitor (“C ” in Figure 4) can

be used to reduce the supply noise on the VIN pin, which provides

power to the internal reference. In most applications, this

capacitor is not needed.

FIGURE 5. TYPICAL ISL91108IINZ APPLICATION

FN8448.1

November 12, 2014

Submit Document Feedback

ISL91108

Inductor Selection

PVIN and V

Capacitor Selection

OUT

An inductor with high frequency core material (e.g., ferrite core)

should be used to minimize core losses and provide good

efficiency. The inductor must be able to handle the peak

switching currents without saturating.

The input and output capacitors should be ceramic X5R type with

low ESL and ESR. The recommended input capacitor value is

2x 10µF. The recommended V

capacitor value is 2x22µF.

OUT

TABLE 2. CAPACITOR VENDOR INFORMATION

MANUFACTURER SERIES WEBSITE

AVX www.avx.com

A 1µH inductor with ≥4.0A saturation current rating is

recommended. Select an inductor with low DCR to provide good

efficiency. In applications where radiated noise must be

minimized, a toroidal or shielded inductor can be used.

X5R

Murata

Taiyo Yuden

TDK

www.murata.com

www.t-yuden.com

www.tdk.com

TABLE 1. INDUCTOR VENDOR INFORMATION

DIMENSION

MANUFACTURER

Toko

SERIES

(mm)

WEBSITE

Recommended PCB Layout

1277AS-H-1R0M

3.2x2.5x1.2 www.toko.com

Correct PCB layout is critical for proper operation of the

FDSD0312-H-1R0M 3.2x3.0x1.2

XFL4020-102ME 4.0x4.0x2.1 www.coilcraft.com

ISL91108. The input and output capacitors should be positioned

as closely to the IC as possible. The ground connections of the

input and output capacitors should be kept as short as possible

and should be on the component layer to avoid problems that are

caused by high switching currents flowing through PCB vias.

Coilcraft

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to

make sure you have the latest revision.

DATE

REVISION

FN8448.1

CHANGE

November 12, 2014

-2nd paragraph: Changed From "This device is capable of delivering up to 2.7A output current (PVIN = 3V,

VOUT = 3.3V)...," to “This device is capable of delivering up to 2.7A burst current (PVIN = 3V, VOUT =

3.3V) …

-Features section (bullet point #4) : changed from Output current: up to 1.5A (PVIN = 3V, VOUT = 3.3V) to

“Output current: Up to 1.6A DC (PVIN = 2.8V, VOUT = 3.3V)”

-Updated Load Current (I

) Range (DC) spec under “Recommended Operating Conditions” on page 4

OUT

from “0A to 1.5A” to “0A to 1.6A”.

-Figures 1, 4 and 5: Removed the text "UP TO 2.7A" that appears next to the VOUT pin

November 6, 2013

FN8448.0

Initial Release

About Intersil

Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products

address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.

For the most updated datasheet, application notes, related documentation and related parts, please see the respective product

information page found at www.intersil.com.

You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.

Reliability reports are also available from our website at www.intersil.com/support

For additional products, see www.intersil.com/en/products.html

Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted

in the quality certifications found at www.intersil.com/en/support/qualandreliability.html

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time

without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be

accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN8448.1

November 12, 2014

Submit Document Feedback

ISL91108

Package Outline Drawing

W4x5.20F

20 BALL WAFER LEVEL CHIP SCALE PACKAGE (WLCSP 0.4mm PITCH)

Rev 0, 5/13

1.200

1.72±0.030

0.400

20x 0.265±0.035

2.335±0.030

1.600

0.3675

(4X)

0.10

0.260

0.200

PIN 1 (A1 CORNER)

TOP VIEW

BOTTOM VIEW

SEATING PLANE

0.05 Z

PACKAGE OUTLINE

0.240

0.040 BSC

(BACKSIDE COATING)

0.400

0.290

0.265±0.035 x20

0.10 M Z X Y

0.05 M

0.200±0.030

0.540±0.050

RECOMMENDED LAND PATTERN

SIDE VIEW

NOTES:

Dimensions and tolerance per ASME Y 14.5M - 1994.

2. Dimension is measured at the maximum bump diameter

parallel to primary datum Z .

3. Primary datum Z and seating plane are defined by the spherical

crowns of the bump.

4. Bump position designation per JESD 95-1, SPP-010.

5. There shall be a minimum clearance of 0.10mm between

the edge of the bump and the body edge.

FN8448.1

November 12, 2014

Submit Document Feedback

ISL91108IIAZ-T7A [INTERSIL]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E