ISL9230 [INTERSIL]

High Power Li-Ion Charger W/I-Path Management; 高功率锂离子电池充电器W / I-路径管理


型号：	ISL9230
厂家：	Intersil
描述：	High Power Li-Ion Charger W/I-Path Management 高功率锂离子电池充电器W / I-路径管理电池
文件：	总20页 (文件大小：924K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

High Power Li-Ion Charger W/I-Path Management

ISL9230

Features

The ISL9230 is a fully integrated high input voltage single-cell

Li-ion battery charger with power path management function.

This charger performs the CC/CV charge function required by

Li-ion batteries. The charger can withstand an input voltage up to

26V but is disabled when the input voltage exceeds 6.6V OVP

threshold. The input current limit and charge current are

programmable with external resistors. When the battery voltage

is lower than 3.0V, the charger preconditions the battery with

10% of the programmed charge current. When the charge

current reduces to the end-of-charge (EOC) current level during

the CV charge phase, the EOC indicator (CHG) will toggle to a

logic high to indicate the end-of-charge condition.

• Complete Charger for Single-Cell Li-ion/Polymer Batteries

• Current Path Management Optimize for Charge and System

Currents

• Intelligent Timeout Interval Based on Actual Charge Current

• 1% Charger Output Voltage Accuracy

• Programmable Input Current Limit

• Programmable Charge Current

• NTC Thermistor Input

• Complies with USB Charger

• Charge Current Thermal Foldback for Thermal Protection

• Trickle Charge for Fully Discharged Batteries

• 26V Maximum Voltage at VIN Pin

The ISL9230 uses separate power paths to supply the system

load and the battery. This feature allows the system to

immediately operate with a completely discharged battery. This

feature also allows the charge to terminate when the battery is

full while continuing to supply the system power from the input

source, thus minimizing unnecessary charge/discharge cycles

and prolonging the battery life.

• Power Presence and Charge Indications

• Ambient Temperature Range: -40°C to +85°C

• 16 Ld 3x3 TQFN Package

Two indication pins (PG and CHG) allow simple interface to a

microprocessor or LEDs.

• Pb-Free (RoHS Compliant)

Applications

• Mobile Phones

• Blue-Tooth Devices

• PDAs

• MP3 Players

• Stand-Alone Chargers

• Other Handheld Devices

INPUT

TO SYS

C₃

PART

DESCRIPTION

4.7µF X5R ceramic capacitor

1µF X5R ceramic capacitor

4.7µF X5R ceramic capacitor

(Application specific)

VOUT

VBAT

VIN

C₁

ISL9230

R₂

C₂

R₁

CONT

}

FROM

µP

CHGEN

IREF

D₁

CHG

NTC

(Application specific)

IREF

TIME

ILIM

(Application specific)

ILIM

BATT

TIME

R , R 300 to 1kΩ, 5% resistor

AC/USB

MODE

R_TIME

FROM µP

}

D , D LEDs for indication

GND

FIGURE 1. TYPICAL APPLICATION CIRCUIT

July 22, 2011

FN7642.1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

ISL9230

Block Diagram

VIN

VOUT

IOUT

ISL9230

VIN

VBAT

ILIM

IBAT

ILIMREF

CHG

PUMP

VOUTREF

VOUT

155°C

IREF

NTC

DIE TEMP

IBATREF

HITEMP

IBAT

IREF

VIN

VBAT

IOUT

IBAT

CLK

TIME

LOTEMP

VBAT

VBATREF

DIE TEMP

125°C

AC/USB

MODE

CHG

CONT

CHGEN

GND

FN7642.1

July 22, 2011

ISL9230

Pin Configuration

ISL9230

(16 LD QFN)

TOP VIEW

16 15 14 13

NTC

ILIM

11 VOUT

VBAT

VOUT

CHG

CHGEN

Pin Descriptions

PIN NUMBER

SYMBOL

DESCRIPTION

NTC

The NTC pin sources a current to develop a voltage across the battery pack NTC resistor. Placing a 10kΩ NTC thermistor

will check if the battery’s temperature is out of the safe temperature window. If the temperature is out of the safe

operating window, the charger is suspended. For applications that do not require the use of the NTC function, connect

a 10kΩ fixed resistor from NTC to GND to maintain a valid voltage level on the NTC pin.

2, 3

VBAT

Charger output pin. Connect this pin to the battery. A 1µF or larger X5R ceramic capacitor is recommended for

decoupling and stability purposes.

CHGEN

Battery charger enable pin. The CHGEN pin is a logic input pin to provide external charge control. An internal 670kΩ

pull-down resistor is connected to this pin. Drive the pin HIGH to disable the charger during charging. When CHGEN is

high, VOUT is still active and the battery power remains available at VOUT. To ensure proper operation, do not leave this

pin unconnected.

AC/USB Selects between Adapter and USB input power. Pull high for selecting adapter power and pull low for USB power. An

internal 670kΩ pull-down resistor is connected to this pin. To ensure proper operation, do not leave this pin

unconnected.

MODE

In combination with the AC/USB pin, this pin selects the input current limit levels. If AC/USB pin is low, a low on the

Mode pin sets the USB current to 100mA, and a high selects the 500mA limit. If the AC/USB pin is high, a low on the

mode pin selects the ILIM programmed current and a high will put the ISL9230 into a suspend state. An internal

280kΩ pull-down resistor is connected to this pin. To ensure proper operation, do not leave this pin unconnected.

Open-drain power good indication. The open-drain MOSFET turns on when the input voltage is above the POR threshold

but below the OVP threshold. This pin is capable of sinking 5mA (minimum) to drive a LED. The maximum voltage rating

for this pin is 6.5V and it is recommended to use VOUT as the pull-up voltage.

GND

CHG

Connect to ground.

Open-drain charge indication pin. This pin outputs a logic LOW when a charge cycle starts and goes Hi-Z when an

end-of-charge (EOC) condition is qualified. This pin is capable of sinking 5mA min. to drive an LED. When the charger

is disabled, the CHG is also in a Hi-Z state.

10, 11

VOUT

ILIM

Output connection to the system. When a valid input power is present, this pin provides a 3.4V regulated voltage for the

system during trickle charge and is maintained at VBAT + 225mV during fast charging. A 4.7µF or larger X5R ceramic

capacitor is recommended for decoupling and stability purposes.

Input current limit programming pin. Connect a resistor between this pin and the GND to set the input current limit

determined by Equation 1 when AC/USB = 1, MODE = 0

1610

(EQ. 1)

--------------

(mA)

200mA < ILIM < 1.5A

LIM

ILIM

Where R

is in kΩ

ILIM

If the ILIM pin is left unconnected, all input current is disabled.

FN7642.1

July 22, 2011

ISL9230

Pin Descriptions(Continued)

PIN NUMBER

SYMBOL

DESCRIPTION

VIN

Power input. The absolute maximum input voltage is 26V. A 4.7µF or larger value capacitor is recommended to be

placed very close to the input pin for decoupling purposes. Additional capacitance may be required to provide a stable

input voltage.

TIME

Timing resistor pin. The TIME pin determines the oscillation period by connecting a timing resistor between this pin and

GND. The oscillator also provides a time reference for the charger calculated in Equation 2. Equation 3 provides the

formula for finding the Pre-conditioning time, which is 1/10 of the Fast Charge timer. Leaving the TIME pin unconnected

sets the timer to the default values of 30 minutes for pre-conditioning and 5 hours for fast charge.

= 8 × R

(Min)

(EQ. 2)

FAST

TIME

= 0.8 × R

(Min)

(EQ. 3)

PRE

TIME

Where R

is in kΩ

TIME

CONT

IREF

Active high overrides the end-of-charge (EOC) or timer termination. By pulling the continuous charge CONT pin high, the

device will continue to charge the battery when the current has fallen below I or the safety timer has timed out. The

status of this pin can not be changed after POR. The CONT pin is internally pulled down to GND by a 280kΩ resistor,

EOC

but to ensure proper operation, do not leave the CONT pin floating.

Charge current program and monitoring pin. Connect a resistor between this pin and the GND pin to set the charge

current limit determined by Equation 4:

890

--------------

(EQ. 4)

(mA)

FAST

IREF

Where R

is in kΩ. The IREF pin voltage also monitors the actual charge current during the entire charge cycle,

IREF

including the trickle, constant-current, and constant-voltage phases. When disabled, V

= 0V.

IREF

EPAD

Exposed pad. Connect as much copper as possible to this pad either on the component layer or other layers through

thermal vias to enhance the thermal performance.

TABLE 1. INPUT CURRENT LIMIT SELECTION

AC/USB

MODE

DESCRIPTION

USB 100mA limit

USB 500mA limit

current programming

ILIM

Suspend mode

Ordering Information

PART NUMBER

(Notes 1, 2, 3)

PART

MARKING

TEMP RANGE

(°C)

PACKAGE

(Pb-free)

PKG.

DWG. #

ISL9230IRZ

NOTES:

DLBB

-40 to +85

16 Ld 3x3 QFN

L16.3x3E

1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate

plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are

MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9230. For more information on MSL please see techbrief TB363.

FN7642.1

July 22, 2011

ISL9230

Absolute Maximum Ratings (Referenced to GND)

Thermal Information

VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 26V

All other pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V

Thermal Resistance (Typical)

QFN Package (Notes 4, 5) . . . . . . . . . . . . . .

(°C/W)

3.0

(Input Current) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.6A

Maximum Junction Temperature (Plastic Package) . . . .-40°C to +150°C

Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C

Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

VIN

Output Current (Continuous)

(Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5A

(Discharge Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5A

(Charging Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5A

VOUT

VBAT

Output Sink Current CHG, PG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mA

Recommended Operating Conditions

Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

Maximum Supply Voltage (VIN Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V

Operating Supply Voltage (VIN Pin) . . . . . . . . . . . . . . . . . . . . . . 4.3V to 6.4V

Programmed Fast Charge Current . . . . . . . . . . . . . . . . .300mA to 1500mA

Input current, VIN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5A

VIN

Current, VOUT Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5A

Current, VBAT Pin (Discharging) . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5A

Current, BAT Pin (Charging). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5A

VOUT

VBAT

ESD Ratings

Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . .2.5kV

Machine Model (Tested per JESD22-A115-A). . . . . . . . . . . . . . . . . . 250V

Charged Device Model (Tested per JESD22-C101D) . . . . . . . . . . . 1000V

Latch Up (Tested per JESD78B, Class II, Level A) . . . . . . . . . . . . . . . 100mA

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product

reliability and result in failures not covered by warranty.

NOTES:

4. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech

Brief TB379.

5. For θ , the “case temp” location is the center of the exposed metal pad on the package underside.

Electrical Specifications Typical values are tested at V = 5V, V

= 3.6V and the ambient temperature at +25°C. MIN/MAX

BAT

limits are across the operating conditions, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to

+85°C.

MIN

MAX

PARAMETER

POWER-ON RESET

SYMBOL

TEST CONDITIONS

(Note 8)

TYP

(Note 8) UNITS

Rising POR Threshold

Falling POR Threshold

POR Deglitch Time

= 3.0V, use PG to indicate the comparator output

BAT

3.2

3.36

3.05

1.2

3.5

POR_R

2.92

3.18

POR_F

>V to PG Low

POR

OFFSET VOLTAGE

IN-BAT

Rising Threshold

= 3.6V, V ramps from 3.5V to 4V

130

6.9

OS_R

BAT

Falling Threshold

= 3.6V, V ramps from 4V to 3.5V

OS_F

VIN OVERVOLTAGE PROTECTION

Overvoltage Protection Threshold

OVP Threshold Hysteresis

Input Overvoltage Blanking

Input OVP Recovery Time

BATTERY DETECTION

Battery Detection Current

Detection Timer

6.25

6.6

110

OVP

µs

OVP_HYS

OVP_BLK

1.2

OVP-REC

= 2.5V (Note 7)

-5

-7.5

-10

DET

BAT

250

DET

ILIM, IREF SHORT CIRCUIT DETECTION (CHECKED DURING START-UP)

Current Source VIN > VPOR and VIN > VBAT + VOS

1.4

FN7642.1

July 22, 2011

ISL9230

Electrical Specifications Typical values are tested at V = 5V, V

= 3.6V and the ambient temperature at +25°C. MIN/MAX

BAT

limits are across the operating conditions, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to

+85°C. (Continued)

MIN

MAX

PARAMETER

SYMBOL

TEST CONDITIONS

(Note 8)

TYP

510

(Note 8) UNITS

Short-Circuit Detection threshold

SHORT CIRCUIT DETECTION

VIN > VPOR and VIN > VBAT + VOS

Battery Short Circuit Detection Current

Battery Short Circuit Threshold

Output Short Circuit Detection at Valid VIN

= 1.5V

BAT

5.5

1.8

0.9

BSC

1.6

0.8

2.0

1.0

BSC

VIN > VPOR

OSC1

VIN > VBAT + VOS

Output Short Circuit Detection, Load

Sharing Mode (Note 7)

Referenced to VBAT

VIN > VPOR

-200

-250

-300

OSC2

VIN > VBAT + VOS

Blanking Time for VSC2

Recovery Time for VSC2

OPERATING CURRENT

BAT Pin Supply Current

VIN Pin Suspend Current

VIN Pin Supply Current

VOLTAGE REGULATION

Output Voltage

250

μs

OSC2

No supply at V , CHGEN = LOW

6.5

200

1.5

µA

VBAT

Charger enabled, AC/USB = Mode = 1

Charger enabled

VIN

VIN > VOUT + VDO_Q1, VBAT > 3.2V

VBAT + VBAT + VBAT +

O_REG

System current + charge current = 15mA

0.150

0.225

0.270

VIN > VOUT + VDO_Q1, VBAT < 3.2V

3.3

3.4

3.5

System current + charge current = 15mA

Charger Output Voltage

Charge current = 10mA, T = +25°C

4.185

4.16

1.8

4.20

2.24

4.215

4.23

2.55

B_REG

Charge current = 10mA

IREF Pin Voltage

= 3.8V

BAT

IREF

POWER PATH

Output DPPM Threshold Voltage

Output voltage threshold where charge current starts to

reduce. Referenced to regulated V

-200

-100

4.36

-50

DPPM

OUT

Input DPM Threshold Voltage

Input voltage threshold where the input current starts

to reduce, AC/USB = 0, MODE = X

IN-DPM

Battery Supply Enter Threshold

Battery Supply Exit Threshold

DROPOUT VOLTAGE

Referenced to VBAT, V

= 3.6V

-40

-20

BSUP_ON

BAT

BSUP_OFF

Q1 Dropout Voltage (VIN-VOUT)

(Note 7)

= 4.3V, I = 1A, V = 4.2V

IN BAT

300

475

DO_Q1

DO_Q2

OUT

Q2 Dropout Voltage

(VBAT-VOUT)

= 0V, VBAT > 3V, IOUT = 1A

RECHARGE THRESHOLD

Recharge Voltage Threshold

Recharge Deglitch Time

Referenced to V

-215

200

-120

300

-50

RCH

B_REG

(CONT = 0)

includes t

DET

RCH

Delay Time, Input Power Loss to VOUT

LDO Turn-Off

= 3.6V Time is measure from VIN: 5V to 3V at 1µs

BAT

NO-IN

fall time

CURRENT REGULATION (Note 6)

Input Current Limit Range

LIM_RNG

AC/USB = 1, Mode = 0

1500

FN7642.1

July 22, 2011

ISL9230

Electrical Specifications Typical values are tested at V = 5V, V

= 3.6V and the ambient temperature at +25°C. MIN/MAX

BAT

limits are across the operating conditions, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to

+85°C. (Continued)

MIN

MAX

PARAMETER

SYMBOL

TEST CONDITIONS

(Note 8)

TYP

1000

375

(Note 8) UNITS

Input Current Limit Accuracy

= 1.62kΩ

= 4.32kΩ

955

340

1045

410

LIM_AC1

LIM_AC2

LIM_100

LIM_500

ILIM

AC/USB = 0, Mode = 0

AC/USB = 0, Mode = 1

380

300

450

900

440

500

1500

550

1100

Fast Charge Current Range

Fast Charge Current

< 4.2V, AC/USB = 1, Mode = 0

BAT

FAST

= 1.78kΩ

= 887Ω

500

1000

IREF

Trickle Charge Current

End Of Charge Current

AC/USB, MODE not equal to (1, 1)

= 1.78kΩ (I = 88/R

TRK

)

IREF

TRK

AC/USB = 0, Mode = 0, R

= 887Ω

EOC_USB100

IREF

AC/USB = 0, Mode = 1, R

125

116

EOC_USB500

= 887Ω

IREF

EOC_AC

End Of Charge Deglitch Time

EOC

PRECONDITIONING VOLTAGE THRESHOLD

Preconditioning Threshold Voltage

VIN > VPOR and VIN > VBAT + VOS

2.9

3.0

3.1

MIN

Trickle Charge to Fast Charge Deglitch

Time

CHG_LH

Fast Charge to Trickle Charge Deglitch

Time

CHG_HL

CHARGING TIMERS (Note 7)

Fast Charge Timer

= 30kΩ

180

240

300

360

Min

FAST

TIME

= Floating

= 30kΩ

Trickle Charge Timer

PRE

= Floating

INTERNAL TEMPERATURE MONITORING

Charger Current Thermal Foldback

Threshold

125

°C

FOLD

Thermal Shutdown Threshold

Thermal Shutdown Hysteresis

EXTERNAL TEMPERATURE MONITORING

Thermistor Bias Current

T rising

155

°C

SD_HYS

VIN >VPOR and VIN > VBAT + VOS

295

μA

High Temperature Threshold

High Temperature Hysteresis

Low Temperature Threshold

Low Temperature Hysteresis

Temperature Trip Deglitch Time

falling

240

340

TMAX

NTC

rising after reaching V

rising

TMAX_H

TMAX

2000

2100

300

2200

TMIN

falling after reaching V

TMIN

TMIN_H

Measured from NTC fault to charger disabled

Referenced to VIN, NTC unconnected

T_DG

NTC Pin Disable Threshold

-300

DIS_NTC

LOGIC INPUT AND OUTPUTS

CHGEN, CONT, MODE, AC/USB Logic

Input High

1.4

FN7642.1

July 22, 2011

ISL9230

Electrical Specifications Typical values are tested at V = 5V, V

= 3.6V and the ambient temperature at +25°C. MIN/MAX

BAT

limits are across the operating conditions, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to

+85°C. (Continued)

MIN

MAX

PARAMETER

SYMBOL

TEST CONDITIONS

(Note 8)

TYP

(Note 8) UNITS

CHGEN, CONT, MODE, AC/USB Logic

Input Low

0.4

770

340

CHGEN and AC/USB Pin Internal

Pull-Down Resistance

570

220

670

280

kΩ

CONT and MODE Pin Internal Pull-Down

Resistance

PG, CHG

Driving Capability when LOW

Leakage Current when HIGH

NOTES:

Pin Voltage = 0.4V

Pin Voltage = 5V, V

µA

= V

= 5V

BAT

OUT

6. The input current charge current can be affected by the thermal foldback function if the IC under the test setup cannot dissipate the heat.

7. Limits established by characterization and are not production tested.

8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization

and are not production tested.

FN7642.1

July 22, 2011

ISL9230

Typical Characteristics

= 5V, V

BAT

= 3.6V, AC/USB = 1, MODE = 0, T = +25°C, unless otherwise

specified.

2V/DIV

OUT

END OF CHARGE OCCURS

AGAIN WHEN VBAT > 4.2V

RECHARGE OCCURS WHEN

VBAT FALLS BELOW 100mV

FROM THE CV THRESHOLD

CV CHARGE OCCURS

WHEN VBAT REACHES

4.2V

VBAT RAMPING UP

FROM 0V

2V/DIV

FAST CHARGE BEGINS

WHEN VBAT > 3V

BAT

END OF CHARGE OCCURS

WHEN IBAT < IEOC

CHG

2V/DIV

TRICKLE CHARGE

BEGINS WHEN

VBAT > 1.8V

BAT

200mA/DIV

OUT

5V/DIV

CHG

BAT

10ms/DIV

200s/DIV

FIGURE 2. DESCRIPTION OF CHARGING MODES AS V

VARIES

FIGURE 3. ADAPTER PLUG-IN WITH BATTERY CONNECTED

BAT

BATTERY NOT PRESENT

BATTERY REMOVED

2V/DIV

1V/DIV

2V/DIV

BATTERY INSERTED

BAT

5V/DIV

2V/DIV

OUT

CHG

1V/DIV

5V/DIV

OUT

BAT

BATTERY DETECTION MODE

CHG

500mA/DIV

BAT

TRICKLE CHARGE

200ms/DIV

FIGURE 4. BATTERY DETECTION - BATTERY REMOVED

FIGURE 5. BATTERY DETECTION - BATTERY INSERTED/REMOVED

5V/DIV

CHGEN

5V/DIV

OUT

TRICKLE CHARGE

500mA/DIV

BAT

500mA/DIV

OUT

4ms/DIV

FIGURE 6. CHARGER ON/OFF BY CHGEN (R

= 10Ω)

FIGURE 7. CHARGER ON/OFF CHGEN (R

= 10Ω, V = 3.6V)

BAT

OUT

FN7642.1

July 22, 2011

ISL9230

Typical Characteristics

= 5V, V

BAT

= 3.6V, AC/USB = 1, MODE = 0, T = +25°C, unless otherwise

specified. (Continued)

OUT

2V/DIV

5V/DIV

BAT

5V/DIV

OUT

BAT

500mA/DIV

OUT

BAT

2V/DIV

10ms/DIV

20s/DIV

FIGURE 8. OVP FAULT V = 5V TO 15V, R

= 10Ω

FIGURE 9. ENTERING AND EXITING DPPM MODE

OUT

5V/DIV

2V/DIV

BAT

OUT

5V/DIV

2V/DIV

OUT

2A/DIV

VIN

CHG

10A/DIV

500mA/DIV

BAT

OUT

200µs/DIV

100ms/DIV

FIGURE 10. V

SHORTED WITH BATTERY CONNECTED

FIGURE 11. V

TOGGLE FROM 4.3V TO 3.8V (NO OUTPUT)

BAT

OUT

600

500

400

300

200

100

1.4

1.3

1.2

1.1

1.0

10 12 14 16 18 20 22 24

(V)

-50

-25

100

125

TEMPERATURE (°C)

FIGURE 12. SHUTDOWN CURRENT CHGEN = 1

FIGURE 13. VIN PIN SUPPLY CURRENT CHGEN = 0

FN7642.1

July 22, 2011

ISL9230

Typical Characteristics

= 5V, V

= 3.6V, AC/USB = 1, MODE = 0, T = +25°C, unless otherwise

BAT A

specified. (Continued)

600

= 1A

LOAD

= 0V

500

400

300

200

100

= 3.6V

BAT

-50

-25

100

125

-50

-25

100

125

TEMPERATURE (°C)

FIGURE 14. DROPOUT VOLTAGE (Q1) vs TEMPERATURE

FIGURE 15. DROPOUT VOLTAGE (Q2) vs TEMPERATURE

1.2

1.0

0.8

0.6

0.4

0.2

0.0

= 1A

LOAD

= 0V

3.0

3.2

3.4

3.6

3.8

4.0

4.2

100 105 110 115 120 125 130 135 140 145 150

TEMPERATURE (°C)

(V)

BAT

FIGURE 16. DROPOUT VOLTAGE (Q2) vs V

FIGURE 17. THERMAL REGULATION OF I

BAT

4.45

4.44

4.43

4.42

4.41

4.40

4.39

4.23

4.21

4.19

4.17

4.15

= 10mA

OUT

BAT

-50

-25

100

125

-50

-25

100

125

TEMPERATURE (°C)

FIGURE 18. BATTERY VOLTAGE REGULATION vs TEMPERATURE

FIGURE 19. OUTPUT VOLTAGE REGULATION vs TEMPERATURE

FN7642.1

July 22, 2011

ISL9230

Typical Characteristics

= 5V, V

BAT

= 3.6V, AC/USB = 1, MODE = 0, T = +25°C, unless otherwise

specified. (Continued)

4.214

= 1A

= 100mA

BAT

LOAD

= 1.82kΩ

= 2V

4.212

4.210

4.208

4.206

4.204

4.202

4.200

IREF

BAT

4.5 4.7 4.9 5.1 5.3 5.5 5.7 5.9 6.1 6.3 6.5

(V)

-50

-25

100

125

TEMPERATURE (°C)

FIGURE 20. TRICKLE CHARGE vs TEMPERATURE

FIGURE 21. BATTERY VOLTAGE vs INPUT VOLTAGE

4.2100

4.2095

4.2090

4.2085

4.2080

4.2075

4.2070

4.2065

4.2060

4.2055

4.2050

4.440

4.435

4.430

4.425

4.420

4.415

4.410

is FLOATING

BAT

0.1

0.3

0.5

0.7

0.9

(A)

1.1

1.3

1.5

0.0

0.2

0.4

0.6

0.8

(A)

1.0

1.2

1.4

1.6

OUT

BAT

FIGURE 22. BATTERY VOLTAGE vs CHARGE CURRENT (CV MODE)

FIGURE 23. OUTPUT VOLTAGE vs OUTPUT CURRENT

4.50

1.2

IS FLOATING

OUT

4.45

4.40

4.35

4.30

4.25

4.20

4.15

4.10

1.0

0.8

0.6

0.4

0.2

OUT

BAT

0.1

0.3

0.5

0.7

0.9

(A)

1.1

1.3

1.5

0.0

0.5

1.0

1.5

2.0

2.5

(V)

3.0

3.5

4.0

4.5

BAT

FIGURE 24. V

AND V

vs CHARGE CURRENT (CV MODE)

OUT

FIGURE 25. BATTERY VOLTAGE vs CHARGE CURRENT (CC MODE)

BAT

FN7642.1

July 22, 2011

ISL9230

Typical Characteristics

= 5V, V

BAT

= 3.6V, AC/USB = 1, MODE = 0, T = +25°C, unless otherwise

specified. (Continued)

1.2

1.0

0.8

0.6

0.4

0.2

3.50

3.45

3.40

3.35

3.30

3.25

3.20

3.6

4.0

4.4

4.8

5.2

(V)

5.6

6.0

6.4

6.8

-50

-25

100

125

TEMPERATURE (°C)

FIGURE 26. CHARGE CURRENT vs INPUT VOLTAGE

FIGURE 27. INPUT VOLTAGE POR THRESHOLD vs TEMPERATURE

SHORT

REMOVED

Q2 ON

SHORT

Q2 OFF

BT_OSC2

RT_OSC2

OCCURED

Q2 OFF

Q2 ON

RT_OSC2

T < BT_OSC2

BT_OSC2

SHORT

OCCURED

= VBAT

(VOUT = ~ 0V)

Q2 IS OFF

SHORT

REMOVED

= IOUT X R_DSON(Q2)

IOUT = NORMAL,

Q2 IS ON

V_OSC2

BT_OSC2

= 0V

IOUT = 0,

Q2 IS ON,

VOUT = VBAT

= ISC X R_DSON(Q2)

VOUT IS SHORTED, Q2 IS ON

TIME

FIGURE 28. VOUT SHORT CIRCUIT CHARACTERISTIC AT SUPPLEMENTAL MODE

FN7642.1

July 22, 2011

ISL9230

PG Indication

The PG pin is an open-drain output to indicate the presence of a

good supply voltage on the VIN pin. If V is higher than the POR

threshold and lower than the OVP threshold, an internal open-drain

Theory of Operation

When a valid input voltage is applied at VIN, the ISL9230 first

regulates V

at 3.4V or at VBAT plus 225mV, depending on the

OUT

battery voltage. If the battery voltage is below 3.2V, the ISL9230

regulates V at 3.4V. If the battery voltage is higher than 3.2V,

FET is turned on. If V suddenly falls below the POR falling

OUT

will be regulated at VBAT plus 225mV. The charge current is

threshold or rises above the OVP rising threshold, the open-drain FET

will turn off. When turned on, the PG pin should be able to sink at

least 5mA current under all operating conditions.

OUT

also dependent on the battery voltage. When V

is less than

BAT

3.0V, the ISL9230 trickle charges the battery at a reduced

current, as specified in the "Electrical Specifications" table on

The PG pin can be used to drive a LED or to interface with a

microprocessor.

page 7. Once V

reaches 3.0V, the fast charge phase starts.

BAT

When the system exceeds the maximum available current, either

limited by the IC or by the input power supply, the charger FET Q2

is operated in a reverse mode, i.e. it provides battery current to

the system instead of charging.

Power-Good Range

The power-good range is defined by the following three conditions:

1. V > V

POR

> V

TRICKLE

2. V - V

IN BAT

4.2V

CHARGE

VOLTAGE

3. V < V

IN OVP

FAST

RCH

where V is the offset voltage between the input and charger

CHARGE

CURRENT

output. The V

is the overvoltage protection threshold given in

the “Electrical Specifications” table on page 5. All V , V , and

OVP

POR OS

3.0V

have hysteresis.

OVP

TRK

CHG Indication

EOC

TIME

The CHG is an open-drain output. The open drain FET turns on

when the charger starts to charge and turns off when the EOC

condition is qualified. Once the EOC condition is qualified, the

CHG signal is latched in a Hi-Z state. The EOC condition is

qualified when both of the following conditions are satisfied:

CHG

CHG INDICATION

FIGURE 29. TYPICAL CHARGING CYCLE FOR CONT = L

1. V

> V

RCH

BAT

The charger function is similar to other Li-ion battery chargers,

i.e., it charges the battery at a constant current (CC) or a constant

voltage (CV) depending on the battery terminal voltage. The

2. I

< I

EOC

BAT

After being turned off, even if the battery is being automatically

recharged later, the CHG indication will not be turned on again

until one of the following events is encountered:

constant current I

is set by the external resistor R .

FAST

IREF

Depending on the combination of the AC/USB and the MODE pin

status, the actual charge current may be reduced by the input

current limit. When the battery voltage reaches the final voltage

of 4.2V, the charger enters the CV mode and regulates the

battery voltage at 4.2V to fully charge the battery without the risk

of overcharging. Upon reaching an end-of-charge (EOC) current,

the CHG will turn to high impedance to indicate a charge

complete state and if CONT is low, Q2 will be turned off to

terminate charging. Figure 29 shows the typical charge profile

with the EOC recharge events when CONT is low.

1. Input power being re-cycled

2. CHGEN signal being toggled

3. The battery is removed and re-inserted

The CHG signal can be interfaced either with a microprocessor

GPIO or a LED for indication. A de-glitch delay of 25ms for both

edges is implemented to prevent nuisance triggering during

some short transient conditions.

Charge Termination, Recharge and Timeout

The EOC current level is internally set at 10% of the fast charge

When an EOC condition is reached, the CHG pin changes to Hi-Z to

indicate the end-of-charge condition and the charging is terminated

if the CONT pin is in logic low. When a recharge condition is met, the

safety timer will be reset to zero and the charging re-starts.

current as set by R

types. For USB100 input, the EOC current is set at 3.3% of the

fast charge current as set by R . The CHG signal pulls low

when the trickle charge starts and turns to high impedance at an

EOC event.

for AC adapter input and USB500 input

IREF

In the event a timeout interval has elapsed before the EOC

condition is reached, a timeout fault condition is triggered. The

timeout fault condition is indicated by the CHG pin being toggled

between HI and LO every 0.5s. The timeout fault condition can be

cleared by removing and reapplying the input power to the IC.

A thermal foldback function reduces the charge current anytime

when the die temperature reaches typically +125°C. This function

guarantees safe operation when the printed-circuit board (PCB) is

not capable of dissipating the heat generated by the linear charger.

Under the EOC, timeout and timeout fault conditions, the power

The ISL9230 can withstand an input voltage up to 26V but will be

disabled when the input voltage exceeds the OVP threshold, 6.6V

typical, to protect against unqualified or faulty AC adapters.

delivery to V

is not impacted. The battery continues to supply

OUT

current to VOUT if needed, as described in “Dynamic Power Path

Management” on page 15.

FN7642.1

July 22, 2011

ISL9230

The charge termination current is calculated as follows:

For AC or USB500 input:

from dropping further. Therefore, the V -DPM feature prevents

the USB port from crashing.

(EQ. 5)

(EQ. 6)

= 0.1XI

EOC

FAST

Short Circuit Detection and Battery Presence

By setting CHGEN = LO, the ISL9230 first checks to see if there is

a short-circuit on the VBAT pin. During the short circuit detection,

a current of 5.5mA is sourced from VBAT to the battery. If VBAT is

USB100 input:

= 0.033XI

EOC

FAST

Where I

FAST

is the fast charge current set by R

IREF

above V

after the test, charging current I

begins. During

BSC

TRK

battery detection, a current sink of a duration t

detect if a battery has been installed or removed while power is

applied to the VIN pin. A pulsed switch sinks a 7.5mA current

is used to

DET

Disabling the Charge Termination Option

By setting the CONT pin low, the charge termination option will

occur when either I < I or the safety timer times out. This

BAT EOC

from VBAT. If V

is above V

after the sink test, charging

BAT

MIN

function can be disabled by selecting the CONT pin high but

choosing the correct charge termination function needs to be

done prior to POR. When CONT is high, the safety timers are

suspended. For EOC detection, CHG status is not affected by the

current begins. If the voltage drops below V

within t , it

DET

MIN

indicates the battery may have been removed or the battery

safety circuit is open. The IC will then apply I for t to close,

TRK DET

if possible, the battery safety circuit. If the voltage rises above

state of the CONT pin, i.e. when I

< I

, the CHG will turn to

BAT

EOC

, this indicates a missing battery condition. If the V

RCH

voltage is within V

BAT

, it is determined that a

high impedance regardless of the status of CONT.

< V

MIN

BAT

RCH

battery has been installed and charging is initiated.

ILIM Pin Function

The ILIM pin is provided to control the maximum current drawn

by the ISL9230 at the VIN pin to supply the system and charge

the battery. This enables the system designer to ensure that the

IC does not draw more than the source can provide.

Intelligent Timer

The internal timer in the ISL9230 provides a time reference for

the maximum charge time limit. The nominal clock cycle for the

reference time is set by the external resistor connected between

the TIME pin and GND and is given by Equations 2 and 3.

IREF Pin Function

The nominal maximum charge time interval is calculated based on

the assumption that the programmed charge current is always

available during the entire charging cycle. However, due to the PPM

control, the current limit of the input source, or thermal foldback,

the actual charge current maybe reduced during the constant

current charge period. Under such conditions, the Intelligent Timer

control will increase the timeout interval accordingly to allow

approximately the same mAh product as the original timeout

interval at the programmed current. The Intelligent Timer is

suspended when CONT is asserted high.

The IREF pin has the two functions as described in the "Pin

Descriptions" on page 4. The fast charge current can be

programmed by the R

over the range of 300mA to 1500mA

IREF

for AC adapter input. The second function of the IREF pin is for

monitoring the charge current by measuring the voltage at this

pin, which is proportional to the charge current.

Dynamic Power Path Management

The power path management function of the ISL9230 controls

the charge current and the system current when charging the

battery with system load. The available input current, which is

either limited by the ISL9230 or by the input power source,

whichever is smaller, is properly split into two paths, one to the

battery and the other to the system. The priority is given to the

system. When the output voltage drops to the DPPM threshold,

which is the regulated output voltage minus 100mV, the

Dynamic Power Path Management (DPPM) starts to function.

The DPPM control will first allocate the available current to

satisfy the system needs, using the remaining current to charge

the battery. If the total available current is not enough to supply

the system need, when the output voltage drops to 40mV below

the battery voltage, the DPPM control will turn on the charge

control FET, allowing the battery to supply current to the system

load. Thus, when DPPM occurs, the battery may be charged at a

current smaller than the programmed constant current.

Thermistor Interface

To ensure a safe charging temperature range, the ISL9230

incorporates a NTC pin to interface with the NTC thermistor in the

battery pack to monitor the battery temperature. A constant current

source is provided at this pin. The temperature range is determined

by the external negative temperature coefficient (NTC) thermistor.

The voltage thresholds and the current source value of the ISL9230

are optimized for the 103AT type industry standard thermister.

The ISL9230 uses a window comparator to set the valid

temperature window. When the NTC pin voltage is out of the

window anytime during charging, indicating either the

temperature is too hot or too cold to charge, the ISL9230 stops

charging. The CHG, however will stay low to indicate a "charging"

condition. When such an invalid temperature condition is

encountered, the safety timer will stop counting. When the

temperature returns to the set range, the charging resumes and

the timer resumes counting from where it stopped.

Input DPM Mode (V -DPM)

-DPM is a special feature that is designed for current-limited

USB ports. V -DPM is engaged when the ISL9230 is configured

for USB100 (AC/USB = 0, MODE = 0) or USB500 (AC/USB = 0,

When the CONT is high, the temperature sensing function can be

disabled by pulling the NTC pin to a voltage level above the V_{DIS_NTC,}

as shown on the “Electrical Specifications” table on page 7.

MODE = 1) modes. During operation of V -DPM, the input

voltage is monitored and if VIN drops to the threshold of

-DPM, the input current is reduced to keep the input voltage

FN7642.1

July 22, 2011

ISL9230

X3 VOUT

VIN

VBAT

TEMPERATURE

MONITORING

I_T

I_SEN

I_R

VREF

REF

IREF

CONTROL

FIGURE 30. CHARGE CURRENT THERMAL FOLDBACK CONTROL

Thermal Foldback

Applications Information

Input Bypass Capacitor

The input capacitor is required to suppress the power supply

transient response during transitions. Typically, a 4.7µF capacitor

should be sufficient to suppress the power supply noise.

The thermal foldback function starts to reduce the charge current

when the internal temperature reaches a typical value of +125°C.

When thermal foldback is encountered, the charge current will be

reduced to a value where the die temperature stops rising.

Figure 31 shows the thermal foldback concept whereas the

current signals at the summing node of the current error

amplifier CA are shown in Figure 30. I is the reference. I is the

Due to the inductance of the power leads of the wall adapter or

USB source, the input capacitor value must be properly selected

to prevent high voltage transient during a hot-plug event. Also, for

increase reliability to high dv/dt, a 10µF or more is preferable on

the input.

temperature tracking current generated from the Temperature

Monitoring block. The I has no impact on the charge current

until the internal temperature reaches approximately +125°C;

then I starts to rise. In the meantime, as I rises, I

will fall at

SEN

VOUT and VBAT Capacitor Selection

the same rate (as the sum is a constant current I ). As a result,

the charging current, which is proportional to I

, also

SEN

The criteria for selecting the capacitor at the VOUT and VBAT pins is

to maintain the stability as well as to bypass any transient load

current. The recommended capacitance is a 4.7µF X5R ceramic

capacitor for VOUT and 1µF for VBAT. The actual capacitance

connected to the output is dependent on the actual application

requirement.

decreases, keeping the die temperature constant at +125°C.

The system output current, however, is not impacted by the thermal

foldback. Thus, when the charge current is reduced to zero, if the die

temperature still rises, the IC will shut down at ~155°C to prevent

damage to the IC.

Layout Guidance

The ISL9230 uses a thermally-enhanced QFN package that has

an exposed thermal pad at the bottom side of the package. The

layout should connect as much copper to the pad as possible.

Typically, the component layer is more effective in dissipating

heat. The thermal impedance can be further reduced by using

other layers of copper connecting to the exposed pad through a

thermal via array. Each thermal via is recommended to have

0.3mm diameter and 1mm distance from other thermal vias.

SEN

-40mA/°C

Input Power Sources

The input power source is typically a well-regulated wall cube

with 1m length wire or a USB port. The recommended input

voltage ranges from 4.3V to 6.4V. The ISL9230 can withstand up

to 26V on the input without damaging the IC. If the input voltage

is higher than the OVP threshold, the IC is disabled.

TEMPERATURE

+125°C

FIGURE 31. THERMAL FOLDBACK CONCEPT

FN7642.1

July 22, 2011

ISL9230

There are 3 scenarios for fast charge depending on the output

current. When the sum of the output current and the fast charge

current is smaller than the input current limit, the IC enters the

State Diagram

The state diagram is shown in Figure 32. There are 15 states to

cover all the operation modes, including the Power Down, Sleep,

Standby, ILIM, IREF check, VOUT check, Idle, VBAT check, Trickle

Charge, CC/CV charge, Charge Complete, Battery Detect-1,

Battery Detect-2, Battery Detect-3, Fault and Charging and

Suspend states.

Fast Charge state with the charge current set by R

. When the

IREF

sum of the output current and the fast charge current are greater

than the input current limit, the IC will enter the DPPM mode,

where the charging current is reduced to a point such that the

sum of output current and the charging current equals to the

input current limit. If the output current by itself is greater than

the programmed input current limit, the IC enters the battery

supplemental mode, where the battery is discharged to the

system to aid in meeting the output demand.

The IC flow chart starts by checking the voltage applied at VIN. If

< V < V

+ V , the IC stays in the Sleep state. If V

POR

IN BAT

BAT

< V < V , the IC pulls the PG pin low and moves into the

IN OVP

ILIM, IREF check state where the ILIM and IREF pins are being

checked for short circuit condition. If there is no short at either

The output voltage, depending on V , is regulated at either

BAT

pin, the regulator FET Q1 will regulate V

with 100mA current

check state where

is checked for short circuit condition. If V is below 0.9V,

OUT

+ 225mV (when V

< 3.2V).

> 3.2V) or regulated at 3.4V (when

BAT

limit. Following this, the IC moves to the V

OUT

indicating a V

short condition, the IC will stay at the V

During the constant voltage mode, the output voltage is

OUT

check state. If V

OUT

is above 0.9V, the IC will set the input current

regulated at V

+ 225mV if the DPPM event is not

OUT

BAT

limit according to the setting on the AC/USB and the MODE pins.

The IC then checks the status of the CHGEN pin.

encountered.

If the timeout limit is reached before reaching the Charge

If the CHGEN is low, the IC moves to the V

BAT

short circuit check

Complete state, the IC enters the Charger Fault state, where PG

state where a 5.5mA current is sourced at the VBAT pin and the

voltage is checked against the 1.8V threshold. If V is above

is LO, CHG is blinking once in 0.5S, V is regulated as

OUT

described above and the charger is OFF. This state is latched until

the input power is removed and re-applied to start a new cycle.

BAT

1.8V, the IC moves to the trickle charge state where the trickle

charge timer starts, the charge current is set to I

turned on to indicate charging is in progress.

and CHG is

TRK

At any time during the operation, if the die temperature reaches the

OTP threshold, the IC will enter the OTP state, where PG is LO, CHG

remains in previous state, and the charger is OFF. VOUT is

When V

BAT

reaches the V

threshold (3.0V typ), the fast charge

MIN

starts where the charge current is set by R

current limit, whichever is smaller. When V

BAT

or by the IC’s input

reaches the V

disconnected from VIN and connected to VBAT internally to maintain

IREF

system power need. When the die temperature reduces by T ,

BAT

SD-HYS

regulated voltage (4.2V typ), the charger moves to constant

voltage mode where V is regulated at 4.2V. If the charge

normal charging operation occurs and the device returns to thermal

regulation.

BAT

current drops to below the EOC threshold, the CHG turns off to

indicate a charge complete condition. The charge current will be

terminated if the CONT pin is at logic low status. Recharge will

occur when V

drops below the recharge threshold which is

BAT

120mV below the regulated VBAT voltage.

FN7642.1

July 22, 2011

START

IF V_BAT< V_MIN

AFTER 25ms

ANY TIME AFTER (A) WHEN

VIN < V_{POR_F}

CC/CV CHARGE (I)

/CHG = L

GO TO (N) IF t_FASTELAPSED

PWR DOWN (A)

/PG = HI-Z

/CHG = HI-Z

(/CHG = Hi-Z DURING

RECHARGE)

VBAT

REACHES

V_{B_REG}AND

YES

VIN < V_POR

_BAT= I_FAST

Tj > T_SD

Q1=OFF, Q2=ON

ENABLE t_FAST

ANY STATE (EXCEPT (N)) AFTER

_BAT< I_EOC?

TURN OFF Q1

Q2 REMAINS ON

GO TO (O)

(B) WHEN VIN<VBAT + V_OS

SLEEP (B)

/PG = HI-Z

/CHG = HI-Z

YES

AFTER 25ms

Tj < T_SD– T_{SD_HYS}

DISABLE I_BAT

TURN OFF Q2

DISABLE t_FAST

/CHG = Hi-Z

AFTER 20ms

YES

VPOR < VIN

& VIN < VBAT + V_OS

Q1=OFF, Q2=ON

TURN ON Q1 at

AC/USB, MODE

ENABLE THERMAL

LOOP

ANY STATE AFTER (C)

WHEN VIN > V_OVP

STANDBY (C)

/PG = HI-Z

SINK I_DET(7.5mA)

/CHG = HI-Z

Q1=OFF, Q2=ON

FOR t_DET(250ms)

YES

AFTER 50µs

VIN > V_OVP?

CHARGE

COMPLETE (J)

/CHG = HI-Z

Q1 = ON AT

AC/USB, MODE

Q2 = OFF

AFTER 50µs

/PG = L

VBAT < V_RCH

FOR t_RCH

ILIM, IREF

CHECK (D)

YES

ILIM OR IREF

PIN SHORTED?

SINK I_DET(7.5mA)

FOR t_DET(250ms)

BATTERY DETECTION-1

(K)

(BATT REMOVAL

DETECTION)

TURN ON Q1 @

100mA

ANY STATE AFTER (E) WHEN

VOUT < V_OSC1

VOUT CHECK (E)

/CHG = HI-Z

Q1 = ON @

100mA

FAULT (N)

YES

/CHG FLASHING AT 2Hz

Q1 = ON AT AC/USB,

MODE

VBAT > VMIN?

YES

RESET t_FAST

VOUT < V_OSC1

Q2 = ON

Q2 = OFF

(BATTERY SUPPLEMENT MODE STILL

AVAILABLE)

Q1 CURRENT

LIMIT SET BY AC/

USB AND MODE

Q2 = OFF

SWITCH V_{O_REG}

TO V_{B_REG}

ANY STATE AFTER (F) WHEN

/CHGEN = H

225mV (4.425V)

IDLE (F)

Q1 = ON @

AC/USB, MODE

Q2 = OFF

ENABLE

I_TRK

FOR t_DET

TO START WHEN /CHGEN TOGGLES

BATTERY DETECTION-2(L)

(BATT REMOVAL

YES

/CHGEN = H?

DETECTION)

ANY STATE AFTER (G)

WHEN

ANYTIME WHEN

Tj > T_SD

VBAT CHECK

(G)

/CHG = Hi-Z

Q1 = ON @

AC/USB, MODE

TURN ON I_BSC

VBAT< V_BSC

SWITCH

V_{O_REG}

VBAT > V_RCH

YES

VBAT < V_BSC

TO NORMAL

OPERATION

CHARGING SUSPENDED (O)

Q1 = OFF, Q2 = ON

/CHG REMAINS PREVIOUS

STATE

GO TO (N) IF t_PREHAS

BEEN ELAPSED

TURN OFF I_BSC

RESET t_PRE

SINK I_DET(7.5mA)

FOR _DET(250ms)

BATTERY DETECTION-3(M)

(BATT REMOVAL

TRICKLE (H)

/CHG = L

ENABLE THERMAL LOOP

SET /CHG = L

HALT t_FAST

HALT t_PRE

Tj > T_SD

DETECTION)

_BAT= I_TRK

ENABLE T_PRE

TURN OFF Q1

Q2 REMAINS ON

GO TO (O)

SWITCH

V_{O_REG}

To NORMAL

OPERATION

YES

VBAT<VMIN?

VBAT > VMIN?

Tj < T_SD-T_{SD_HYS}

AFTER 25ms

TURN ON Q1 AT

AC/USB, MODE

ENABLE

DISABLE I_TRK

DISABLE t_PRE

RESET t_FAST

THERMAL LOOP

FIGURE 32. STATE DIAGRAM (CONT = L)

ISL9230

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make

sure you have the latest revision.

DATE

REVISION

FN7642.1

CHANGE

June 10, 2011

-Replaced IBAT with IFAST for fast charge operation discussion.

-Corrected CHG state to remain in previous state when die temp reaches an over-temp condition

May 27, 2011

-Changed:

Programmed Charge Current . . . . . . . . . . . . . . . . . . . . .200mA to 1500mA

To:

Programmed Fast Charge Current . . . . . . . . . . . . . . . . . 300mA to 1500mA

-Corrected "IVIN" label in Figure 10 to "IOUT" (was a duplicate)

On page 14:

-Corrected some references of IREF to IBAT and IMIN to IEOC

-Corrected some references of VOUT to VBAT

On page 15:

-In Equations 5 and 6, changed "ICHG" to "IFAST"

May 12, 2011

FN7642.0

Initial Release

Products

Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products

address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.

Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a

complete list of Intersil product families.

*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page

on intersil.com: ISL9230

To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff

FITs are available from our website at: http://rel.intersil.com/reports/sear

For additional products, see www.intersil.com/product_tree

Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted

in the quality certifications found at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time

without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be

accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN7642.1

July 22, 2011

ISL9230

Package Outline Drawing

L16.3x3E

16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE

Rev 0, 3/11

4X 1.50

3.00

12X 0.50

PIN #1

INDEX AREA

PIN 1

INDEX AREA

+0.10

- 0.15

1.70

(4X)

0.15

0.10 M C A B

16X 0.40±0.10

BOTTOM VIEW

TOP VIEW

16X 0.25

+0.07

- 0.05

SEE DETAIL “X”

0 . 2 REF

0.10 C

0.90 ±0.10

0 . 02 NOM.

0 . 05 MAX.

0.08

SIDE VIEW

DETAIL "X"

NOTES:

1. Dimensions are in millimeters.

Dimensions in ( ) for Reference Only.

(12X 0.50)

2. Dimensioning and tolerancing conform to ASME Y14.5m-1994.

3. Unless otherwise specified, tolerance : Decimal ± 0.05

(2.80 TYP) ( 1.70)

(16X 0.25)

4. Dimension applies to the metallized terminal and is measured

between 0.15mm and 0.30mm from the terminal tip.

Tiebar shown (if present) is a non-functional feature.

The configuration of the pin #1 identifier is optional, but must be

located within the zone indicated. The pin #1 identifier may be

either a mold or mark feature.

(16X 0.60)

TYPICAL RECOMMENDED LAND PATTERN

FN7642.1

July 22, 2011

ISL9230 [INTERSIL]

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