RFD16N02L [INTERSIL]
16A, 20V, 0.022 Ohm, N-Channel, Logic Level, Power MOSFET; 16A ， 20V ， 0.022 Ohm的N通道，逻辑电平功率MOSFET
| 型号： | RFD16N02L |
| 厂家： | 
Intersil |
| 描述： | 16A, 20V, 0.022 Ohm, N-Channel, Logic Level, Power MOSFET |
| 文件： | 总8页 (文件大小：78K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RFD16N02L,
RFD16N02LSM
16A, 20V, 0.022 Ohm, N-Channel,
Logic Level, Power MOSFET
May 1997
Features
Description
• 16A, 20V
• r = 0.022Ω
The RFD16N02L and RFD16N02LSM are N-Channel power
MOSFETs manufactured using the MegaFET process. This
process, which uses feature sizes approaching those of
LSI circuits, gives optimum utilization of silicon, resulting in
outstanding performance. They were designed for use in
applications such as switching regulators, switching convert-
ers, motor drivers and relay drivers. This performance is
accomplished through a special gate oxide design which
provides full rated conductance at gate bias in the 3V to 5V
range, thereby facilitating true on-off power control directly
from logic level (5V) integrated circuits.
DS(ON)
• Temperature Compensating PSPICE Model
• Can be Driven Directly from CMOS, NMOS,
and TTL Circuits
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
o
• 175 C Operating Temperature
Ordering Information
Symbol
PART NUMBER
RFD16N02L
PACKAGE
TO-251AA
TO-252AA
BRAND
16N02L
16N02L
D
RFD16N02LSM
NOTE: When ordering, use the entire part number. Add the suffix
9A, to obtain the TO-252AA variant in tape and reel, e.g.
RFD16N02LSM9A.
G
S
Formerly developmental type TA49243.
Packaging
JEDEC TO-251AA
JEDEC TO-252AA
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
DRAIN
(FLANGE)
GATE
SOURCE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
File Number 4341
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
RFD16N02L, RFD16N02LSM
o
Absolute Maximum Ratings T = 25 C
C
RFD16N02L, RFD16N02LSM
UNITS
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
20
20
V
V
V
DSS
Drain to Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain Current
±10
GS
RMS Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
16
A
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Refer to Peak Current Curve
DM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E
AS
Refer to UIS Curve
Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P
Derate Above 25 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
0.606
W
W/ C
D
o
o
o
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T , T
-55 to 175
260
C
J
STG
o
Soldering Temperature of Leads for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
C
L
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
o
Electrical Specifications T = 25 C, Unless Otherwise Specified
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
V
Drain to Source Breakdown Voltage
Gate to Source Threshold Voltage
Zero Gate Voltage Drain Current
BV
DSS
I
= 250µA, V
GS
= 0V
20
1
-
-
-
-
D
V
V
= V , I = 250µA
2
V
GS(TH)
GS
DS
D
o
I
V
V
= 20V,
= 0V
T
T
= 25 C
-
1
50
±100
0.022
120
-
µA
µA
nA
Ω
DSS
DS
GS
C
C
o
= 150 C
-
-
Gate to Source Leakage Current
Drain to Source On Resistance
Turn-On Time
I
V
= ±10V
-
-
GSS
GS
r
I
= 16A, V
= 5V
-
-
DS(ON)
D
GS
t
V
R
R
= 15V, I
D
16A,
= 5V,
-
-
ns
ON
DD
= 0.93Ω, V
L
GS
Turn-On Delay Time
t
-
15
95
25
27
-
ns
d(ON)
= 5Ω
GS
Rise Time
t
-
-
ns
r
Turn-Off Delay Time
t
-
-
ns
d(OFF)
Fall Time
t
-
-
ns
f
Turn-Off Time
t
-
80
60
36
1.8
-
ns
OFF
Total Gate Charge
Q
V
V
V
V
= 0V to 10V V
16V,
I ≈ 16A,
-
50
30
1.5
1300
724
250
-
nC
nC
nC
pF
pF
pF
g(TOT)
GS
GS
GS
DS
DD
D
Gate Charge at 5V
Q
= 0V to 5V
= 0V to 1V
-
g(5)
R
= 1.0Ω
L
Threshold Gate Charge
Input Capacitance
Q
-
g(TH)
C
= 20V, V
GS
= 0V,
-
ISS
OSS
RSS
f = 1MHz
Output Capacitance
C
C
-
-
Reverse Transfer Capacitance
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
-
-
o
R
-
1.65
100
C/W
θJC
θJA
o
R
TO-251 and TO-252
-
-
C/W
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
1.5
UNITS
V
V
I
I
= 16A
-
-
-
-
SD
SD
t
= 16A, dI /dt = 100A/µs
80
ns
rr
SD
SD
2
RFD16N02L, RFD16N02LSM
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
20
15
10
5
0
0.2
0
0
25
50
75
100
125
o
150
175
25
50
75
100
150
125
175
o
T
, CASE TEMPERATURE ( C)
T , CASE TEMPERATURE ( C)
C
C
FIGURE 1. NORMALIZED POWER DISSIPATION vs
TEMPERATURE DERATING
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
2
1
0.5
0.2
P
DM
0.1
0.1
.05
t
t
1
.02
.01
2
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
1
2
x Z
PEAK T = P
x R
+ T
JC C
J
DM
JC
θ
θ
0.01
-5
-4
-3
-2
10
-1
10
0
1
10
10
10
10
10
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
500
100
500
o
= 25 C
T
C
V
= 10V
V
FOR TEMPERATURES
ABOVE 25 C DERATE PEAK
CURRENT AS FOLLOWS:
GS
o
T
= MAX RATED
J
= 5V
GS
175 - T
150
C
I = I
100µs
25
100
1ms
o
T
= 25 C
C
10
1
10ms
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
100ms
DC
OPERATION IN THIS
AREA MAY BE
V
MAX = 20V
10
DSS
LIMITED BY r
DS(ON)
10
10
1
50
-5
-4
10
-3
10
-2
-1
0
1
10
10
10
10
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
t, PULSE WIDTH (s)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. PEAK CURRENT CAPABILITY
3
RFD16N02L, RFD16N02LSM
Typical Performance Curves (Continued)
200
100
100
75
V
= 10V
GS
V
= 5V
GS
o
STARTING T = 25 C
J
V
= 4.5V
= 4V
GS
50
V
GS
o
STARTING T = 150 C
J
10
V
= 3.5V
= 3V
GS
If R = 0
25
t
= (L)(I )/(1.3*RATED BV
- V )
DD
AV
If R ≠ 0
= (L/R)ln[(I *R)/(1.3*RATED BV
AS DSS
V
GS
o
t
-V ) +1]
PULSE DURATION = 250µs, T = 25 C
AV
AS
DSS DD
C
1
0.001
0
0
2
3
4
5
1
0.01
0.1
1
10
100
t
, TIME IN AVALANCHE (ms)
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
AV
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
100
75
50
25
0
100
o
V
= 15V
DD
175 C
I
I
= 32A
D
o
-55 C
75
50
25
0
I
= 16A
= 8A
D
o
25 C
D
I
= 2A
D
PULSE TEST
o
PULSE DURATION = 250µs
DUTY CYCLE = 0.5% MAX
T
= 25 C, PULSE DURATION = 250µs
J
5.0
2.5
3.0
V
3.5
4.0
4.5
0
1.5
3.0
4.5
6.0
7.5
, GATE TO SOURCE VOLTAGE (V)
V
, GATE TO SOURCE VOLTAGE (V)
GS
GS
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs
GATE VOLTAGE AND DRAIN CURRENT
250
200
150
100
50
2.0
PULSE DURATION = 250µs,
V
= 5V,
I
GS
D
= 16A
t
r
V
= 15V, I = 16A, R = 0.93Ω
D L
DD
1.5
1.0
t
f
t
d(ON)
t
0.5
0
d(OFF)
0
-80
-40
0
40
80
120
160
200
0
10
20
30
40
50
o
R
, GATE TO SOURCE RESISTANCE (Ω)
T , JUNCTION TEMPERATURE ( C)
GS
J
FIGURE 10. SWITCHING TIME AS A FUNCTION OF GATE
RESISTANCE
FIGURE 11. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
4
RFD16N02L, RFD16N02LSM
Typical Performance Curves (Continued)
2.0
2.0
1.5
1.0
0.5
0
V
= V , I = 250µA
DS D
I
= 250µA
GS
D
1.5
1.0
0.5
0
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
o
o
T , JUNCTION TEMPERATURE ( C)
T , JUNCTION TEMPERATURE ( C)
J
J
FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 13. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
20
15
10
5
5
2500
V
= BV
DSS
V
= BV
DD DSS
DD
V
= 0V, f = 1MHz
GS
2000
1500
1000
500
0
3.75
2.5
1.25
0
R
= 1.25Ω
L
I
V
= 0.55mA
G(REF)
= 5V
GS
PLATEAU VOLTAGES IN
DESCENDING ORDER:
C
ISS
V
V
V
V
= BV
DD
DD
DD
DD
DSS
C
OSS
= 0.75 BV
= 0.50 BV
= 0.25 BV
DSS
DSS
DSS
C
RSS
0
I
I
G(REF)
G(REF)
0
5
10
15
20
t, TIME (µs)
---------------------
---------------------
20
80
I
I
V
, DRAIN TO SOURCE VOLTAGE (V)
G(ACT)
G(ACT)
DS
FIGURE 14. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Application Notes AN7254 and AN7260.
FIGURE 15. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
5
RFD16N02L, RFD16N02LSM
Test Circuits and Waveforms
V
DS
BV
DSS
t
P
L
V
DS
I
AS
V
VARY t TO OBTAIN
P
DD
+
-
R
REQUIRED PEAK I
G
AS
V
DD
V
GS
DUT
t
P
0
I
0V
AS
0.01Ω
t
AV
FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 17. UNCLAMPED ENERGY WAVEFORMS
t
t
ON
OFF
t
d(OFF)
t
d(ON)
R
L
t
t
f
r
V
DS
90%
90%
+
V
DD
R
G
-
10%
10%
0
0
DUT
90%
50%
V
GS
50%
V
GS
PULSE WIDTH
10%
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. RESISTIVE SWITCHING WAVEFORMS
V
DS
V
Q
DD
g(TOT)
R
L
V
DS
V
= 10V
GS
Q
V
g(5)
GS
+
-
V
V
= 5V
DD
V
GS
GS
V
GS
= 1V
DUT
0
I
G(REF)
Q
g(TH)
I
G(REF)
0
FIGURE 20. GATE CHARGE TEST CIRCUIT
FIGURE 21. GATE CHARGE WAVEFORMS
6
RFD16N02L, RFD16N02LSM
Temperature Compensated PSPICE Model for the RFD16N02L, RFD16N02LSM
.SUBCKT RFD16N02L 2 1 3;
CA 12 8 2.55e-9
rev 12/12/94
CB 15 14 2.64e-9
CIN 6 8 1.05e-9
DPLCAP
RSCL2
DRAIN
2
LDRAIN
5
DBODY 7 5 DBDMOD
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD
10
RSCL1
51
DBREAK
11
+
EBREAK 11 7 17 18 33.3
5
51
ESCL
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1
-
50
+
17
18
6
8
EBREAK
ESG
DBODY
RDRAIN
+
16
-
VTO
+
-
IT 8 17 1
MOS2
EVTO
21
GATE
1
20
+
6
9
-
18
8
LDRAIN 2 5 1e-9
LGATE 1 9 3.4e-9
LSOURCE 3 7 3.4e-9
MOS1
8
LGATE RGATE
RIN
CIN
LSOURCE
RSOURCE
7
MOS1 16 6 8 8 MOSMOD M = 0.99
3
MOS2 16 21 8 8 MOSMOD M = 0.01
SOURCE
S1A
S2A
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 0.14e-3
RGATE 9 20 0.89
RIN 6 8 1e9
RSCL1 5 51 RSCLMOD 1e-6
RSCL2 5 50 1e3
RBREAK
12
15
13
8
14
13
17
18
S1B
CA
S2B
13
RVTO
19
CB
IT
14
+
+
VBAT
+
RSOURCE 8 7 RDSMOD 10.31e-3
RVTO 18 19 RVTOMOD 1
6
8
5
8
EDS
EGS
-
-
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.583
ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/176,6))}
.MODEL DBDMOD D (IS = 3.61e-13 RS = 5.06e-3 TRS1 = 3.05e-3 TRS2 = 7.57e-6 CJO = 2.0e-9 TT = 2.18e-8)
.MODEL DBKMOD D (RS = 1.66e-1 TRS1 = -2.97e-3 TRS2 = 7.57e-6)
.MODEL DPLCAPMOD D (CJO = 1.25e-9 IS = 1e-30 N = 10)
.MODEL MOSMOD NMOS (VTO = 2.313 KP = 53.82 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL RBKMOD RES (TC1 = 8.95e-4 TC2 = -1e-7)
.MODEL RDSMOD RES (TC1 = 3.92e-3 TC2 = 1.29e-5)
.MODEL RSCLMOD RES (TC1 = 2.03e-3 TC2 = 0.45e-5)
.MODEL RVTOMOD RES (TC1 = -2.27e-3 TC2 = -5.75e-7)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.82 VOFF= -2.82)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.82 VOFF= -4.82)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.67 VOFF= 2.33)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.33 VOFF= -2.67)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; written by William J. Hepp and C. Frank Wheatley.
7
RFD16N02L, RFD16N02LSM
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
EUROPE
ASIA
Intersil Corporation
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
8
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