X9313ZM [INTERSIL]
Terminal Voltages +-5V, 32 Taps; 端电压+ -5V ， 32丝锥
| 型号： | X9313ZM |
| 厂家： | 
Intersil |
| 描述： | Terminal Voltages +-5V, 32 Taps |
| 文件： | 总11页 (文件大小：276K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
X9313
Terminal Voltages ±5V, 32 Taps
®
Data Sheet
September 9, 2005
FN8177.2
Digitally Controlled Potentiometer
(XDCP™)
The Intersil X9313 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by a 3-wire interface.
Features
• Solid-state potentiometer
• 3-wire serial interface
• 32 wiper tap points
- Wiper position stored in nonvolatile memory and
recalled on power-up
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs.
The position of the wiper can be stored in nonvolatile
memory and then be recalled upon a subsequent power-up
operation.
• 31 resistive elements
- Temperature compensated
- End to end resistance range ± 20%
- Terminal voltages, -5V to +5V
• Low power CMOS
- V
= 3V or 5V
CC
- Active current, 3mA max.
The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including:
- Standby current, 500µA max.
• High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
• Control
• Parameter adjustments
• Signal processing
• R
TOTAL
values = 1kΩ, 10kΩ, 50kΩ
• Packages
- 8 Ld SOIC, MSOP and DIP
• Pb-free plus anneal available (RoHS compliant)
Block Diagrams
5-BIT
UP/DOWN
COUNTER
U/D
INC
CS
R /V
31
H
H
V
(SUPPLY VOLTAGE)
CC
30
29
28
R /V
H
H
UP/DOWN
(U/D)
5-BIT
NONVOLATILE
MEMORY
ONE
OF
CONTROL
AND
MEMORY
INCREMENT
(INC)
R
/V
W
W
THIRTY
TRANSFER
GATES
RESISTOR
ARRAY
TWO
DECODER
DEVICE SELECT
(CS)
R /V
L
L
2
STORE AND
RECALL
CONTROL
CIRCUITRY
V
(GROUND)
SS
1
0
V
V
CC
SS
GENERAL
R /V
L
L
/V
R
W
W
DETAILED
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1
X9313
Ordering Information
TEMPERATURE
RANGE
V
RANGE
R
TOTAL
CC
PART NUMBER
X9313UM*
PART MARKING
313U
(V)
4.5 to 5.5
(kΩ)
(°C)
PACKAGE
8 Ld MSOP
50
0 to 70
0 to 70
X9313UMZ* (Note)
X9313UMI*
DDC
8 Ld MSOP (Pb-free)
8 Ld MSOP
13UI
-40 to 85
-40 to 85
0 to 70
X9313UMIZ* (Note)
X9313UP
DDB
8 Ld MSOP (Pb-free)
8 Ld PDIP
X9313UP
X9313UP I
X9313U
X9313U Z
X9313U I
X9313U Z I
X9313UPI
-40 to 85
0 to 70
8 Ld PDIP
X9313US*
8 Ld SOIC
X9313USZ* (Note)
X9313USI*
0 to 70
8 Ld SOIC (Pb-free)
8 Ld SOIC
-40 to 85
-40 to 85
0 to 70
X9313USIZ* (Note)
X9313USM
8 Ld SOIC (Pb-free)
8 Ld SOIC
X9313WM*
313W
DDF
10
0 to 70
8 Ld MSOP
X9313WMZ* (Note)
X9313WMI*
0 to 70
8 Ld MSOP (Pb-free)
8 Ld MSOP
13WI
-40 to 85
-40 to 85
0 to 70
X9313WMIZ* (Note)
X9313WP
DDE
8 Ld MSOP (Pb-free)
8 Ld PDIP
X9313WP
X9313XP I
X9313WS
X9313W Z
X9313WS I
X9313WS Z I
X9313WS M
313Z
X9313WPI
-40 to 85
0 to 70
8 Ld PDIP
X9313WS*
8 Ld SOIC
X9313WSZ* (Note)
X9313WSI*
0 to 70
8 Ld SOIC (Pb-free)
8 Ld SOIC
-40 to 85
-40 to 85
0 to 70
X9313WSIZ* (Note)
X9313WSMT2
X9313ZM*
8 Ld SOIC (Pb-free)
8 Ld SOIC Tape and Reel
8 Ld MSOP
0 to 70
X9313ZMZ* (Note)
X9313ZMI*
DDJ
0 to 70
8 Ld MSOP (Pb-free)
8 Ld MSOP
13ZI
1
-40 to 85
-40 to 85
0 to 70
X9313ZMIZ* (Note)
X9313ZP
DDH
8 Ld MSOP (Pb-free)
8 Ld PDIP
X9313ZP
X9313ZP I
X9313ZS
X9313 Z
X9313ZS I
X9313ZS Z I
X9313ZPI
-40 to 85
0 to 70
8 Ld PDIP
X9313ZS*
8 Ld SOIC
X9313ZSZ* (Note)
X9313ZSI*
0 to 70
8 Ld SOIC (Pb-free)
8 Ld SOIC
-40 to 85
-40 to 85
X9313ZSIZ* (Note)
8 Ld SOIC (Pb-free)
FN8177.2
September 9, 2005
2
X9313
Ordering Information (Continued)
TEMPERATURE
RANGE
V
RANGE
R
TOTAL
CC
PART NUMBER
X9313UM-3*
PART MARKING
13UD
(V)
3 to 5.5
(kΩ)
(°C)
PACKAGE
8 Ld MSOP
50
10
1
0 to 70
0 to 70
X9313UMZ-3* (Note)
X9313UMI-3*
DDD
8 Ld MSOP (Pb-free)
8 Ld MSOP
13UE
-40 to 85
-40 to 85
0 to 70
X9313UMIZ-3* (Note)
X9313UP-3
13UE Z
8 Ld MSOP (Pb-free)
8 Ld PDIP
X9313UP D
X9313U D
X9313U Z D
13WD
X9313US-3*
0 to 70
8 Ld SOIC
X9313USZ-3* (Note)
X9313WM-3*
0 to 70
8 Ld SOIC (Pb-free)
8 Ld MSOP
0 to 70
X9313WMZ-3* (Note)
X9313WMI-3*
DDG
0 to 70
8 Ld MSOP (Pb-free)
8 Ld MSOP
13WE
-40 to 85
-40 to 85
0 to 70
X9313WMIZ-3* (Note)
X9313WP-3
13WE Z
8 Ld MSOP (Pb-free)
8 Ld PDIP
X9313WP D
X9313W D
X9313W Z D
13ZD
X9313WS-3*
0 to 70
8 Ld SOIC
X9313WSZ-3* (Note)
X9313ZM-3*
0 to 70
8 Ld SOIC (Pb-free)
8 Ld MSOP
0 to 70
X9313ZMZ-3* (Note)
X9313ZMI-3*
DDK
0 to 70
8 Ld MSOP (Pb-free)
8 Ld MSOP
13ZE
-40 to 85
-40 to 85
0 to 70
X9313ZMIZ-3* (Note)
X9313ZP-3
13ZE Z
8 Ld MSOP (Pb-free)
8 Ld PDIP
X9313ZP D
X9313Z D
X9313Z Z D
X9313Z E
X9313Z Z E
X9313ZS-3*
0 to 70
8 Ld SOIC
X9313ZSZ-3* (Note)
X9313ZSI-3*
0 to 70
8 Ld SOIC (Pb-free)
8 Ld SOIC
-40 to 85
-40 to 85
X9313ZSIZ-3* (Note)
8 Ld SOIC (Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
*Add "T1" suffix for tape and reel.
FN8177.2
3
September 9, 2005
X9313
TABLE 1. PIN NAMES
DESCRIPTION
Pin Descriptions
SYMBOL
R /V and R /V
H
L
H
L
R /V
H
High terminal
The high (R /V ) and low (R /V ) terminals of the X9313
H
H
L
H
L
are equivalent to the fixed terminals of a mechanical
potentiometer. The terminology of R /V and R /V
R /V
W
Wiper terminal
W
L
H
L
H
R /V
L
Low terminal
L
references the relative position of the terminal in relation to
wiper movement direction selected by the U/D input and not
the voltage potential on the terminal.
V
Ground
SS
V
Supply voltage
CC
U/D
INC
CS
Up/Down control input
Increment control input
Chip Select control input
RW/VW
R /V is the wiper terminal and is equivalent to the movable
W
w
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the control inputs.
The wiper terminal series resistance is typically 40Ω at V
= 5V.
CC
Principles of Operation
There are three sections of the X9313: the input control,
counter and decode section; the nonvolatile memory; and
the resistor array. The input control section operates just like
an up/down counter. The output of this counter is decoded to
turn on a single electronic switch connecting a point on the
resistor array to the wiper output. Under the proper
conditions the contents of the counter can be stored in
nonvolatile memory and retained for future use. The resistor
array is comprised of 31 individual resistors connected in
series. At either end of the array and between each resistor
is an electronic switch that transfers the potential at that
point to the wiper.
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is incremented or decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the
U/D input.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory when
CS is returned HIGH while the INC input is also HIGH. After
the store operation is complete the X9313 will be placed in
the low power standby mode until the device is selected
once again.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions. If
the wiper is moved several positions, multiple taps are
Pin Configuration
connected to the wiper for t (INC to V change). The
8-Lead DIP/SOIC
IW
W
R
value for the device can temporarily be reduced by
TOTAL
a significant amount if the wiper is moved several positions.
INC
1
2
3
4
8
7
6
5
V
CC
U/D
CS
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled
and the wiper is set to the value last stored.
X9313
R /V
L
R /V
L
H
V
H
R
/V
W
SS
W
Instructions and Programming
8-Lead MSOP
The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS set LOW the device
is selected and enabled to respond to the U/D and INC
inputs. HIGH to LOW transitions on INC will increment or
decrement (depending on the state of the U/D input) a seven
bit counter. The output of this counter is decoded to select
one of thirty two wiper positions along the resistive array.
R /V
H
H
U/D
INC
1
2
3
4
8
V
SS
7
X9313
6
R
/V
W
W
V
CC
CS
R /V
L
L
5
The value of the counter is stored in nonvolatile memory
whenever CS transitions HIGH while the INC input is also
HIGH.
FN8177.2
4
September 9, 2005
X9313
The system may select the X9313, move the wiper and
deselect the device without having to store the latest wiper
position in nonvolatile memory. After the wiper movement is
performed as described above and once the new position is
reached, the system must keep INC LOW while taking CS
HIGH. The new wiper position will be maintained until
changed by the system or until a power-up/down cycle
recalled the previously stored data.
This procedure allows the system to always power-up to a
preset value stored in nonvolatile memory; then during
system operation minor adjustments could be made. The
adjustments might be based on user preference, system
parameter changes due to temperature drift, etc.
The state of U/D may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the wiper up and down until the proper trim is attained.
TABLE 2. MODE SELECTION
CS
L
INC
U/D
H
L
MODE
Wiper up
L
Wiper down
H
X
L
L
L
X
Store wiper position
H
X
Standby current
X
No store, return to standby
Wiper up (not recommended)
Wiper down (not recommended)
H
L
Symbol Table
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
FN8177.2
5
September 9, 2005
X9313
Absolute Maximum Ratings
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on CS, INC, U/D, and
Recommended Operating Conditions
Temperature:
Commercial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage (VCC):
V
with respect to V . . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V
CC
Voltage on V , V , V
W
SS
X9313 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±10%
X9313-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V
H
L
with respect to V . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to +7V
SS
∆V = |V - V |:
H
L
X9313Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4V
X9313W, X9313U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10V
Lead Temperature (soldering 10 seconds) . . . . . . . . . . . . . . .300°C
I
(10 seconds). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±8.8mA
W
CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Potentiometer Characteristics
Over recommended operating conditions unless otherwise stated.
LIMITS
TYP
SYMBOL
PARAMETER
TEST CONDITIONS/NOTES
MIN
MAX
±20
+5
UNIT
%
End-to-end resistance tolerance
V
V
V
terminal voltage
terminal voltage
-5
-5
V
VH
H
L
V
+5
V
VL
Power rating
R
R
≥ 10kΩ
≥ 1kΩ
10
mW
mW
W
TOTAL
16
TOTAL
R
Wiper resistance
Wiper current
Noise
I
= 1mA, V = 5V
CC
40
100
±4.4
W
W
I
mA
dBV
%
W
Ref: 1kHz
-120
3
Resolution
Absolute linearity (Note 1)
R
R
- R
W(n)(expected)
±1
MI
W(n)(actual)
(Note 3)
Relative linearity (Note 2)
- (R
W(n)
+MI)
±0.2
MI
(Note 3)
W(n+1)
R
temperature coefficient
±300
ppm/°C
ppm/°C
pF
TOTAL
Ratiometric temperature coefficient
Potentiometer capacitances
±20
C /C /C
W
See Circuit #3
10/10/25
H
L
NOTES:
1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (V
- V
) = ±1 MI maximum.
W(n)(actual)
+ MI) = ±0.2 MI.
W(n)(expected)
2. Relative linearity is a measure of the error in step size between taps = R
- (R
W(n)
W(n+1)
3. 1 MI = minimum increment = R
/ 31.
TOT
FN8177.2
September 9, 2005
6
X9313
DC Operating Characteristics Over recommended operating conditions unless otherwise stated.
LIMITS
TYP
SYMBOL
PARAMETER
active current
TEST CONDITIONS/NOTES
MIN
(Note 4)
MAX
UNIT
I
V
CS = V , U/D = V or V and INC =
1
3
mA
CC
CC
IL IL IH
0.42 / 2.4V @ max t
CYC
I
Standby supply current
CS = V
CC
- 0.3V, U/D and INC = V or
SS
200
500
µA
SB
CC
- 0.3V
V
I
CS, INC, U/D input leakage current
CS, INC, U/D input HIGH current
CS, INC, U/D input LOW current
CS, INC, U/D input capacitance
V
= V to V
SS CC
±10
µA
V
LI
IN
V
2
V
+ 1
CC
IH
V
-1
+0.8
V
IL
C
V
= 5V, V = V , TA = 25°C,
10
pF
IN
CC
IN
SS
f = 1MHz
NOTES:
4. Typical values are for TA = 25°C and nominal supply voltage.
5. This parameter is periodically sampled and not 100% tested.
Endurance and Data Retention
PARAMETER
MIN
UNIT
Minimum endurance
100,000
Data changes per bit
per register
Data retention
100
Years
V /R
H
H
R
TOTAL
V /R
H
H
TEST POINT
/R
R
R
L
H
C
L
C
W
C
H
10pF
V
S
V
TEST POINT
/R
W
W
25pF
FORCE
CURRENT
V
W
W
10pF
V /R
L
L
V /R
R
L
L
W
FIGURE 1. TEST CIRCUIT #1
FIGURE 2. TEST CIRCUIT #2
FIGURE 3. CIRCUIT #3 SPICE MACRO
MODEL
AC Conditions of Test
Input pulse levels
Input rise and fall times
Input reference levels
0V to 3V
10ns
1.5V
FN8177.2
September 9, 2005
7
X9313
AC Operating Characteristics Over recommended operating conditions unless otherwise stated.
LIMITS
TYP
SYMBOL
PARAMETER
MIN
100
100
2.9
1
(Note 6)
MAX
UNIT
ns
t
t
t
CS to INC setup
CI
ID
DI
INC HIGH to U/D change
U/D to INC setup
INC LOW period
ns
µs
t
µs
IL
IH
IC
t
t
INC HIGH period
1
µs
INC inactive to CS inactive
CS deselect time (STORE)
CS deselect time (NO STORE)
1
µs
t
t
20
100
ms
ns
CPH
CPH
t
INC to V change
W
1
5
5
µs
IW
t
INC cycle time
4
µs
CYC
t , t (Note 7)
INC input rise and fall time
Power-up to wiper stable
500
5
µs
R
F
t
(Note 7)
µs
PU
t
V
(Note 7)
V
power-up rate
0.2
50
10
V/ms
ms
R
CC
CC
Store cycle
t
WR
NOTES:
6. Typical values are for T = 25°C and nominal supply voltage.
A
7. This parameter is not 100% tested.
spec is always in effect. In order to prevent unwanted tap
position changes, or an inadvertent store, bring the CS and
Power-Up and -Down Requirements
The recommended power-up sequence is to apply V /V
CC SS
INC high before or concurrently with the V
up.
pin on power-
CC
first, then the potentiometer voltages. During power-up, the
data sheet parameters for the DCP do not fully apply until 1
millisecond after V
reaches its final value. The V ramp
CC
CC
AC Timing
CS
t
CYC
t
t
t
t
t
CPH
CI
IL
IH
IC
90%
90%
INC
U/D
10%
t
t
t
t
R
ID
DI
F
t
IW
(SEE NOTE)
MI
V
W
NOTE:
MI IN THE AC TIMING DIAGRAM REFERS TO THE MINIMUM INCREMENTAL CHANGE IN THE V OUTPUT DUE TO A CHANGE IN THE WIPER POSITION.
W
FN8177.2
8
September 9, 2005
X9313
computer-based digital controls, and (3) the retentivity of
nonvolatile memory used for the storage of multiple
potentiometer settings or data.
Applications Information
Electronic digitally controlled potentiometers (XDCP) provide
three powerful application advantages; (1) the variability and
reliability of a solid-state potentiometer, (2) the flexibility of
Basic Configurations of Electronic Potentiometers
V
R
V
R
V
H
L
V
/R
W
W
V
I
THREE-TERMINAL POTENTIOMETER;
VARIABLE VOLTAGE DIVIDER
TWO-TERMINAL VARIABLE RESISTOR;
VARIABLE CURRENT
Basic Circuits
BUFFERED REFERENCE VOLTAGE
CASCADING TECHNIQUES
+V
NONINVERTING AMPLIFIER
R
+V
+V
+5V
1
LM308A
V
+V
+
–
S
+5V
V
O
V
W
OP-07
+
–
V
X
REF
-5V
V
/R
W
V
W
OUT
R
2
-5V
R
1
V
W
V
= V /R
W W
OUT
(a)
(b)
V
= (1 + R / R )V
2 1 S
O
VOLTAGE REGULATOR
OFFSET VOLTAGE ADJUSTMENT
COMPARATOR WITH HYSTERESIS
R
R
2
1
LT311A
–
V
S
V
S
V
V
(REG)
V
O
317
IN
O
+
2
100kΩ
R
1
–
+
V
O
TL072
I
adj
R
R
1
10kΩ
10kΩ
R
2
10kΩ
V
V
= [R / (R + R )] V (max)
1 1 2 O
UL
LL
= [R / (R + R )] V (min)
1
1
2
O
V
(REG) = 1.25V (1 + R / R ) + I
R
ADJ 2
O
2
1
+12V
-12V
(for additional circuits see AN115)
FN8177.2
9
September 9, 2005
X9313
Packaging Information
8-LEAD MINIATURE SMALL OUTLINE GULL WING PACKAGE TYPE M
0.118 ± 0.002
(3.00 ± 0.05)
0.012 + 0.006 / -0.002
0.0256 (0.65) Typ.
(0.30 + 0.15 / -0.05)
R 0.014 (0.36)
0.118 ± 0.002
(3.00 ± 0.05)
0.030 (0.76)
0.0216 (0.55)
7° Typ.
0.036 (0.91)
0.032 (0.81)
0.040 ± 0.002
(1.02 ± 0.05)
0.008 (0.20)
0.004 (0.10)
0.0256" Typical
0.025"
Typical
0.150 (3.81)
0.007 (0.18)
0.005 (0.13)
Ref.
0.193 (4.90)
Ref.
0.220"
0.020"
Typical
8 Places
FOOTPRINT
NOTE ALL DIMENSIONS IN INCHES AND (MILLIMETERS
FN8177.2
10
September 9, 2005
X9313
Packaging Information
8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S
0.150 (3.80) 0.228 (5.80)
0.158 (4.00) 0.244 (6.20)
Pin 1 Index
Pin 1
0.014 (0.35)
0.019 (0.49)
0.188 (4.78)
0.197 (5.00)
(4X) 7°
0.053 (1.35)
0.069 (1.75)
0.004 (0.19)
0.050 (1.27)
0.010 (0.25)
0.010 (0.25)
0.020 (0.50)
0.050"Typical
X 45°
0.050"
Typical
0° - 8°
0.0075 (0.19)
0.010 (0.25)
0.250"
0.016 (0.410)
0.037 (0.937)
0.030"
Typical
8 Places
FOOTPRINT
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8177.2
11
September 9, 2005
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