X93254UV14I-3 [INTERSIL]

Dual Digitally Controlled Potentiometers; 双数字电位器
X93254UV14I-3
型号: X93254UV14I-3
厂家: Intersil    Intersil
描述:

Dual Digitally Controlled Potentiometers
双数字电位器

电位器
文件: 总10页 (文件大小:208K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
X93254  
®
Data Sheet  
March 1, 2005  
FN8186.0  
DESCRIPTION  
Dual Digitally Controlled Potentiometers  
(XDCPs™)  
The Intersil X93254 is a dual digitally controlled poten-  
tiometer (XDCP). The device consists of two resistor  
arrays, wiper switches, a control section, and nonvola-  
tile memory. The wiper positions are controlled by indi-  
vidual Up/Down interfaces.  
FEATURES  
• Dual solid-state potentiometers  
• Independent Up/Down interfaces  
• 32 wiper tap points per potentiometer  
—Wiper position stored in nonvolatile memory  
and recalled on power-up  
• 31 resistive elements per potentiometer  
—Temperature compensated  
—Maximum resistance tolerance of ± 30%  
A potentiometer is implemented by a resistor array  
composed of 31 resistive elements and a wiper switch-  
ing network. The position of each wiper element is  
controlled by a set of independent CS, U/D, and INC  
inputs. The position of the wiper can be stored in non-  
volatile memory and then be recalled upon a subse-  
quent power-up operation.  
—Terminal voltage, 0 to V  
• Low power CMOS  
CC  
—V  
= 3V±10%  
Each potentiometer is connected as a two-terminal  
variable resistor and can be used in a wide variety of  
applications including:  
CC  
—Active current, 250µA max  
—Standby current, 1µA max  
• High reliability  
—Endurance 200,000 data changes per bit  
—Register data retention, 100 years  
– Bias and Gain control  
– LCD Contrast Adjustment  
• R  
value = 50kΩ  
TOTAL  
• 14-lead TSSOP package  
BLOCK DIAGRAM  
V
(Supply Voltage)  
CC  
R
H1  
30K  
30K  
Up/Down  
(U/D )  
1
R
L1  
Control  
and  
Memory  
Increment  
(INC )  
1
R
H2  
Device Select  
(CS )  
1
Up/Down  
(U/D )  
2
R
L2  
Control  
and  
Memory  
Increment  
(INC )  
2
Device Select  
(CS )  
2
V
(Ground)  
SS  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
X93254  
PIN CONFIGURATION  
TSSOP  
DNC  
*
R
H1  
14  
13  
12  
1
2
3
R
U/D  
L1  
1
X93254  
CS  
INC  
V
1
2
2
1
INC  
U/D  
R
CC  
11  
10  
9
4
5
CS  
2
R
6
7
L2  
H2  
SS  
8
V
DNC  
*
*Do not connect.  
X93254 ORDERING CODES  
Ordering Number  
RTOTAL  
Package  
Temperature Range  
X93254UV14I-3  
50kΩ  
14-lead TSSOP package  
-40°C to +85°C  
PIN DESCRIPTIONS  
TSSOP Symbol  
Description  
1
2
DNC  
Do Not Connect.  
R
Low Terminal 1.  
L1  
3
4
5
6
7
CS  
Chip Select 1.  
Increment 2.  
Up/Down 2.  
High Terminal 2.  
Ground.  
1
INC  
U/D  
2
2
R
H2  
V
SS  
8
9
DNC  
Do Not Connect.  
R
Low Terminal 2.  
L2  
10  
11  
12  
13  
14  
CS  
Chip Select 2.  
Supply Voltage.  
Increment 1.  
2
V
CC  
INC  
U/D  
1
1
Up/Down 1.  
R
High Terminal 1.  
H1  
FN8186.0  
March 1, 2005  
2
X93254  
ABSOLUTE MAXIMUM RATINGS  
COMMENT  
Temperature under bias.................... -65°C to +135°C  
Storage temperature ......................... -65°C to +150°C  
Stresses above those listed under “Absolute Maximum  
Ratings” may cause permanent damage to the device.  
This is a stress rating only; the functional operation of  
the device (at these or any other conditions above  
those listed in the operational sections of this specifi-  
cation) is not implied. Exposure to absolute maximum  
rating conditions for extended periods may affect  
device reliability.  
Voltage on CS, INC, U/D, R , R and V  
H
L
CC  
with respect to V .............................. -1V to +6.5V  
SS  
Lead temperature (soldering 10 seconds)......... 300°C  
Maximum reflow temperature (40 seconds) ...... 240°C  
Maximum resistor current.....................................2mA  
RECOMMENDED OPERATING CONDITIONS  
Temperature  
Min.  
Max.  
Supply Voltage (V  
)
Limits  
CC  
(7)  
Industrial  
-40°C  
+85°C  
X93254  
3V ± 10%  
POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)  
Limits  
Symbol  
Parameter  
Min.  
37.5  
0
Typ.  
Max.  
Unit  
kΩ  
V
Test Conditions/Notes  
R
End to end resistance  
50  
62.5  
(5)  
(5)  
TOT  
V
R , R terminal voltages  
V
R
H
L
CC  
1
(6)  
(5)  
Power rating  
Noise  
mW  
dBV  
R
= 50kΩ  
TOTAL  
(6)  
(5)  
-120  
3
Ref: 1kHz  
(5) (6)  
(5) (6)  
(5)  
R
Wiper Resistance  
Wiper Current  
Resolution  
1000  
0.6  
W
I
mA  
%
W
(1)  
(3)  
(5)  
Absolute linearity  
(2)  
±1  
MI  
MI  
V
V
- V  
H(n)(actual)  
H(n)(expected)  
(5)  
(3)  
Relative linearity  
temperature coefficient  
±0.5  
- [V  
H(n+1)  
H(n)+MI  
R
±35  
ppm/°C (5) (6)  
pF  
TOTAL  
(5)  
C /C /C  
W
Potentiometer capacitances  
10/10/25  
See circuit #2  
H
L
Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (V  
Maximum. n = 1 .. 29 only  
(actual) - V  
(expected)) = ±1 Ml  
H(n)  
H(n)  
(2) Relative linearity is a measure of the error in step size between taps = V  
- [V  
+ Ml] = ±0.5 Ml, n = 1 .. 29 only.  
H(n)  
H(n+1)  
(3) 1 Ml = Minimum Increment = R  
/31.  
TOT  
(4) Typical values are for T = 25°C and nominal supply voltage.  
A
(5) This parameter only applies to a single potentiometer.  
(6) This parameter is guaranteed by characterization.  
(7) When performing multiple write operations, V  
must not decrease by more than 150mV from its initial value.  
CC  
FN8186.0  
3
March 1, 2005  
X93254  
D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.)  
Limits  
(4)  
Symbol  
Parameter  
Min.  
Typ.  
Max.  
Unit  
Test Conditions  
I
V
DCP  
active current (Increment) per  
50  
250  
µA  
CS = V , U/D = V or V and  
CC  
CC1  
IL  
IL  
IH  
(5)  
INC = 0.4V @ max. t  
CY  
I
V
active current (Store)  
600  
1
µA  
µA  
CS = V , U/D = V or V and  
IH IL IH  
CC  
CC2  
(5)  
INC = V @ max. t  
IH WR  
(EEPROM Store) per DCP  
I
Standby supply current  
CS = V – 0.3V, U/D and  
CC  
SB  
INC = V or V  
- 0.3V  
SS  
CC  
(5)  
I
I
I
CS or CS  
±1  
150  
±1  
µA  
µA  
µA  
V
V
V
= V  
CC  
LI  
LI  
LI  
1
2
2
IN  
(5)  
CS or CS  
60  
100  
= 3V, CS = 0  
CC  
1
(5)  
INC , INC , U/D , U/D input  
= V to V  
SS CC  
1
2
1
2
IN  
leakage current  
V
CS , CS , INC , INC , U/D ,  
V
x 0.7  
V + 0.5  
CC  
V
V
(5)  
(5)  
IH  
1
2
1
2
1
CC  
U/D input HIGH voltage  
2
V
CS , CS , INC , INC , U/D ,  
-0.5  
V
x 0.1  
IL  
1
2
1
2
1
CC  
U/D input HIGH voltage  
2
C
CS , CS , INC , INC , U/D ,  
10  
pF  
V
= 3V, V = V  
IN  
,
SS  
IN  
1
2
1
2
1
CC  
(6)  
U/D input capacitance  
T = 25°C, f = 1MHz  
2
A
ENDURANCE AND DATA RETENTION  
Parameter  
Minimum endurance  
Data retention  
Min.  
Unit  
200,000  
100  
Data changes per bit  
Years  
Test Circuit #1  
Circuit #2 SPICE Macro Model  
Test Point  
V /R  
H
H
R
TOTAL  
R
R
L
H
C
L
C
W
C
H
10pF  
25pF  
10pF  
A.C. CONDITIONS OF TEST  
Input pulse levels  
0V to 3V  
Input rise and fall times  
Input reference levels  
10ns  
1.5V  
FN8186.0  
March 1, 2005  
4
X93254  
A.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified. In the  
table, CS, INC, U/D, R and R are used to refer to either CS or CS , etc.)  
H
L
1
2
Limits  
(6)  
Typ.  
Symbol  
Parameter  
Min.  
100  
100  
100  
1
Max.  
Unit  
ns  
t
t
CS to INC setup  
Cl  
lD  
DI  
INC HIGH to U/D change  
U/D to INC setup  
ns  
t
ns  
t
INC LOW period  
µs  
lL  
lH  
lC  
t
t
INC HIGH period  
1
µs  
INC Inactive to CS inactive  
CS Deselect time (NO STORE)  
CS Deselect time (STORE)  
INC cycle time  
1
µs  
t
t
t
250  
10  
2
ns  
CPH  
CPH  
CYC  
ms  
µs  
(6)  
t
t
INC input rise and fall time  
500  
10,000  
10  
µs  
,
R
F
(6)  
t
V
V
CC  
power-up rate  
1
V/ms  
ms  
R
CC  
t
Store cycle  
5
WR  
POWER-UP AND DOWN REQUIREMENTS  
There are no restrictions on the power-up or power-down conditions of V  
and the voltages applied to the potenti-  
V V . The V ramp  
CC  
is always more positive than or equal to V and V , i.e., V  
ometer pins provided that V  
CC  
H
L
CC  
H, L  
CC  
rate spec is always in effect.  
A.C. TIMING (In the diagram, CS, INC, U/D, R and R are used to refer to either CS or CS , etc.)  
H
L
1
2
CS  
t
CYC  
(Store)  
t
t
t
t
t
CI  
IL  
IH  
IC  
CPH  
90%  
90%  
INC  
U/D  
10%  
t
t
t
t
R
ID  
DI  
F
FN8186.0  
5
March 1, 2005  
X93254  
PIN DESCRIPTIONS  
(In the text, CS, INC, U/D, R and R are used to refer  
If the wiper is moved several positions, multiple taps  
are connected to the wiper for t (INC to V  
change). The 2-terminal resistance value for the  
device can temporarily change by a significant amount  
if the wiper is moved several positions.  
IW  
W
H
L
to either CS or CS , etc. Note: These signals can be  
1
2
applied independently or at the same time.)  
R and R  
When the device is powered-down, the last wiper posi-  
tion stored will be maintained in the nonvolatile mem-  
ory for each potentiometer. When power is restored,  
the contents of the memory are recalled and each  
wiper is set to the value last stored.  
H
L
The R and R pins of the X93254 are equivalent to  
H
L
the fixed terminals of a mechanical potentiometer. The  
minimum voltage is V and the maximum is V . The  
SS  
CC  
terminology of R and R references the relative posi-  
H
L
tion of the terminal in relation to wiper movement  
direction selected by the U/D input per potentiometer.  
INSTRUCTIONS AND PROGRAMMING  
The INC, U/D and CS inputs control the movement of  
the wiper along the resistor array. With CS set LOW  
the potentiometer is selected and enabled to respond  
to the U/D and INC inputs. HIGH to LOW transitions  
on INC will increment or decrement (depending on the  
state of the U/D input) a five bit counter. The output of  
this counter is decoded to select one of thirty two wiper  
positions along the resistive array.  
Up/Down (U/D)  
The U/D input controls the direction of a single potenti-  
ometer’s wiper movement and whether the counter is  
incremented or decremented.  
Increment (INC)  
The INC input is negative-edge triggered. Toggling  
INC will move the wiper and either increment or decre-  
ment the corresponding potentiometer’s counter in the  
direction indicated by the logic level on the corre-  
sponding potentiometer’s U/D input.  
The value of the counter is stored in nonvolatile mem-  
ory whenever each CS transitions HIGH while the INC  
input is also HIGH. In order to avoid an accidental store  
during power-up, each CS must go HIGH with V  
dur-  
CC  
ing initial power-up. When left open, each CS pin is  
internally pulled up to V by an internal 30K resistor.  
Chip Select (CS)  
CC  
A potentiometer is selected when the corresponding CS  
input is LOW. Its current counter value is stored in non-  
volatile memory when the corresponding CS is returned  
HIGH while the corresponding INC input is also HIGH.  
After the store operation is complete the affected poten-  
tiometer will be placed in the low power standby mode  
until the potentiometer is selected once again.  
The system may select the X93254, move any wiper  
and deselect the device without having to store the lat-  
est wiper position in nonvolatile memory. After the wiper  
movement is performed as described above and once  
the new position is reached, the system must keep INC  
LOW while taking CS HIGH. The new wiper position will  
be maintained until changed by the system or until a  
power-up/down cycle recalled the previously stored  
data. In order to recall the stored position of the wiper  
on power-up, the CS pin must be held HIGH.  
PRINCIPLES OF OPERATION  
There are multiple sections for each potentiometer in  
the X93254: an input control, a counter and decode  
section; the nonvolatile memory; and a resistor array.  
Each input control section operates just like an  
up/down counter. The output of this counter is  
decoded to turn on a single electronic switch connect-  
ing a point on the resistor array to the wiper output.  
Under the proper conditions the contents of the  
counter can be stored in nonvolatile memory and  
retained for future use. Each resistor array is com-  
prised of 31 individual resistors connected in series. At  
either end of the array and between each resistor is an  
electronic switch that transfers the connection at that  
point to the wiper.  
This procedure allows the system to always power-up  
to a preset value stored in nonvolatile memory; then  
during system operation minor adjustments could be  
made. The adjustments might be based on user pref-  
erence, system parameter changes due to tempera-  
ture drift, or other system trim requirements.  
Each wiper, when at either fixed terminal, acts like its  
mechanical equivalent and does not move beyond the  
last position. That is, the counter does not wrap  
around when clocked to either extreme.  
FN8186.0  
6
March 1, 2005  
X93254  
The state of U/D may be changed while CS remains  
SYMBOL TABLE  
LOW. This allows the host system to enable the  
device and then move each wiper up and down until  
the proper trim is attained.  
WAVEFORM  
INPUTS  
OUTPUTS  
Must be  
steady  
Will be  
steady  
MODE SELECTION  
CS  
L
INC U/D  
Mode  
May change  
from Low to  
High  
Will change  
from Low to  
High  
H
L
Wiper Up  
May change  
from High to  
Low  
Will change  
from High to  
Low  
L
Wiper Down  
H
X
L
L
L
X
X
X
H
L
Store Wiper Position  
Don’t Care:  
Changes  
Allowed  
Changing:  
State Not  
Known  
H
Standby Current  
No Store, Return to Standby  
Wiper Up (not recommended)  
Wiper Down (not recommended)  
N/A  
Center Line  
is High  
Impedance  
FN8186.0  
7
March 1, 2005  
X93254  
APPLICATIONS INFORMATION  
Electronic digitally controlled (XDCP) potentiometers provide three powerful application advantages; (1) the  
variability and reliability of a solid-state potentiometer (2) the flexibility of computer-based digital controls, and  
(3) the retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data.  
V
R
I
Two terminal variable resistor.  
Low Voltage High Impedance Instrumentation Amplifier  
3.3V  
10K  
+
+
10K  
50K  
U1A  
50K  
+
V
U1C  
OUT  
V
1
IN  
/2 X93254 (R  
)
TOTAL  
50K  
50K  
10K  
50K  
Gain =  
1 +  
)
(
R
10K  
TOTAL  
U1B  
+
U1 = LT1467  
10K  
50K  
Micro-Power LCD Contrast Control  
3.3V  
300K  
240K  
100K  
3.3V  
100K  
+
1 +  
= -3.88  
100K  
V
V
)
(
OUT  
50K + R  
TOTAL  
U1A  
+
= -2.75V to -11.6V  
OUT  
U1B  
U1 = LMC6042  
100K  
–12V  
50K  
1
/2 X93254 (R  
)
TOTAL  
FN8186.0  
8
March 1, 2005  
X93254  
APPLICATIONS INFORMATION (Continued)  
Single Supply Variable Gain Amplifier  
3.3V  
20K  
3.3V  
+
20K  
U1  
V
OUT  
R
TOTAL  
10K  
Gain =  
U1 = LMC6042  
V
IN  
1
/2 X93254  
(R  
10K  
)
TOTAL  
FN8186.0  
9
March 1, 2005  
X93254  
PACKAGING INFORMATION  
14-Lead Plastic, TSSOP, Package Code V14  
.025 (.65) BSC  
.169 (4.3)  
.177 (4.5)  
.252 (6.4) BSC  
.193 (4.9)  
.200 (5.1)  
.041 (1.05)  
.0075 (.19)  
.0118 (.30)  
.002 (.05)  
.006 (.15)  
.010 (.25)  
Gage Plane  
0° - 8°  
Seating Plane  
.019 (.50)  
.029 (.75)  
Detail A (20X)  
.031 (.80)  
.041 (1.05)  
See Detail “A”  
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN8186.0  
10  
March 1, 2005  

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