IRAMS10UP60APBF [INFINEON]
Plug N Drive⑩ Integrated Power Module for Appliance Motor Drive; 插销N Drive⑩集成电源模块为家电电机驱动器
| 型号： | IRAMS10UP60APBF |
| 厂家： | 
Infineon |
| 描述： | Plug N Drive⑩ Integrated Power Module for Appliance Motor Drive |
| 文件： | 总17页 (文件大小：412K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-94640 RevG
IRAMS10UP60APbF
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1
RevG,.100507
IRAMS10UP60APbF
Internal Electrical Schematic - IRAMS10UP60APbF
V+(10)
VRU (12)
VRV (13)
VRW (14)
Rg1
Rg3
Rg5
VB1 (7)
U, VS1 (8)
VB2 (4)
V, VS2 (5)
VB3 (1)
W, VS3 (2)
Rg2
22 21 20 19
VB2 HO2 VS2 VB3 HO3 VS3
18 17
23 VS1
LO1 16
LO2 15
LO3 14
24 HO1
25 VB1
1 VCC
Rg4
R3
Rg6
Driver IC
2 HIN1
3 HIN2
4 HIN3
HIN1 (15)
HIN2 (16)
HIN3 (17)
LIN2 LIN3
F
8
ITRIP EN RCIN VSS COM
5 LIN1
6
7
9
10
11
12 13
LIN1 (18)
LIN2 (19)
R1
LIN3 (20)
T/ITRIP (21)
R2
RT
THERMISTOR
C
VDD (22)
VSS (23)
2
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IRAMS10UP60APbF
Inverter Section Electrical Characteristics @ TJ = 25°C
Symbol
Parameter
Min
Typ
Max
Units Conditions
Collector-to-Emitter Breakdown
Voltage
V(BR)CES
600
---
---
V
V/°C
V
VIN=0V, IC=20µA
Temperature Coeff. Of
Breakdown Voltage
VIN=0V, IC=1.0mA
(25°C - 150°C)
∆V(BR)CES / ∆T
VCE(ON)
---
0.57
---
---
---
---
---
1.7
2.0
5
2.0
2.4
15
IC=5A TJ=25°C, VDD=15V
IC=5A TJ=150°C
VIN=5V, V+=600V
VIN=5V, V+=600V, TJ=150°C
Collector-to-Emitter Saturation
Voltage
Zero Gate Voltage Collector
Current-to-Emitter
ICES
µA
10
40
Zero Gate Phase-to-Phase
Current
Ilk_module
VFM
--
--
50
µA
VIN=5V, V+=600V
---
---
1.8
1.3
2.35
1.7
IC=5A
Diode Forward Voltage Drop
V
IC=5A, TJ=150°C
Inverter Section Switching Characteristics
Conditions
IC=5A, V+=400V
VDD=15V, L=1mH
Symbol
Parameter
Min
---
---
---
---
---
---
Typ
200
75
Max
235
100
335
360
165
525
Units
Eon
Turn-On Switching Loss
Turn-Off Switching Loss
Total Switching Loss
Turn-on Swtiching Loss
Turn-off Switching Loss
Total Switching Loss
Eoff
µJ
Etot
275
300
135
435
TJ=25°C
TJ=150°C
See CT1
Eon
Eoff
µJ
Energy losses include "tail" and
diode reverse recovery
Etot
Diode Reverse Recovery
energy
Erec
trr
---
---
30
40
µJ
TJ=150°C, V+ =400V VDD=15V,
IF=5A, L=1mH
Diode Reverse Recovery time
100
145
ns
TJ=150°C, IC=5A, VP=600V
V+=480V, VDD=+15V to 0V
See CT3
Reverse Bias Safe Operating
Area
FULL SQUARE
---
RBSOA
SCSOA
TJ=150°C, VP=600V,
V+=360V,
Short Circuit Safe Operating
Area
10
---
µs
VDD=+15V to 0V
See CT2
Thermal Resistance
Symbol
Parameter
Min
Typ
Max
Units Conditions
Junction to case thermal
resistance, each IGBT under
inverter operation.
Rth(J-C)
---
4.2
4.7
°C/W
Flat, greased surface.
Heatsink compound thermal
conductivity - 1W/mK
Junction to case thermal
resistance, each Diode under
inverter operation.
Rth(J-C)
---
---
5.5
0.1
6.5
---
°C/W
°C/W
Thermal Resistance case to
sink
Rth(C-S)
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3
IRAMS10UP60APbF
Absolute Maximum Ratings Driver Function
Absolute Maximum Ratings indicate substaines limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced toVSS (Note 1)
Symbol
VS1,2,3
VB1,2,3
VDD
Definition
Min
-0.3
-0.3
-0.3
-0.3
-40
Max
600
20
Units
V
V
High Side offset voltage
High Side floating supply voltage
Low Side and logic fixed supply voltage
Input voltage LIN, HIN, T/ITRIP
Juction Temperature
20
V
VIN
7
V
TJ
150
°C
Recommended Operating Conditions Driver Function
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. All voltages are absolute referenced to VSS. The VS offset is tested with all supplies biased
at 15V differential (Note 1). All input pin (VIN ) and ITRIP are clamped with a 5.2V zener diode and pull-up resistor to
VDD
Symbol
VB1,2,3
VS1,2,3
VDD
Definition
Min
VS+12
Note 2
12
Max
VS+20
450
Units
High side floating supply voltage
High side floating supply offset voltage
Low side and logic fixed supply voltage
T/ITRIP input voltage
V
20
V
V
VITRIP
VIN
VSS
VSS+5
VSS+5
Logic input voltage LIN, HIN
VSS
Static Electrical Characteristics Driver Function
VBIAS (VCC, VBS1,2,3)=15V, unless otherwise specified. The VIN and IIN parameters are referenced to VSS and are appli-
cable to all six channels. (Note 1)
Symbol
VIN,th+
Definition
Positive going input threshold
Negative going input threshold
Min
3.0
---
Typ
---
Max
---
Units
V
V
VIN,th-
---
0.8
VCCUV+
VBSUV+
VCC and VBS supply undervoltage
Positive going threshold
10.6
10.4
---
11.1
10.9
0.2
11.6
11.4
---
V
V
V
VCCUV-
VBSUV-
VCC and VBS supply undervoltage
Negative going threshold
VCCUVH
VBSUVH
VCC and VBS supply undervoltage
Ilockout hysteresis
IQBS
IQCC
ILK
Quiescent VBS supply current
---
---
70
1.6
---
120
2.3
µA
mA
µA
µA
µA
V
Quiscent VCC supply current
Offset Supply Leakage Current
Input bias current (OUT=LO)
Input bias current (OUT=HI)
---
50
IIN+
IIN+
---
100
200
4.3
220
300
4.75
---
V(ITRIP
)
ITRIP threshold Voltage (OUT=HI or OUT=LO)
3.85
4
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IRAMS10UP60APbF
Dynamic Electrical Characteristics
VDD=VBS=VBIAS=15V, Io=1A, VD=9V, PWMIN=2kHz, VIN_ON=VIN_th+, VIN_OFF=VIN_th-
TA=25°C, unless otherwise specified
Symbol
TON
Definition
Min
Typ
470
615
300
750
9
Max
Units
ns
Input to output propagation turn-on delay time (see fig.11)
Input to output propagation turn-off delay time (see fig. 11)
Dead Time
-
-
-
-
-
-
-
-
-
-
TOFF
ns
DT
ns
I/TTrip
TFCLTRL
T/ITrip to six switch to turn-off propagation delay (see fig. 2)
Post ITrip to six switch to turn-off clear time (see fig. 2)
ns
ms
InternalNTC-ThermistorCharacteristics
Parameter
Typ
100 +/- 5%
2.522 + 17.3 % /- 14.9%
4250 +/- 3%
-40 / 125
Units
kΩ
Conditions
TC = 25°C
R25
Resistance
R125
B
Resistance
kΩ
TC = 125°C
R2 = R1e [B(1/T2 - 1/T1)]
B-Constant (25-50°C)
k
Temperature Range
°C
Typ. Dissipation constant
1
mW/°C
TC = 25°C
Note 1: For more details, see IR21365 data sheet
Note 2: Logic operational for Vs from V--5V to V-+600V. Logic stata held for VS from V--5V to V--VBS. (Please refer to
DT97-3 for more details)
Thermistor Built-in IRAMS10UP60APbF
VCC (22)
NTC
IR21365
12K
T/ITRIP (21)
4.3k
VSS (23)
Note 3: The Maximum recommended sense voltage at the T/ITRIP terminal under normal operating conditions is 3.3V.
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5
IRAMS10UP60APbF
Figure1. Input/Output Timing Diagram
HIN1,2,3
LIN1,2,3
HO1,2,3
LO1,2,3
Itrip
U,V,W
Note 4: The shaded area indicates that both high-side and low-side switches are off and therefore the half-
bridge output voltage would be determined by the direction of current flow in the load.
V+
HIN1,2,3 LIN1,2,3
Itrip
U,V,W
0
0
0
1
0
1
1
X
1
0
1
X
Vbus
0
X
X
Ho
Lo
Hin1,2,3
(15,16,17)
U,V,W
IC
Driver
(8,5,2)
Lin1,2,3
(18,19,20)
6
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IRAMS10UP60APbF
Figure 2. T/ITrip Timing Waveform
HIN1,2,3
LIN1,2,3
50%
T/Itrip
U,V,W
50%
tfltclr
Note 5: The shaded area indicates that both high-side and low-side switches are off and therefore the half-
bridge output voltage would be determined by the direction of current flow in the load.
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7
IRAMS10UP60APbF
Module Pin-Out Description
Pin
1
Name
VB3
Description
High Side Floating Supply Voltage 3
Output 3 - High Side Floating Supply Offset Voltage
none
2
W,VS3
na
3
4
VB2
High Side Floating Supply voltage 2
Output 2 - High Side Floating Supply Offset Voltage
none
5
V,VS2
na
6
7
VB1
High Side Floating Supply voltage 1
Output 1 - High Side Floating Supply Offset Voltage
none
8
U,VS1
na
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
V+
Positive Bus Input Voltage
na
none
LE1
Low Side Emitter Connection - Phase 1
Low Side Emitter Connection - Phase 2
Low Side Emitter Connection - Phase 3
Logic Input High Side Gate Driver - Phase 1
Logic Input High Side Gate Driver - Phase 2
Logic Input High Side Gate Driver - Phase 3
Logic Input Low Side Gate Driver - Phase 1
Logic Input Low Side Gate Driver - Phase 2
Logic Input Low Side Gate Driver - Phase 3
Temperature Monitor and Shut-down Pin
+15V Main Supply
LE2
LE3
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
T/Itrip
VCC
VSS
Negative Main Supply
8
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IRAMS10UP60APbF
Typical Application Connection IRAMS10UP60APbF
VBW
VSW
U
BOOT-STRAP
CAPACITORS
VBV
VSV
V
3-ph AC
MOTOR
CURRENT SENSING CAN USE A
SINGLE SENSE RESISTOR OR PHASE
LEG SENSING AS SHOWN
VBU
VSU
W
V+
DC BUS
CAPACITORS
LeU
LeV
PHASE LEG
CURRENT
SENSE
LeW
HINU
HINV
HINW
LINU
LINV
LINW
Driver IC
CONTROLLER
T/ITRIP
VDD(15 V)
VSS
5k
TEMP
SENSE
6.8K
1m
3.3 V
NTC
10.2k
0.1
m
10m
12k
O/C
SENSE
(ACTIVE LOW)
1. Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible to reduce ringing and
EMI problems. Additional high frequency ceramic capacitor mounted close to the module pins will further improve perfor-
mance.
2. In order to provide good decoupling between VCC-Gnd and VB-VSS terminals, the capacitors shown connected be-
tween these terminals should be located very close to the module pins. Additional high frequency capacitors, typically
0.1µF, are strongly recommended.
3. Value of the boot-strap capacitors depends upon the switching frequency. Their selection should be made based on
IR design tip DN 98-2a, application note AN-1044 or Figure 9.
4. Low inductance shunt resistors shuld be used for phase leg current sensing. Similarly, the length of the traces be-
tween pins 12, 13 and 14 to the corrisponding shunt resistors should be kept as small as possible.
5. Over-current sense signal can be obtained from external hardware detecting excessive instantaneous current in in-
verter.
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9
IRAMS10UP60APbF
10
9
8
7
6
5
4
3
2
1
0
Tc=100°C
Tc=110°C
Tc=120°C
0
2
4
6
8
10
PWM Switching Frequency (kHz)
Figure 3. Maximum sinusoidal phase current as function of switching frequency
VBUS=400V, Tj=150°C, Modulation Depth=0.8, PF=0.6
12
14
16
18
20
7
6
5
4
3
2
1
0
Switching Frequency:
12 kHz
16 kHz
20 kHz
1
10
100
Motor Current Modulation Frequency (Hz)
Figure 4. Maximum sinusoidal phase current as function of modulation frequency
BUS=400V, Tj=150°C, Tc=100°C, Modulation Depth=0.8, PF=0.6
V
10
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IRAMS10UP60APbF
9
8
450
Current
Voltage
400
350
300
250
200
150
100
50
7
6
5
4
3
2
1
0
0
-1
-50
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
Time (µs)
Figure 5. IGBT Turn-on. Typical turn-on waveform @Tj=125°C, VBUS=400V
9
8
450
400
350
300
250
200
150
100
50
7
Current
Voltage
6
5
4
3
2
1
0
0
-1
-50
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
Time (µs)
Figure 6. IGBT Turn-off. Typical turn-off waveform @Tj=125°C, VBUS=400V
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11
IRAMS10UP60APbF
1000
Minimum
Nominal
100
10
1
Maximum
0
20
40
60
80
100
120
140
Temperature (°C)
Figure 7. Variation of thermistor resistance with temperature
4
3
2
1
0
Maximum
Nominal
Minimum
0
20
40
60
80
100
120
140
Thermistor Temperature (°C)
Figure 8. Variation of temperature sense voltage with thermistor tempera-
ture using external bias resistance of 4.3KΩ, VCC=15V
12
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IRAMS10UP60APbF
180
160
140
120
100
80
60
80
90
100
110
120
130
140
150
Thermistor Temperature (°C)
Figure 9. Estimated maximum IGBT junction temperature with thermistor
temperature
20
17.5
15
15
12.5
10
6.8
4.7
7.5
5
3.3
3
2.2
2.5
0
0
1.5
4.5
5
6
7.5
9
10.5
10
12
13.5
15
15
16.5
18
19.5
20
Switching Frequency (kHz)
Figure 10. Recommended minimum Bootstrap Capacitor value Vs Switching
Frequency
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13
IRAMS10UP60APbF
Figure 11. Switching Parameter Definitions
VCE
IC
IC
VCE
90% IC
50%
HIN/LIN
90% IC
HIN/LIN
50%
HIN/LIN
HIN/LIN
10%
VCE
10% IC
10% IC
TON
TOFF
tf
tr
Figure 11b. Input to Output
propagation turn-off delay timet
Figure 11a. Input to Output propaga-
tion turn-on delay time
IF
VCE
HIN/LIN
Irr
trr
Figure 11c. Diode Reverse Recovery
14
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IRAMS10UP60APbF
Vbus
5V
Ho
Hin1,2,3
Lin1,2,3
IC
Driver
U,V,W
Lo
Figure CT1. Switching Loss Circuit
Vbus
IN
PWM=4µs
Ho
Hin1,2,3
1k
10k
IC
Driver
VCC
Io
U,V,W
Io
Lin1,2,3
5VZD
Lo
VP=Peak Voltage on the IGBT die
IN
Figure CT2. S.C.SOA Circuit
Vbus
Ho
Lo
Hin1,2,3
10k
IN
1k
VCC
IC
Driver
U,V,W
Io
Io
5VZD
Lin1,2,3
VP=Peak Voltage on the IGBT die
IN
Figure CT3. R.B.SOA Circuit
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15
IRAMS10UP60APbF
PackageOutline
note 3
note 2
027-E2D24
note 1
Standard pin leadforming option
Notes:
Dimensions in mm
1 - Marking for pin 1 identification
2- Product Part Number
3- Lot and Date code marking
For mounting instruction see AN-1049
16
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IRAMS10UP60APbF
PackageOutline
note 3
note 2
027-E2D24
note 1
Pin leadforming option -2
Notes:
Dimensions in mm
1 - Marking for pin 1 identification
2- Product Part Number
3- Lot and Date code marking
Data and Specifications are subject to change without notice
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Rev G, 10/07
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17
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