IS61C1024AL-12TLI-TR [ISSI]
Standard SRAM, 128KX8, 12ns, CMOS, PDSO32, 8 X 20 MM, LEAD FREE, TSOP1-32;
| 型号： | IS61C1024AL-12TLI-TR |
| 厂家： | 
INTEGRATED SILICON SOLUTION, INC |
| 描述： | Standard SRAM, 128KX8, 12ns, CMOS, PDSO32, 8 X 20 MM, LEAD FREE, TSOP1-32 |
| 文件： | 总17页 (文件大小：106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
IS61C1024AL
IS64C1024AL
ISSI
128K x 8 HIGH-SPEED CMOS STATIC RAM
JANUARY2005
DESCRIPTION
FEATURES
TheISSIIS61C1024AL/IS64C1024ALisaveryhigh-speed,
lowpower,131,072-wordby8-bitCMOSstaticRAMs.They
are fabricated using ISSI's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields higher
performance and low power consumption devices.
• High-speed access time: 12, 15 ns
• Low active power: 160 mW (typical)
• Low standby power: 1000 µW (typical) CMOS
standby
• Output Enable (OE) and two Chip Enable
(CE1 and CE2) inputs for ease in applications
WhenCE1isHIGHorCE2isLOW(deselected),thedevice
assumes a standby mode at which the power dissipation
can be reduced by using CMOS input levels.
• Fully static operation: no clock or refresh
required
Easy memory expansion is provided by using two Chip
Enableinputs,CE1andCE2.TheactiveLOWWriteEnable
(WE) controls both writing and reading of the memory.
• TTL compatible inputs and outputs
• Single 5V (±10%) power supply
• Commercial, industrial, and automotive tempera-
ture ranges available
TheIS61C1024AL/IS64C1024ALisavailablein32-pin300-
mil SOJ, 32-pin 400-mil SOJ, 32-pin TSOP (Type I, 8x20),
and 32-pin sTSOP (Type I, 8 x 13.4) packages.
• Lead free available
FUNCTIONAL BLOCK DIAGRAM
128K x 8
MEMORY ARRAY
A0-A16
DECODER
VDD
GND
I/O
DATA
COLUMN I/O
I/O0-I/O7
CIRCUIT
CE1
CONTROL
CIRCUIT
CE2
OE
WE
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
1
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
PIN CONFIGURATION
32-Pin SOJ
PIN CONFIGURATION
32-Pin TSOP (Type 1) (T) and sTSOP (Type 1) (H)
NC
A16
A14
A12
A7
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VDD
A15
CE2
WE
A13
A8
A11
A9
A8
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
2
2
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
3
3
4
A13
WE
CE2
A15
VDD
NC
A16
A14
A12
A7
4
5
5
A6
6
6
A5
7
A9
7
A4
8
A11
OE
8
A3
9
9
A2
10
11
12
13
14
15
16
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
10
11
12
13
14
15
16
A1
A0
I/O0
I/O1
I/O2
GND
A6
A5
A4
A1
A2
A3
PIN DESCRIPTIONS
A0-A16
CE1
Address Inputs
Chip Enable 1 Input
Chip Enable 2 Input
Output Enable Input
Write Enable Input
Input/Output
CE2
OE
OPERATING RANGE (IS61C1024AL)
WE
Range
Commercial 0°C to +70°C
Industrial -40°Cto+85°C
AmbientTemperature
VDD
I/O0-I/O7
VDD
5V ± 10%
Power
5V ± 10%
GND
Ground
OPERATING RANGE (IS64C1024AL)
Range
AmbientTemperature
VDD
Automotive
-40°Cto+125°C
5V ± 10%
TRUTH TABLE
Mode
WE
CE1 CE2 OE
I/OOperation
VDD Current
Not Selected
(Power-down)
X
X
H
X
X
L
X
X
High-Z
High-Z
ISB1, ISB2
ISB1, ISB2
OutputDisabled
Read
H
H
L
L
L
L
H
H
H
H
L
High-Z
DOUT
DIN
ICC1,ICC2
ICC1,ICC2
ICC1,ICC2
Write
X
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
–0.5 to +7.0
–65 to +150
1.5
Unit
V
VTERM
TSTG
PT
Terminal Voltage with Respect to GND
StorageTemperature
°C
PowerDissipation
W
IOUT
DCOutputCurrent(LOW)
20
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the opera-
tional sections of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
CAPACITANCE(1,2)
Symbol
Parameter
Conditions
VIN = 0V
Max.
Unit
pF
CIN
InputCapacitance
OutputCapacitance
5
7
COUT
VOUT = 0V
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, VDD = 5.0V.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
TestConditions
Min.
2.4
Max.
Unit
V
VOH
VOL
VIH
VIL
ILI
OutputHIGHVoltage
VDD = Min., IOH = –4.0 mA
VDD = Min., IOL = 8.0 mA
—
0.4
OutputLOWVoltage
Input HIGH Voltage
Input LOW Voltage(1)
InputLeakage
—
V
2.2
VDD + 0.5
0.8
V
–0.3
V
GND ≤ VIN ≤ VDD
Com.
Ind.
Auto.
–1
–2
–5
1
2
5
µA
ILO
OutputLeakage
GND ≤ VOUT ≤ VDD
OutputsDisabled
Com.
Ind.
Auto.
–1
–2
–5
1
2
5
µA
Note:
1. VIL = –3.0V for pulse width less than 10 ns.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
3
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
IS61C1024AL/IS64C1024AL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-12 ns
-15 ns
Symbol Parameter
Test Conditions
Min.
Max.
Min. Max.
Unit
ICC1
ICC2
VDD Operating
Supply Current
VDD = VDD MAX., CE1 = VIL
IOUT = 0 mA, f = 0
Com.
Ind.
Auto.
—
—
35
40
mA
—
—
45
55
VDD Dynamic Operating
Supply Current
VDD = VDD MAX., CE1 = VIL
IOUT = 0 mA, f = fMAX
Com.
Ind.
—
—
45
50
mA
mA
µA
Auto.
typ.(2)
—
32
ISB1
ISB2
TTL Standby Current
(TTL Inputs)
VDD = VDD MAX.,
VIN = VIH or VIL
CE1 ≥ VIH, f = 0 or
Com.
Ind.
Auto.
—
—
1
1.5
—
—
2
CE2
≤ VIL, f = 0
CMOS Standby
Current (CMOS Inputs)
VDD = VDD MAX.,
CE1 ≥ VDD – 0.2V,
Com.
Ind.
—
—
400
450
CE2
VIN ≥ VDD – 0.2V, or
VIN 0.2V, f = 0
≤
0.2V
Auto.
500
typ.(2)
—
200
≤
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical Values are measured at VDD = 5V, TA = 25oC and not 100% tested.
4
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-12
-15
Symbol
tRC
Parameter
Min. Max.
Min. Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
12
—
3
—
12
—
12
12
6
15
—
3
—
15
—
15
15
7
tAA
Address Access Time
Output Hold Time
tOHA
tACE1
tACE2
tDOE
CE1 Access Time
—
—
—
0
—
—
—
0
CE2 Access Time
OE Access Time
(2)
tLZOE
OE to Low-Z Output
OE to High-Z Output
CE1 to Low-Z Output
CE2 to Low-Z Output
CE1 or CE2 to High-Z Output
CE1 or CE2 to Power-Up
CE1 or CE2 to Power-Down
—
6
—
6
(2)
tHZOE
0
0
tLZCE1(2)
tLZCE2(2)
2
—
—
7
2
—
—
8
2
2
(2)
tHZCE
0
0
(3)
tPU
0
—
12
0
—
12
(3)
tPD
—
—
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
levels of 0 to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
0V to 3.0V
3 ns
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
andReferenceLevel
1.5V
OutputLoad
See Figures 1 and 2
AC TEST LOADS
480 Ω
480 Ω
5V
5V
OUTPUT
OUTPUT
255 Ω
255 Ω
30 pF
Including
jig and
5 pF
Including
jig and
scope
scope
Figure 1
Figure 2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
5
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
AC WAVEFORMS
READ CYCLE NO. 1(1,2)
t
RC
ADDRESS
t
AA
t
OHA
t
OHA
DATA VALID
DOUT
PREVIOUS DATA VALID
READ1.eps
READ CYCLE NO. 2(1,3)
t
RC
ADDRESS
OE
t
AA
t
OHA
t
HZOE
t
DOE
t
LZOE
CE1
CE2
t
t
ACE1
ACE2
t
t
HZCE1
HZCE2
t
t
LZCE1
LZCE2
HIGH-Z
DOUT
DATA VALID
CE2_RD2.eps
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE1 = VIL, CE2 = VIH.
3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions.
6
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range, Standard and Low Power)
-12 ns
-15 ns
Symbol
tWC
Parameter
Min. Max.
Min. Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Cycle Time
12
10
10
10
0
—
—
—
—
—
—
—
—
—
7
15
12
12
12
0
—
—
—
—
—
—
—
—
—
7
tSCE1
tSCE2
tAW
CE1 to Write End
CE2 to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width
tHA
tSA
0
0
(3)
tPWE
10
7
12
10
0
tSD
tHD
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
0
(4)
tHZWE
—
2
—
2
(4)
tLZWE
—
—
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the Write.
3. Tested with OE HIGH.
4. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
7
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
AC WAVEFORMS
WRITE CYCLE NO. 1(CE1 Controlled, OE is HIGH or LOW) (1 )
t
WC
VALID ADDRESS
ADDRESS
CE1
t
t
SCE1
SCE2
t
SA
t
HA
CE2
t
AW
t
t
PWE1
PWE2
WE
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
DOUT
t
SD
t
HD
DATAIN VALID
DIN
CE2_WR1.eps
WRITE CYCLE NO. 2(OE is HIGH During Write Cycle) (1,2)
t
WC
ADDRESS
VALID ADDRESS
t
HA
OE
LOW
HIGH
CE1
CE2
t
AW
t
PWE1
WE
t
HZWE
t
LZWE
t
SA
HIGH-Z
DATA UNDEFINED
DOUT
t
SD
t
HD
DATAIN VALID
DIN
CE2_WR2.eps
Notes:
1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states
to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced
to the rising or falling edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if OE = VIH.
8
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
WRITE CYCLE NO. 3(OE is LOW During Write Cycle) (1)
t
WC
ADDRESS
VALID ADDRESS
t
HA
LOW
OE
CE1
LOW
HIGH
CE2
t
t
AW
t
PWE2
WE
t
SA
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
DOUT
t
SD
t
HD
DATAIN VALID
DIN
CE2_WR3.eps
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
9
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol Parameter
DD forDataRetention
TestCondition
Min. Typ.(1)
Max. Unit
VDR
V
SeeDataRetentionWaveform
2.0
5.5
V
IDR
DataRetentionCurrent
V
DD =2.0V,CE1≥VDD –0.2V
Com.
Ind.
—
—
200
—
400
450
µA
or CE2 ≤ 0.2V
VIN ≥ VDD – 0.2V, or VIN
≤
VSS + 0.2V
Auto.
—
0
—
500
—
t
SDR
DataRetentionSetupTime
RecoveryTime
SeeDataRetentionWaveform
SeeDataRetentionWaveform
ns
ns
tRDR
tRC
—
Note:
1. Typical Values are measured at VDD = 5V, T
= 25oC and not 100% tested.
A
DATA RETENTION WAVEFORM (CE1 Controlled)
t
Data Retention Mode
t
RDR
SDR
VDD
4.5V
2.2V
V
DR
CE1 ≥ VDD - 0.2V
CE1
GND
DATA RETENTION WAVEFORM (CE2 Controlled)
Data Retention Mode
VDD
CE2
4.5V
2.2V
t
t
RDR
SDR
V
DR
CE2 ≤ 0.2V
0.4V
GND
10
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
01/24/05
®
IS61C1024AL, IS64C1024AL
ISSI
ORDERING INFORMATION: IS61C1024AL
Commercial Range: 0°C to +70°C
Speed(ns)
Order Part No.
Package
12
IS61C1024AL-12J
IS61C1024AL-12T
300-mil Plastic SOJ
TSOP (Type I)
ORDERING INFORMATION: IS61C1024AL
Industrial Range: –40°C to +85°C
Speed(ns)
Order Part No.
Package
12
IS61C1024AL-12JI
IS61C1024AL-12JLI
IS61C1024AL-12KI
IS61C1024AL-12KLI
IS61C1024AL-12HI
IS61C1024AL-12TI
IS61C1024AL-12TLI
300-mil Plastic SOJ
300-mil Plastic SOJ, Lead-free
400-mil Plastic SOJ
400-mil Plastic SOJ, Lead-free
sTSOP (Type I)
TSOP (Type I)
TSOP (Type I), Lead-free
ORDERING INFORMATION: IS64C1024AL
Automotive Range: –40°C to +125°C
Speed(ns)
Order Part No.
Package
15
IS64C1024AL-15KA3
IS64C1024AL-15TA3
400-mil Plastic SOJ
TSOP (Type I)
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. B
11
01/24/05
®
PACKAGING INFORMATION
ISSI
Plastic STSOP - 32 pins
Package Code: H (Type I)
A2
A
A1
1
N
E
b
e
D1
D
S
SEATING PLANE
L
α
C
Plastic STSOP (H - Type I)
Millimeters
Inches
Notes:
Symbol Min Max
Min
Max
1. Controlling dimension: millimeters, unless otherwise
specified.
2. BSC = Basic lead spacing between centers.
3. Dimensions D1 and E do not include mold flash protru-
sions and should be measured from the bottom of the package
Ref. Std.
N
32
A
A1
A2
b
C
D
D1
E
e
—
0.05
1.25
—
—
0.049
—
0.041
0.009
.
4. Formed leads shall be planar with respect to one another
within 0.004 inches at the seating plane.
0.002
0.037
0.007
0.95 1.05
0.17 0.23
0.14 0.16
13.20 13.60
11.70 11.90
7.90 8.10
0.50 BSC
0.0055 0.0063
0.520
0.461
0.311
0.535
0.469
0.319
0.020 BSC
L
S
0.30 0.70
0.28 Typ.
0.012
0.011 Typ.
0.028
α
0°
5°
0°
5°
Integrated Silicon Solution, Inc.
PK13197H32 Rev.B 04/21/03
®
PACKAGING INFORMATION
400-mil Plastic SOJ
Package Code: K
ISSI
Notes:
1. Controlling dimension:
millimeters.
N
N/2+1
2. BSC = Basic lead spacing
between centers.
3. Dimensions D and E1 do not
include mold flash protrusions
and should be measured from
the bottom of the package.
4. Reference document: JEDEC
MS-027.
E1
E
1
N/2
SEATING PLANE
D
A
b
C
A2
e
B
A1
E2
Millimeters
Inches
Min Max
Millimeters
Inches
Min Max
Millimeters
Inches
Symbol Min
Max
Min
Max
Min
Max
Min
Max
No. Leads (N)
28
32
36
A
A1
A2
B
b
C
D
E
E1
E2
e
3.25 3.75
0.128 0.148
3.25
0.64
2.08
0.38
0.66
0.18
20.82 21.08
11.05 11.30
10.03 10.29
9.40 BSC
3.75
—
—
0.51
0.81
0.33
0.128 0.148
3.25 3.75
0.128 0.148
0.64
2.08
—
—
0.025
0.082
—
—
0.025
0.082
—
—
0.64
2.08
—
—
0.025
0.082
—
—
0.38 0.51
0.66 0.81
0.18 0.33
18.29 18.54
11.05 11.30
10.03 10.29
9.40 BSC
0.015 0.020
0.026 0.032
0.007 0.013
0.720 0.730
0.435 0.445
0.395 0.405
0.370 BSC
0.015 0.020
0.026 0.032
0.007 0.013
0.820 0.830
0.435 0.445
0.395 0.405
0.370 BSC
0.38 0.51
0.66 0.81
0.18 0.33
23.37 23.62
11.05 11.30
10.03 10.29
9.40 BSC
0.015 0.020
0.026 0.032
0.007 0.013
0.920 0.930
0.435 0.445
0.395 0.405
0.370 BSC
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
10/29/03
®
PACKAGING INFORMATION
ISSI
Millimeters
Symbol Min Max
No. Leads (N)
Inches
Min Max
Millimeters
Inches
Min Max
Millimeters
Min Max
Inches
Min Max
Min
Max
40
42
44
A
A1
A2
B
b
C
D
E
E1
E2
e
3.25 3.75
0.128 0.148
3.25
0.64
2.08
0.38
0.66
0.18
27.18 27.43
11.05 11.30
10.03 10.29
9.40 BSC
3.75
—
—
0.51
0.81
0.33
0.128 0.148
3.25 3.75
0.128 0.148
0.64
2.08
—
—
0.025
0.082
—
—
0.025
0.082
—
—
0.64
2.08
—
—
0.025
0.082
—
—
0.38 0.51
0.66 0.81
0.18 0.33
25.91 26.16
11.05 11.30
10.03 10.29
9.40 BSC
0.015 0.020
0.026 0.032
0.007 0.013
1.020 1.030
0.435 0.445
0.395 0.405
0.370 BSC
0.015 0.020
0.026 0.032
0.007 0.013
1.070 1.080
0.435 0.445
0.395 0.405
0.370 BSC
0.38 0.51
0.66 0.81
0.18 0.33
28.45 28.70
11.05 11.30
10.03 10.29
9.40 BSC
0.015 0.020
0.026 0.032
0.007 0.013
1.120 1.130
0.435 0.445
0.395 0.405
0.370 BSC
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. F
10/29/03
®
PACKAGING INFORMATION
300-mil Plastic SOJ
Package Code: J
ISSI
N
E1
E
1
SEATING PLANE
D
A
A2
B
C
e
b
A1
E2
Notes:
1. Controlling dimension: inches, unless otherwise
specified.
2. BSC = Basic lead spacing between centers.
3. Dimensions D and E1 do not include mold flash
protrusionsandshouldbemeasuredfromthebottomof
MILLIMETERS
INCHES
Min. Typ. Max.
Sym. Min. Typ. Max.
N0.
thepackage
.
4. Formed leads shall be planar with respect to one
another within 0.004 inches at the seating plane.
Leads
24/26
A
—
—
—
—
—
—
—
—
—
—
—
3.56
—
—
—
—
—
—
—
—
—
—
—
—
0.140
—
A1
A2
b
0.64
2.41
0.41
0.66
0.20
17.02
8.26
7.49
6.27
0.025
0.095
0.016
0.026
0.008
0.670
0.325
0.295
0.247
2.67
0.51
0.81
0.25
17.27
8.76
7.75
7.29
0.105
0.020
0.032
0.010
0.680
0.345
0.305
0.287
B
C
D
E
E1
E2
e
1.27 BSC
0.050 BSC
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. D
02/25/03
®
PACKAGING INFORMATION
300-mil Plastic SOJ
Package Code: J
ISSI
MILLIMETERS
INCHES
MILLIMETERS
INCHES
Sym. Min. Typ. Max.
Min. Typ. Max.
Sym. Min. Typ. Max.
Min. Typ. Max.
N0.
N0.
Leads
28
Leads
32
A
—
—
—
—
—
—
—
—
—
—
—
3.56
—
—
—
—
—
—
—
—
—
—
—
—
0.140
—
A
—
—
—
—
—
—
—
—
—
—
—
3.56
—
—
—
—
—
—
—
—
—
—
—
—
0.140
—
A1
A2
b
0.64
2.41
0.41
0.66
0.20
18.29
8.26
7.49
6.27
0.025
0.095
0.016
0.026
0.008
0.720
0.325
0.295
0.247
A1
A2
b
0.64
2.41
0.41
0.66
0.20
20.83
8.26
7.49
6.27
0.025
0.095
0.016
0.026
0.008
0.820
0.325
0.295
0.247
2.67
0.51
0.81
0.25
18.54
8.76
7.75
7.29
0.105
0.020
0.032
0.010
0.730
0.345
0.305
0.287
2.67
0.51
0.81
0.25
21.08
8.76
7.75
7.29
0.105
0.020
0.032
0.010
0.830
0.345
0.305
0.287
B
B
C
C
D
D
E
E
E1
E2
e
E1
E2
e
1.27 BSC
0.050 BSC
1.27 BSC
0.050 BSC
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev.D
02/25/03
®
PACKAGING INFORMATION
ISSI
Plastic TSOP-Type I
Package Code: T (32-pin)
1
E
H
N
D
SEATING PLANE
A
S
L
α
e
B
C
A1
Notes:
MILLIMETERS
INCHES
1. Controlling dimension: millimeters, unless
otherwise specified.
2. BSC = Basic lead spacing between centers.
3. Dimensions D and E do not include mold
flash protrusions and should be measured
from the bottom of the package.
4. Formed leads shall be planar with respect
to one another within 0.004 inches at the
seating plane.
Symbol
Min.
Max.
Min.
Max.
No. Leads
32
A
A1
B
C
D
E
H
e
—
1.20
0.25
0.23
0.17
8.10
—
0.047
0.010
0.009
0.007
0.319
0.728
0.795
0.05
0.17
0.12
7.90
18.30
19.80
0.002
0.007
0.005
0.311
0.720
0.780
18.50
20.20
0.50 BSC
0.020 BSC
L
α
0.40
0°
0.60
8°
0.016
0°
0.024
8°
S
0.25 REF
0.010 REF
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
06/13/03
相关型号：
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