H0500KC25L [IXYS]

Symmetrical GTO SCR, 280A I(T)RMS, 2500V V(DRM), 1125V V(RRM), 1 Element;
H0500KC25L
型号: H0500KC25L
厂家: IXYS CORPORATION    IXYS CORPORATION
描述:

Symmetrical GTO SCR, 280A I(T)RMS, 2500V V(DRM), 1125V V(RRM), 1 Element

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Date:- 4 Aug, 2004  
Data Sheet Issue:- 2  
WESTCODE  
IXYS  
An  
Company  
Fast Symmetrical Gate Turn-Off Thyristor  
Type H0500KC25#  
Absolute Maximum Ratings  
MAXIMUM  
UNITS  
VOLTAGE RATINGS  
LIMITS  
VDRM  
VRSM  
VRRM  
VRSM  
Repetitive peak off-state voltage, (note 1)  
Non-repetitive peak off-state voltage, (note 1)  
Repetitive peak reverse voltage  
2500  
V
V
V
V
2600  
100-2000  
100-2000  
Non-repetitive peak reverse voltage  
MAXIMUM  
LIMITS  
UNITS  
A
RATINGS  
ITGQM  
Ls  
Maximum peak turn-off current, (note 2)  
Snubber loop inductance, ITM=ITGQM, (note 2)  
500  
0.3  
µH  
A
IT(AV)M  
IT(RMS)  
ITSM  
ITSM2  
I2t  
Mean on-state current, Tsink=55°C (note 3)  
Nominal RMS on-state current, 25°C (note 3)  
Peak non-repetitive surge current tp=10ms  
Peak non-repetitive surge current, (Note 4)  
I2t capacity for fusing tp=10ms  
540  
280  
A
3.0  
kA  
kA  
kA2s  
A/µs  
W
5.4  
45  
di/dtcr  
PFGM  
PRGM  
IFGM  
VRGM  
toff  
Critical rate of rise of on-state current, (note 5)  
Peak forward gate power  
1000  
160  
Peak reverse gate power  
5
kW  
A
Peak forward gate current  
100  
18  
Peak reverse gate voltage (note 6)  
Minimum permissible off-time, ITM=ITGQM, (note 2)  
Minimum permissible on-time  
V
60  
µs  
ton  
10  
µs  
Tjop  
Operating temperature range  
-40 to +125  
-40 to +150  
°C  
Tstg  
Storage temperature range  
°C  
Notes:-  
1) VGK=-2Volts.  
2) Tj=125°C, VD=80%VDM, VDM<VDRM, diGQ/dt=20A/µs, CS=3µF.  
3) Double-side cooled, single phase; 50Hz, 180° half-sinewave.  
4) Half-sinewave, tp=2ms  
5) For di/dt>1000A/µs, consult factory.  
6) May exceed this value during turn-off avalanche period.  
Data Sheet. Type H0500KC25# Issue 2  
Page 1 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
Characteristics  
UNITS  
V
Parameter  
MIN  
TYP MAX TEST CONDITIONS  
VTM  
IL  
Maximum peak on-state voltage  
Latching current  
-
2.8  
5
3.2 IG=2A, IT=500A  
-
-
-
Tj=25°C  
A
IH  
Holding current  
-
5
Tj=25°C  
A
dv/dtcr Critical rate of rise of off-state voltage  
800  
-
-
VD=80%VDRM, VGR=-2V  
Rated VDRM, VGR=-2V  
Rated VRRM  
V/µs  
mA  
mA  
mA  
V
IDM  
Peak off state current  
-
-
-
-
-
-
-
-
-
-
30  
60  
IRM  
Peak reverse current  
-
IGKM  
Peak negative gate leakage current  
-
200 VGR=-16V  
0.9  
0.8  
0.7  
1.7  
0.6  
0.1  
-
-
-
Tj=-40°C  
Tj=25°C  
Tj=125°C  
VGT  
Gate trigger voltage  
Gate trigger current  
V
VD=25V, RL=25m  
VD=25V, RL=25m  
V
6.0 Tj=-40°C  
Tj=25°C  
0.5 Tj=125°C  
A
IGT  
2
A
A
VD=50%VDRM, ITGQ=500A, IGM=30A, diG/dt=15A/µs  
Tj=25°C, di/dt=300A/µs, (10%IGM to 90%VD)  
µs  
td  
tgt  
tf  
Delay time  
Turn-on time  
Fall time  
-
-
-
0.5  
2.0  
0.5  
-
3.0 Conditions as for td, (10%IGM to 10%VD)  
µs  
µs  
VD=80%VDRM, ITGQ=500A, CS=1µF,  
-
diGQ/dt=40A/µs, VGR=-16V, (90%ITGQ to 10%IVD)  
tgq  
Turn-off time  
-
5.0  
6.0 Conditions as for tf, (10%IGQ to 10%ITGQ  
Conditions as for tf  
600 Conditions as for tf  
)
µs  
A
Igq  
Turn-off gate current  
Turn-off gate charge  
Tail time  
-
180  
-
Qgq  
ttail  
tgw  
-
-
500  
µC  
µs  
35  
50  
-
Conditions as for tf, (10%ITGQ to ITGQ<1A)  
Conditions as for tf  
Gate off-time (see note 3)  
80  
-
-
µs  
-
0.065 Double side cooled  
0.24 Cathode side cooled  
0.09 Anode side cooled  
9.0 (see note 2)  
-
K/W  
K/W  
K/W  
kN  
g
RthJK  
Thermal resistance junction to sink  
-
-
-
-
-
F
Mounting force  
Weight  
4.5  
-
Wt  
120  
Notes:-  
1) Unless otherwise indicated Tj=125oC.  
2) For other clamping forces, consult factory.  
3) The gate off-time is the period during which the gate circuit is  
required to remain low impedance to allow for the passage  
of tail current.  
Data Sheet. Type H0500KC25# Issue 2  
Page 2 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
Notes on ratings and characteristics.  
1. Maximum Ratings.  
1.1 Off-state voltage ratings.  
Unless otherwise indicated, all off-state voltage ratings are given for gate conditions as diagram 1. For  
other gate conditions see the curves of figure 5. It should be noted that VDRM is the repeatable peak  
voltage which may be applied to the device and does not relate to a DC operating condition. While not  
given in the ratings, VDC should ideally be limited to 60% VDRM in this product.  
Diagram 1.  
1.2 Reverse voltage rating.  
All devices in this series have a minimum VRRM of 100 Volts. If specified at the time of order, a VRRM up to  
80%VDRM is available.  
1.3 Peak turn-off current.  
The figure given in maximum ratings is the highest value for normal operation of the device under  
conditions given in note 2 of ratings. For other combinations of ITGQ, VD and Cs see the curves of figures  
15 & 16. The curves are effective over the normal operating range of the device and assume a snubber  
circuit equivalent to that given in diagram 2. If a more complex snubber, such as an Underland circuit, is  
employed then the equivalent CS should be used and Ls<0.3µH must be ensured for the curves to be  
applied.  
L
s
R
D
s
C
s
Diagram 2.  
1.4 R.M.S and average current.  
Measured as for standard thyristor conditions, double side cooled, single phase, 50Hz, 180° half-  
sinewave. These are included as a guide to compare the alternative types of GTO thyristors available,  
values can not be applied to practical applications, as they do not include switching losses.  
1.5 Surge rating and I2t.  
Ratings are for half-sinewave, peak value against duration is given in the curve of figure 4.  
1.6 Snubber loop inductance.  
Use of GTO thyristors with snubber loop inductance, Ls<0.3µH implies no dangerous Vs voltages (see  
diagrams 2 & 3) can be applied, provided the other conditions given in note 1.3 are enforced. Alternatively  
Vs should be limited to 700 Volts to avoid possible device failure.  
Data Sheet. Type H0500KC25# Issue 2  
Page 3 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
1.7 Critical rate of rise of on-state current  
The value given is the maximum repetitive rating, but does not imply any specific operating condition. The  
high turn-on losses associated with limit di/dt would not allow for practical duty cycle at this maximum  
condition. For special pulse applications, such as crowbars and pulse power supplies, a much higher di/dt  
is possible. Where the device is required to operate with infrequent high current pulses, with natural  
commutation (i.e. not gate turn-off), then di/dt>5kA/µs is possible. For this type of operation individual  
specific evaluation is required.  
1.8 Gate ratings  
The absolute conditions above which the gate may be damaged. It is permitted to allow VGK(AV) during turn-  
off (see diagram 10) to exceed VRGM which is the implied DC condition.  
1.9 Minimum permissible off time.  
This time relates specifically to re-firing of device (see also note on gate-off time 2.7). The value given in  
the ratings applies only to operating conditions of ratings note 2. For other operating conditions see the  
curves of figure 18.  
1.10 Minimum permissible on-time.  
Figure is given for minimum time to allow complete conduction of all the GTO thyristor islands. Where a  
simple snubber, of the form given in diagram 1. (or any other non-energy recovery type which discharges  
through the GTO at turn-on) the actual minimum on-time will usually be fixed by the snubber circuit time  
constant, which must be allowed to fully discharge before the GTO thyristor is turned off. If the anode  
circuit has di/dt<10A/µs then the minimum on-time should be increased, the actual value will depend upon  
the di/dt and operating conditions (each case needs to be assessed on an individual basis).  
Data Sheet. Type H0500KC25# Issue 2  
Page 4 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
2 Characteristics  
2.1 Instantaneous on-state voltage  
Measured using a 500µs square pulse, see also the curves of figure 2 for other values of ITM  
.
2.2 Latching and holding current  
These are considered to be approximately equal and only the latching current is measured, type test only  
as outlined below. The test circuit and wave diagrams are given in diagram 4. The anode current is  
monitored on an oscilloscope while VD is increased, until the current is seen to flow during the un-gated  
period between the end of IG and the application of reverse gate voltage. Test frequency is 100Hz with IGM  
& IG as for td of characteristic data.  
IG  
100µs  
IGM  
Gate current  
15V  
100µs  
Anode current  
unlatched condition  
Unlatched  
R1  
CT  
C1  
Anode current  
Vs  
Latched condition  
DUT  
Latched  
Gate-drive  
Diagram 4, Latching test circuit and waveforms.  
2.3 Critical dv/dt  
The gate conditions are the same as for 1.1, this characteristic is for off-state only and does not relate to  
dv/dt at turn-off. The measurement, type test only, is conducted using the exponential ramp method as  
shown in diagram 5. It should be noted that GTO thyristors have a poor static dv/dt capability if the gate is  
open circuit or RGK is high impedance. Typical values: - dv/dt<30V/µs for RGK>10 .  
Diagram 5, Definition of dV/dt.  
2.4 Off-state leakage.  
For IDRM & IRRM see notes 1.1 & 1.2 for gate leakage IGK, the off-state gate circuit is required to sink this  
leakage and still maintain minimum of –2 Volts. See diagram 6.  
Diagram 6.  
Data Sheet. Type H0500KC25# Issue 2  
Page 5 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
2.5 Gate trigger characteristics.  
These are measured by slowly ramping up the gate current and monitoring the transition of anode current  
and voltage (see diagram 7). Maximum and typical data of gate trigger current, for the full junction  
temperature range, is given in the curves of figure 6. Only typical figures are given for gate trigger voltage,  
however, the curves of figure 1 give the range of gate forward characteristics, for the full allowable  
junction temperature range. The curves of figures 1 & 6 should be used in conjunction, when considering  
forward gate drive circuit requirement. The gate drive requirements should always be calculated for lowest  
junction temperature start-up condition.  
Feedback  
Anode current  
0.9VAK  
R1  
Not to scale  
Current-  
sence  
CT  
Gate current  
C1  
Vs  
0.1IA  
IGT  
Anode-Cathode  
Voltage  
DUT  
Gate-drive  
Diagram 7, Gate trigger circuit and waveforms.  
2.6 Turn-on characteristics  
The basic circuit used for turn-on tests is given in diagram 8. The test is initiated by establishing a  
circulating current in Tx, resulting in VD appearing across Cc/Lc. When the test device is fired Cc/Lc  
discharges through DUT and commutates Tx off, as pulse from Cc/Lc decays the constant current source  
continues to supply a fixed current to DUT. Changing value of Cc & Lc allows adjustment of ITM and di/dt  
respectively, VD and i are also adjustable.  
Lc  
Cc  
R1  
CT  
Tx  
D
i
Cd  
Vd  
DUT  
Gate-drive  
Diagram 8, Turn-on test circuit of FT40.  
The definitions of turn-on parameters used in the characteristic data are given in diagram 9. The gate  
circuit conditions IGM & IG are fully adjustable, IGM duration 10µs.  
diG/dt  
IG  
IGM  
td  
tr  
di/dt  
ITM  
VD  
VD=VDM  
tgt  
Eon integral  
period  
Diagram 9, Turn-on wave-diagrams.  
Data Sheet. Type H0500KC25# Issue 2  
Page 6 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
In addition to the turn-on time figures given in the characteristics data, the curves of figure 9 give the  
relationship of tgt to di/dt and IGM. The data in the curves of figures 7 & 8, gives the turn-on losses both with  
and without snubber discharge, a snubber of the form given in diagram 2 is assumed. Only typical losses  
are given due to the large number of variables which effect Eon. It is unlikely that all negative aspects  
would appear in any one application, so typical figures can be considered as worst case. Where the turn-  
on loss is higher than the figure given it will in most cases be compensated by reduced turn-off losses, as  
variations in processing inversely effect many parameters. For a worst case device, which would also  
have the lowest turn-off losses, Eon would be 1.5x values given in the curves of figures 7 & 8. Turn-on  
losses are measured over the integral period specified below:-  
10µs  
Eon = iv.dt  
0
The turn-on loss can be sub-divided into two component parts, firstly that associated with tgt and secondly  
the contribution of the voltage tail. For this series of devices tgt contributes 50% and the voltage tail 50%  
(These figures are approximate and are influenced by several second order effects). The loss during tgt is  
greatly affected by gate current and as with turn-on time (figure 9), it can be reduced by increasing IGM  
.
The turn-on loss associated with the voltage tail is not effected by the gate conditions and can only be  
reduced by limiting di/dt, where appropriate a turn-on snubber should be used. In applications where the  
snubber is discharged through the GTO thyristor at turn-on, selection of discharge resistor will effect Eon.  
The curves of figure 8 are given for a snubber as shown in diagram 2, with R=5 , this is the lowest  
recommended value giving the highest Eon, higher values will reduce Eon.  
2.7 Turn-off characteristics  
The basic circuit used for the turn-off test is given in diagram 10. Prior to the negative gate pulse being  
applied constant current, equivalent to ITGQ, is established in the DUT. The switch Sx is opened just before  
DUT is gated off with a reverse gate pulse as specified in the characteristic/data curves. After the period  
tgt voltage rises across the DUT, dv/dt being limited by the snubber circuit. Voltage will continue to rise  
across DUT until Dc turns-on at a voltage set by the active clamp Cc, the voltage will be held at this value  
until energy stored in Lx is depleted, after which it will fall to VDC .The value of Lx is selected to give  
required VD Over the full tail time period. The overshoot voltage VDM is derived from Lc and forward voltage  
characteristic of DC, typically VDM=1.2VD to 1.5VD depending on test settings. The gate is held reverse  
biased through a low impedance circuit until the tail current is fully extinguished.  
Lc  
Dc  
Sx  
RL  
Rs  
Lx  
Cc  
Vd  
Vc  
Ds  
CT  
DX  
i
Cd  
Cs  
DUT  
Gate-  
drive  
RCD snubber  
Diagram 10, Turn-off test circuit.  
The definitions of turn-off parameters used in the characteristic data are given in diagram 11.  
Data Sheet. Type H0500KC25# Issue 2  
Page 7 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
tgq  
tf  
0.9  
VDM  
ITGQ  
VD  
0.1  
0.1  
VGR  
VGQ  
QGQ  
VG(AV)  
IGQ  
tgw  
Diagram 11, Turn-off parameter definitions.  
In addition to the turn-off figures given in characteristic data, the curves of figures 10, 11 & 12 give the  
relationship of IGQ QGQ and tgq to turn-off current (ITGQ) and diGQ/dt. Only typical values of IGQ are given due  
to a great dependence upon the gate circuit impedance, which is a function of gate drive design not the  
device. The tgq is also, to a lesser extent, affected by circuit impedance and as such the maximum figures  
given in data assume a good low impedance circuit design. The curves of figures 17 & 18 give the tail time  
and minimum off time to re-fire device as a function of turn-off current. The minimum off time to re-fire the  
device is distinct from tgw, the gate off time given in characteristics. The GTO thyristor may be safely re-  
triggered when a small amount of tail current is still flowing. In contrast, the gate circuit must remain low  
impedance until the tail current has fallen to zero or below a level which the higher impedance VGR circuit  
can sink without being pulled down below –2 Volts. If the gate circuit is to be switched to a higher  
impedance before the tail current has reached zero then the requirements of diagram 12 must be applied.  
itail  
R
(VGR- itailR)>2V  
Diagram 12.  
VGR  
The figure tgw, as given in the characteristic data, is the maximum time required for the tail current to  
decay to zero. The figure is applicable under all normal operating conditions for the device; provided  
suitable gate drive is employed. At lower turn-off current, or with special gate drive considerations, this  
time may be reduced (each case needs to be considered individually).Typical turn-off losses are given in  
the curves of figures 13 & 14, the integration period for the losses is nominally taken to the end of the tail  
time (Itail<1A) i.e. :-  
tgt+ttail  
Eoff =  
iv.dt.  
0
Data Sheet. Type H0500KC25# Issue 2  
Page 8 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
The curves of figure 13 give the turn-off energy for a fixed VD with a VDM=120%VD, whereas the curves of  
figure 14 give the turn-off energy with a fixed value of VDM and VD=50%VDRM. The curves are for energy  
against turn-off current/snubber capacitance with a correction for voltage inset as an additional graph  
(snubber equivalent to diagram 2 is assumed). From these curves a typical value of turn-off energy for any  
combination of ITGQ/Cs and VD or VDM can be derived. Only typical data is included, to allow for the trade-  
off with on-state voltage (VTM) which is a feature of these devices, see diagram 13. When calculating  
losses in an application, the use of a maximum VTM and typical Eoff will (under normal operating  
frequencies) give a more realistic value. The lowest VTM device of this type would have a maximum turn-  
off energy of 1.5x the figure given in the curves of figures 13 & 14.  
Trade-off between V & E  
off  
TM  
E
off  
Diagram 13.  
V
TM  
2.8 Safe turn-off periphery  
The necessity to control dv/dt at tun-off for the GTO thyristor implies a trade-off between ITGQ/VDM/Cs. This  
information is given in the curves of figures 15 & 16. The information in these curves should be  
considered as maximum limits and not implied operating conditions, some margin of 'safety' is advised  
with the conditions of the curves reserved for occasional excursions. It should be noted that these curves  
are derived at maximum junction temperature, however, they may be applied across the full operating  
temperature range of the device provided additional precautions are taken. At very low temperature,  
(below –10°C) the fall-time of device becomes very rapid and can give rise to very high turn-off voltage  
spikes, as such it is advisable to reduce snubber loop inductance to <0.2µH to minimise this effect.  
Data Sheet. Type H0500KC25# Issue 2  
Page 9 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
Curves  
Figure 1 –Forward gate characteristics  
Figure 2 - On-state characteristics of Limit device  
10000  
1000  
H0500KC25#  
Issue 2  
H0500KC25#  
Issue 2  
For Tj=-40°C to +125°C  
Minimum  
Maximum  
25°C 125°C  
1000  
100  
10  
100  
1
10  
0
0.5  
1
1.5  
2
0
1
2
3
4
5
6
Instantaneous On-State Voltage, VT (V)  
Instantaneous Forward Gate Voltage, VFG (V)  
`
Figure 3 - Maximum surge and I2t Ratings  
10000  
1.00E+06  
1.00E+05  
1.00E+04  
I2t: VRRM 10V  
I2t: 60% VRRM  
ITSM: VRRM 10V  
1000  
ITSM: 60% VRRM  
Tj (initial) = 125°C  
H0500KC25#  
Issue 2  
100  
1
3
5
10  
1
5
10  
50 100  
Duration of surge (ms)  
Duration of surge (cycles @ 50Hz)  
Data Sheet. Type H0500KC25# Issue 2  
Page 10 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
Figure 5 – Typical forward blocking voltage Vs.  
external gate-cathode resistance  
Figure 4 – Transient thermal impedance  
1
0
H0500KC25#  
Issue 2  
H0500KC25#  
Issue 2  
RGK  
0.2  
Tj=125oC  
Cathode  
Anode  
0.1  
0.4  
0.6  
Double-side  
0.01  
0.8  
Tj=100oC  
Tj=25oC  
1
1.2  
0.001  
1
10  
100  
1000  
0.001  
0.01  
0.1  
Time, (s)  
1
10  
100  
External Gate-Cathode Resistance, RGK ()  
Figure 7 – Typical turn-on energy per pulse  
(excluding snubber discharge)  
Figure 6 – Gate trigger current  
40  
10  
H0500KC25#  
Issue 2  
H0500KC25#  
di/dt=500A/µs  
Issue 2  
IGM=30A, diG/dt=15A/µs  
35  
30  
25  
20  
15  
10  
5
VD=50%VDRM  
Tj=25oC  
di/dt=300A/µs  
1
Maximum  
di/dt=100A/µs  
0.1  
Typical  
0.01  
0
-50  
-25  
0
25  
50  
75  
100  
125  
150  
0
300  
600  
Turn-On Current, ITM (A)  
900  
1200  
Junction Temperature, Tj (°C)  
Data Sheet. Type H0500KC25# Issue 2  
Page 11 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
Figure 8 – Typical turn-on energy per pulse  
(including snubber discharge)  
Figure 9 – Maximum turn-on time  
4
250  
H0500KC25#  
Issue 2  
di/dt=500A/µs  
H0500KC25#  
Issue 2  
IGM=30A  
IGM=40A  
IGM=50A  
VD=50%VDRM, ITGQ=500A  
IGM=30A, diG/dt=15A/µs  
3.5  
3
tr of IGM 2µs  
Cs=1µF, Rs=5  
di/dt=300A/µs  
di/dt=100A/µs  
Tj=25oC  
VD=0.5VDRM  
200  
150  
100  
50  
Tj=25oC  
2.5  
2
1.5  
1
0.5  
0
0
0
300  
600  
900  
1200  
10  
100  
Rate Of Rise Of On-State Current, di/dt (A/ µs)  
1000  
Turn-On Current, ITM (A)  
Figure 10 – Typical peak turn-off gate current  
Figure 11 – Maximum gate turn-off charge  
250  
1200  
H0500KC25#  
Issue 2  
H0500KC25#  
Issue 2  
diGQ/dt=40A/µs  
20A/µs  
VD=80%VDRM  
Tj=125oC  
VD=80%VDRM  
Tj=125oC  
diGQ/dt=30A/µs  
1000  
800  
600  
400  
200  
0
30A/µs  
200  
150  
100  
50  
40A/µs  
50A/µs  
diGQ/dt=20A/µs  
0
200  
400  
600  
800  
1000  
0
250  
500  
750  
1000  
Turn-Off Current, ITGQ (A)  
Turn-Off Current, ITGQ (A)  
Data Sheet. Type H0500KC25# Issue 2  
Page 12 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
Figure 12 – Maximum turn-off time  
Figure 13 – Turn-off energy per pulse  
0.5  
15  
H0500KC25#  
Issue 2  
H0500KC25#  
Issue 2  
VD=80%VDRM  
Tj=125oC  
VD=1200V, VDM=120%VD  
diGQ/dt=40A/µs  
CS=1.5µF  
0.45  
0.4  
CS=1µF  
CS=2µF  
CS=3µF  
20A/µs  
30A/µs  
Ls0.3µH  
CS=0.5µF  
Tj=125oC  
0.35  
0.3  
10  
40A/µs  
50A/µs  
0.25  
0.2  
VDM  
5
VD  
0.15  
0.1  
For other values of VD  
scale Eoff. Note:VDMVDRM  
1.5  
1
0.05  
0
0.5  
3000  
1000  
2000  
VD  
0
0
200  
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
Turn-Off Current, ITGQ (A)  
Turn-Off Current, ITGQ (A)  
Figure 14 – Typical turn-off energy per pulse  
Figure 15 – Maximum permissible turn-off current  
0.8  
3
H0500KC25#  
H0500KC25#  
Issue 2  
Issue 2  
VDM=2000V, VD=50%VDRM  
diGQ/dt=40A/µs  
diGQ/dt=40A/µs  
Ls 0.3µH  
Ls 0.3µH  
2.5  
Tj=125oC  
Tj=125oC  
Cs=1µF Cs=1.5µF  
VDM 120%V  
D
VD  
Cs=2µF  
Cs=3µF  
0.6  
0.4  
0.2  
0
Cs=0.5µF  
2
1.5  
VD=80%VDRM  
VD=65%VDRM  
VD 50%VDRM  
VDM  
VD  
1
Note:VDM  
V
DRM  
ForothervaluesofVDM scaleEof  
f
1.5  
0.5  
1
0.5  
4500  
1500  
3000  
VDM  
0
0
200  
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
Turn-Off Current, ITGQ (A)  
Turn-Off Current, ITGQ (A)  
Data Sheet. Type H0500KC25# Issue 2  
Page 13 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
Figure 16 – Maximum turn-off current  
Figure 17 – Maximum tail time  
54  
1000  
H0500KC25#  
Issue 2  
VDM 120%V  
D
VD  
VD=80%VDRM  
53  
900  
Tj=125oC  
Cs=3µF  
J
52  
800  
Cs=2µF  
51  
50  
49  
48  
47  
46  
45  
44  
700  
Cs=1.4µF  
600  
Cs=1µF  
500  
400  
Cs=0.5µF  
300  
200  
Tj=125oC  
Ls0.3µH  
diGQ/dt=40A/µs  
100  
H0500KC25#  
Issue 2  
0
0
0.2  
0.4  
0.6  
0.8  
1
0
200  
400  
600  
800  
Turn-Off Voltage As The Ratio VD/VDRM  
Turn-Off Current, ITGQ (A)  
Figure 18 – Minimum off-time to re-fire device  
70  
H0500KC25#  
Issue 2  
68  
VD=80%VDRM  
Tj=125°C  
66  
diGQ/dt=30A/µs  
diGQ/dt=40A/µs  
diGQ/dt=50A/µs  
64  
62  
60  
58  
56  
54  
52  
50  
0
500  
1000  
Turn-Off Current, ITGQ (A)  
Data Sheet. Type H0500KC25# Issue 2  
Page 14 of 15  
August, 2004  
WESTCODE An IXYS Company  
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#  
Outline Drawing & Ordering Information  
ORDERING INFORMATION  
(Please quote 10 digit code as below)  
H0500  
KC  
♦ ♦  
#
Fixed  
Type Code  
Fixed  
Outline Code  
Fixed Voltage Code  
VRRM Code as % of VDRM  
D=80, E=75, F=70, G=65,H=60, J=55, K=50,  
L=45, M=40, N=35, P=30, R=25, S=20, T=15,  
V=10, W=5  
VDRM/100  
25  
Typical order code: H0500KC25G – 2500V VDRM, VRRM=65%VDRM (1625V), 37.7mm clamp height capsule.  
IXYS Semiconductor GmbH  
Edisonstraße 15  
D-68623 Lampertheim  
Tel: +49 6206 503-0  
Fax: +49 6206 503-627  
E-mail: marcom@ixys.de  
Westcode Semiconductors Ltd  
Langley Park Way, Langley Park,  
Chippenham, Wiltshire, SN15 1GE.  
Tel: +44 (0)1249 444524  
Fax: +44 (0)1249 659448  
E-mail: WSL.sales@westcode.com  
WESTCODE  
An IXYS Company  
IXYS Corporation  
3540 Bassett Street  
Santa Clara CA 95054 USA  
Tel: +1 (408) 982 0700  
Fax: +1 (408) 496 0670  
E-mail: sales@ixys.net  
Westcode Semiconductors Inc  
3270 Cherry Avenue  
Long Beach CA 90807 USA  
Tel: +1 (562) 595 6971  
Fax: +1 (562) 595 8182  
E-mail: WSI.sales@westcode.com  
www.westcode.com  
www.ixys.com  
The information contained herein is confidential and is protected by Copyright. The information may not be used or disclosed  
except with the written permission of and in the manner permitted by the proprietors Westcode Semiconductors Ltd.  
© Westcode Semiconductors Ltd.  
In the interest of product improvement, Westcode reserves the right to change specifications at any time without prior notice.  
Devices with a suffix code (2-letter, 3-letter or letter/digit/letter combination) added to their generic code are not necessarily subject  
to the conditions and limits contained in this report.  
Data Sheet. Type H0500KC25# Issue 2  
Page 15 of 15  
August, 2004  

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