Z9023406FSCRXXXX [IXYS]
Microcontroller, 8-Bit, MROM, Z8 CPU, 6MHz, CMOS, PQFP44,;
| 型号： | Z9023406FSCRXXXX |
| 厂家： | 
IXYS CORPORATION |
| 描述： | Microcontroller, 8-Bit, MROM, Z8 CPU, 6MHz, CMOS, PQFP44, 微控制器 |
| 文件： | 总8页 (文件大小：188K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Z90233, Z90234, and Z90231
eZVision 200 Television Controller with
On-Screen Display
PB006903-0903
Product Brief
•
Four channels of 4-bit analog-to-digital con-
verter
Product Block Diagram
•
•
•
•
27 general-purpose I/O pins
Provides I2C master serial communication port
16/24 KBytes ROM
Z8 Core RAM
42-pin SDIP and 44-pin PQFP packages
ADC
OSD
Can be emulated with 124-pin PGA package
(Z90239)
2
General Description
PWM
I C
I/O Ports
The Z90233/Z90234 and Z90231 are the ROM and
OTP versions of the eZVision 200 television
controller with OSD. Based on ZiLOG’s powerful
Z8 architecture, the Z90233/Z90234 and Z90231
contain 24 KB of program memory. The following
enhanced features are included:
On-Screen Display (OSD)
Features
•
•
•
•
Displays of up to 10 rows by 24 columns with
256 characters
•
•
•
•
•
•
Flexible inter-row spacing
Provides character cell resolution of 14 pixels
by 18 scan lines
Higher character cell resolution (14 x 18)
Background mesh effect
Offers variable inter-row spacing from 0–15
horizontal scan lines
Dedicated infrared capture registers
On-chip analog-to-digital converter
Hardware master mode I2C interface
Uses color palette table to program foreground
and background of character
The familiar Z8 architecture, in combination with
these advanced features, makes the eZVision 200
an ideal choice for midrange televisions in both
PAL and NTSC markets.
Microcontroller Features
•
•
Incorporates Z8® MCU core at 6 MHz
Z90233 and Z90234 have 16K and 24K
masked ROM, respectively
The eZVision 200 family consists of three basic
device types:
•
•
•
•
236 bytes of system RAM
•
•
•
The Z90233 and Z90234 masked ROM
The Z90231 OTP
Ten 6-bit pulse width modulators
One 14-bit pulse width modulator
On-chip infrared (IR) capture registers
The Z90239 In-Circuit Emulator (ICE) chip
The OTP supports a field-programmable 24 KB
program ROM. The ICE chip is used in the Z90239
ZILOG CORPORATION • 532 RACE STREET • SAN JOSE, CA 95126-3432 • WWW.ZILOG.COM
Z90233, Z90234, and Z90231
eZVision 200 Television Controller with On-Screen Display
2
emulator and protopak. The Z90233/Z90234
masked ROM supports a 16/32-KB system ROM
(selectable through a mask option).
The eZVision 200 family takes full advantage of
the Z8 microcontroller’s expanded register file
space to offer greater flexibility in OSD creations
that simulate bitmap graphics, icons, and
animation.
Block Diagram of eZVision 200
XTAL1
XTAL2
RESET
Oscillator
WDT
16/24-KB
P20
Program ROM
or
24-KB
RESET
P21
P22
P23
P24
P25
P26
P27
Counter
Timer
Program OTP
Port 2
Counter
Timer
Internal
Microprocessor
Core
ADC0
ADC1
ADC2
ADC3
4-Bit
ADC
IR
IRIN
P40
P41
P42
P43
P44
P45
P46
P47
Counter
P60
P61
P62
P63
Port 6
Port 4
Register File
236 Bytes
PWM 11
(14-bit)
PWM11
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
PWM9
SCLK0
SDATA0
2
Video RAM
240 x 11-bit
I C
Interface
SCLK1
SDATA1
PWM 1
to
PWM 10
(6-bit)
OSDX1
OSDX2
PWM10
H
P50
P51
P52
P53
P54
P55
P56
SYNC
V
On-Screen
Display
SYNC
R
G
B
Character
ROM or OTP
9K by 7-bit
Port 5
V
BLANK
HLFTN
PB006903-0903
Z90233, Z90234, and Z90231
eZVision 200 Television Controller with On-Screen Display
3
Pin-Outs and Pin Direction
1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
SDATA1/P27
SCLK1/P26
SDATA0/P25
SCLK0/P24
P23
P22
IRIN
P21
PWM11/P56
PWM6/P55
PWM5/P54
PWM4/P53
PWM3/P52
PWM2/P51
PWM1/P50
P40
ADC3/P60
ADC2/P61
ADC1/P41
ADC0/P62
AGND
2
3
4
5
6
eZVision 200
7
8
Z90233/Z90234
9
V
CC
or
Z90231
10
11
12
13
14
15
16
17
18
19
20
21
RESET
XTAL2
XTAL1
GND
OSDX2
OSDX1
VSYNC
HSYNC
VBLANK
R
(Top View)
P42
P43
P63
PWM7/P44
PWM8/P45
PWM9/P46
PWM10/P47
HLFTN/P20
G
B
Figure 1. 42-Pin Shrink DIP
PB006903-0903
Z90233, Z90234, and Z90231
eZVision 200 Television Controller with On-Screen Display
4
29
eZVision 200
33
34
31
27
25
23
22
P51/PWM2
P50/PWM1
P40
IRIN
P21
VCC
35
36
37
38
39
40
41
42
43
44
21
20
19
18
17
16
15
14
13
12
P60/ADC3
P61/ADC2
P41/ADC1
NC (NO CONNECT)
P62/ADC0
AGND
RESET
NC (NO CONNECT)
XTAL2
XTAL1
GND
OSDX2
OSDX1
VSYNC
Z90233/Z90234 or
Z90231
(Top View)
P42
P43
1
11
3
7
5
9
Figure 2. 44-Pin Plastic Quad Flatpack (PQFP)
Table 1 Pin Descriptions for the Z90233, Z90234, and Z90231
42-Pin SDIP
Pin Number
44-Pin PQFP
Pin Number
Reset
Direction State
Name
Function
+5 Volts
0 Volts
V
34
20
PWR
PWR
I
PWR
PWR
I
CC
GND, AGND
IRIN
30, 13
36
15, 42
22
Infrared remote capture
input
PWM11
1
29
14-bit pulse width
modulator output*
O
O
I
I
PWM10–PWM1 20, 19, 18, 17, 2, 3, 5, 4, 3, 2, 30, 31,
4, 5, 6, 7 32, 33, 34, 35
6-bit pulse width
modulator output*
PB006903-0903
Z90233, Z90234, and Z90231
eZVision 200 Television Controller with On-Screen Display
5
Table 1 Pin Descriptions for the Z90233, Z90234, and Z90231 (Continued)
42-Pin SDIP
Pin Number
44-Pin PQFP
Pin Number
Reset
Direction State
Name
Function
P56–P50
7, 6, 5, 4, 3, 2, 1
29, 30, 31, 32, 33, Bit-programmable input/ I/O
34, 35 output ports
I
P27–P20
42, 41, 40, 39, 38, 28, 27, 26, 25, 24, Bit-programmable input/ I/O
I
37, 35, 21
23, 21, 6
output ports
HLFTN
21
6
Half tone output
O
I
I
I
I
2
SDATA0, 1
SCLK0, 1
P63–P60
40, 42
26, 28
I C data
I/O
I/O
2
39, 41
25, 27
I C clock
16, 12, 10, 9
1, 41, 38, 37
Bit-programmable input/ I/O
output ports
P47–P40
20, 19, 18, 17, 15, 5, 4, 3, 2, 44, 43,
Bit-programmable input/ I/O
output ports
I
14, 11, 8
39, 36
XTAL1
31
16
Crystal oscillator input
Crystal oscillator output
Dot clock oscillator input
I
I
XTAL2
32
17
O
I
O
I
OSDX1
OSDX2
HSYNC
VSYNC
VBLANK
R, G, B
28
13
29
14
Dot clock oscillator output O
O
I
26
11
Horizontal sync
Vertical sync
Video blank
I
27
12
I
I
25
10
O
O
AI
O
O
I
24, 23, 22
9, 10, 11, 12
9, 8, 7
Video R, G, B
ADC3–ADC0
37, 38, 39, 41
4-bit analog-to-digital
converter input
RESET
33
19
Device reset
I/O
I
Note: *These pins are input on POR. They must be configured to be output ports for PWM
applications.
PB006903-0903
Z90233, Z90234, and Z90231
eZVision 200 Television Controller with On-Screen Display
6
Development Tools and Support
Available in OTP and masked ROM versions,
the Z90231 and Z90233/Z90234 fulfill prototype
and production requirements. The Z90231
uses ICEboxTM (In-Circuit Emulator) tools
(Z9025900ZEM) to make programming and
debugging applications easy and convenient.
For code development, ZiLOG offers its
specialized application program interface (API)
for OSD. The API deals directly with proper
sequencing and timing when interfacing
with hardware, shielding the user application
programmer from tedious and error-prone details.
The ZiLOG Developer Studio (ZDS) is a
complete software program that provides easy
code generation and program management.
The Z8933200ZCO, an OSD evaluation board,
is used to synchronize the emulator with a video
display. Refer to the diagram below for a suggested
code development environment.
ZiLOG also offers the Z9020900TSC Protopak to
verify code on a television.
PB006903-0903
Z90233, Z90234, and Z90231
eZVision 200 Television Controller with On-Screen Display
7
Related Products
TV controllers and vertical blanking interval (VBI) decoders include the following:
Z9037x
Z9036x
Z86129
Z86229
Z86131
Z86130
Z86230
eZVision 300 dual-scan TV controller for progressive scan and standard interlaced scan
eZVision 300 advanced TV controller with 32 KWords of ROM
eZSelect closed caption decoder (CCD)
2
eZSelect CCD with second I C address select
eZSelect auto time set
eZSelect smart V-chip
2
eZSelect smart V-chip with second I C address select
Electrical Features Summary
•
•
40 mA maximum supply current
4.50 V to 5.50 V operating range
eZVision 200 Device Selection
ROM
RAM
IR
Bit I/O
PWM
(6/14-bit)
2
Device Application (Bytes) (Bytes) Pkg
I C
Capture ADC (max)
Z90233 TV receiver 16K
controller
236
236
236
300
300
42-pin SDIP
44-pin PQFP
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
4 Ch. 27
4 Ch. 27
4 Ch. 27
4 Ch. 27
4 Ch. 27
10/2
10/2
10/2
10/2
10/2
Z90234 TV receiver 24K
controller
42-pin SDIP
44-pin PQFP
Z90231 TV receiver 24K
42-pin SDIP
44-pin PQFP
controller
OTP
Z90255 TV receiver 32K
controller
42-pin SDIP
Z90251 TV receiver 32K
42-pin SDIP
controller
OTP
PB006903-0903
Z90233, Z90234, and Z90231
eZVision 200 Television Controller with On-Screen Display
8
Ordering Information
Part
PSI
Description
Z90233
Z9023306PSC Rxxxx*
Z9023306FSC Rxxxx*
16 KB masked ROM 42 SDIP
16 KB masked ROM 44 PQFP
Z90234
Z90231
Z9023406PSC Rxxxx*
Z9023406FSC Rxxxx*
24 KB masked ROM 42 SDIP
24 KB masked ROM 44 PQFP
Z9023106PSC
Z9023106FSC
24 KB OTP 42 SDIP
24 KB OTP 44 PQFP
Z90251
Z9025106PSC
32 KB OTP TV controller
32 KB masked ROM TV controller
Emulator/programmer
Protopak
Z90255
Z9025506PSC Rxxxx*
Z9025900ZEM
Z9020900TSC
Z9025900ZEM
Z9020900TSC
Z8933200ZCO
Z8933200ZCO
OSD evaluation board
* xxxx is a unique ROM number assigned to each customer code.
Document Disclaimer
© 2003 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applications, or
technology described is intended to suggest possible uses and may be superseded. ZiLOG, INC. DOES NOT
ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES,
OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG ALSO DOES NOT ASSUME LIABILITY FOR
INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES,
OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. Except with the express written approval ZiLOG, use of
information, devices, or technology as critical components of life support systems is not authorized. No licenses or
other rights are conveyed, implicitly or otherwise, by this document under any intellectual property rights.
PB006903-0903
相关型号：
©2020 ICPDF网 联系我们和版权申明