C1210C106M1RACTU_技术文档

SurfaceꢀMountꢀMultilayerꢀCeramicꢀChipꢀCapacitorsꢀ(SMDꢀMLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Overview

KEMET’sꢀX7Rꢀdielectricꢀfeaturesꢀaꢀ125°Cꢀmaximumꢀ

operatingꢀtemperatureꢀandꢀisꢀconsideredꢀ“temperatureꢀ

stable.”ꢀTheꢀElectronicsꢀComponents,ꢀAssembliesꢀ&ꢀ

MaterialsꢀAssociationꢀ(EIA)ꢀcharacterizesꢀX7Rꢀdielectricꢀasꢀ

aꢀClassꢀIIꢀmaterial.ꢀComponentsꢀofꢀthisꢀclassiﬁcationꢀareꢀ

ﬁxed,ꢀceramicꢀdielectricꢀcapacitorsꢀsuitedꢀforꢀbypassꢀandꢀ

decouplingꢀapplicationsꢀorꢀforꢀfrequencyꢀdiscriminatingꢀ

circuitsꢀwhereꢀQꢀandꢀstabilityꢀofꢀcapacitanceꢀcharacteristicsꢀ

areꢀnotꢀcritical.ꢀX7Rꢀexhibitsꢀaꢀpredictableꢀchangeꢀinꢀ

capacitanceꢀwithꢀrespectꢀtoꢀtimeꢀandꢀvoltageꢀandꢀboastsꢀaꢀ

minimalꢀchangeꢀinꢀcapacitanceꢀwithꢀreferenceꢀtoꢀambientꢀ

temperature.ꢀCapacitanceꢀchangeꢀisꢀlimitedꢀtoꢀ±15%ꢀfromꢀ

−55°Cꢀtoꢀ+125°C.

Beneﬁts

Applications

Typicalꢀapplicationsꢀincludeꢀdecoupling,ꢀbypass,ꢀﬁlteringꢀ

andꢀtransientꢀvoltageꢀsuppression.

•ꢀ −55°Cꢀtoꢀ+125°Cꢀoperatingꢀtemperatureꢀrange

• Lead (Pb)-free, RoHS, and REACH Compliant

•ꢀ Temperatureꢀstableꢀdielectric

• EIA 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825, 2220,

and 2225 case sizes

•ꢀ DCꢀvoltageꢀratingsꢀofꢀ6.3ꢀV,ꢀ10ꢀV,ꢀ16ꢀV,ꢀ25ꢀV,ꢀ35ꢀV,ꢀ50ꢀV,ꢀ

100ꢀV,ꢀ200ꢀV,ꢀandꢀ250ꢀV

•ꢀ Capacitanceꢀofferingsꢀrangingꢀfromꢀ10ꢀpFꢀtoꢀ47ꢀμF

• Available capacitance tolerances of ±5%, ±10% and ±20%

•ꢀ Non-polarꢀdevice,ꢀminimizingꢀinstallationꢀconcerns

•ꢀ 100%ꢀpureꢀmatteꢀtin-platedꢀterminationꢀﬁnishꢀallowingꢀforꢀ

excellent solderability

•ꢀ SnPbꢀterminationꢀﬁnishꢀoptionꢀavailableꢀuponꢀrequestꢀ

(5%ꢀPbꢀminimum)

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Ordering Information

C

1206

C

106

M

4

R

A

C

TU

Case Size Speciﬁcation/ Capacitance Capacitance RatedꢀVoltageꢀ

FailureꢀRate/ Termination

Packaging/

Grade (C-Spec)

Ceramic

Dielectric

R = X7R

(L" x W")

Series¹

Codeꢀ(pF)

Tolerance

(VDC)

Design

Finish²

0402

0603

0805

1206

1210

1808

1812

1825

2220

2225

C = Standard

Two

J = ±5%

K = ±10%

M = ±20%

9 = 6.3

A = N/A

C = 100%

Matte Sn

See

“Packagingꢀ

C-Spec

Orderingꢀ

Options

Table” below

signiﬁcantꢀ

digitsꢀandꢀ

numberꢀofꢀ

zeros.

8 = 10

4 = 16

3 = 25

6 = 35

5 = 50

1 = 100

2 = 200

A = 250

¹Flexible termination option is available. Please see FT-CAP product bulletin C1013_X7R_FT-CAP_SMD.

²Additional termination ﬁnish options may be available. Contact KEMET for details.

One world. One KEMET

C1002_X7R_SMD • 6/9/2017

1

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Packaging C-Spec Ordering Options Table

Packaging/Grade

Packaging Type¹

Ordering Code (C-Spec)

BulkꢀBag/Unmarked

7"ꢀReel/Unmarked

Notꢀrequiredꢀ(Blank)

TU

7411 (EIA 0603 and smaller case sizes)

7210ꢀ(EIAꢀ0805ꢀandꢀlargerꢀcaseꢀsizes)

TM

13"ꢀReel/Unmarked

7" Reel/Marked

7040 (EIA 0603 and smaller case sizes)

7215ꢀ(EIAꢀ0805ꢀandꢀlargerꢀcaseꢀsizes)

7081

13" Reel/Marked

7"ꢀReel/Unmarked/2mmꢀpitch²

13"ꢀReel/Unmarked/2mmꢀpitch²

7082

¹Default packaging is "Bulk Bag". An ordering code C-Spec is not required for "Bulk Bag" packaging.

¹The terms "Marked" and "Unmarked" pertain to laser marking option of capacitors. All packaging options labeled as "Unmarked" will contain capacitors

that have not been laser marked. Please contact KEMET if you require a laser marked option. For more information see "Capacitor Marking".

²The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case

size devices. For more information regarding 2 mm pitch option see "Tape & Reel Packaging Information".

Dimensions – Millimeters (Inches)

L

ꢁ

ꢂ

ꢀ

S

EIA Metric

Size Size

Code Code

S

L

W

Width

T

B

Mounting

Technique

Separation

Minimum

Length

Thickness

Bandwidth

SolderꢀReﬂowꢀ

0402

0603

0805

1005 1.00 (0.040)±0.05 (0.002) 0.50 (0.020)±0.05 (0.002)

0.30 (0.012)±0.10 (0.004) 0.30 (0.012)

0.35 (0.014)±0.15 (0.006) 0.70 (0.028)

0.50 (0.02)±0.25 (0.010) 0.75 (0.030)

Only

1608 1.60 (0.063)±0.15 (0.006) 0.80 (0.032)±0.15 (0.006)

Solder Wave or

SolderꢀReﬂow

2012 2.00 (0.079)±0.20 (0.008) 1.25 (0.049)±0.20 (0.008)

3216 3.20 (0.126)±0.20 (0.008) 1.60 (0.063)±0.20 (0.008)

1206

0.50 (0.02) ±0.25 (0.010)

1210¹

1808

1812

1825

2220

2225

3225 3.20 (0.126)±0.20 (0.008) 2.50 (0.098)±0.20 (0.008)

4520 4.70 (0.185)±0.50 (0.020) 2.00 (0.079)±0.20 (0.008)

4532 4.50 (0.177)±0.30 (0.012) 3.20 (0.126)±0.30 (0.012)

4564 4.50 (0.177)±0.30 (0.012) 6.40 (0.252)±0.40 (0.016)

5650 5.70 (0.224)±0.40 (0.016) 5.00 (0.197)±0.40 (0.016)

5664 5.60 (0.220)±0.40 (0.016) 6.40 (0.248)±0.40 (0.016)

0.50 (0.02)±0.25 (0.010)

0.60 (0.024)±0.35 (0.014)

See Table 2

forꢀThickness

N/A

0.60 (0.024)±0.35 (0.014)

SolderꢀReﬂowꢀ

Only

¹For capacitance values ≥ 4.7 µF add 0.02 (0.001) to the width tolerance dimension and 0.10 (0.004) to the length tolerance dimension.

2

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Qualiﬁcation/Certiﬁcation

CommercialꢀGradeꢀproductsꢀareꢀsubjectꢀtoꢀinternalꢀqualiﬁcation.ꢀDetailsꢀregardingꢀtestꢀmethodsꢀandꢀconditionsꢀareꢀ

referencedꢀinꢀTableꢀ4,ꢀPerformanceꢀ&ꢀReliability.

Environmental Compliance

Leadꢀ(Pb)-free,ꢀRoHS,ꢀandꢀREACHꢀcompliantꢀwithoutꢀexemptions.

Electrical Parameters/Characteristics

Item

Parameters/Characteristics

OperatingꢀTemperatureꢀRange

−55°Cꢀtoꢀ+125°Cꢀꢀ

CapacitanceꢀChangeꢀwithꢀReferenceꢀto

+25°Cꢀandꢀ0ꢀVDCꢀAppliedꢀ(TCC)

±15%

3.0%

¹AgingꢀRateꢀ(Maximumꢀ%ꢀCapacitanceꢀLoss/DecadeꢀHour)

250%ꢀofꢀratedꢀvoltage

(5±1ꢀsecondsꢀandꢀcharge/dischargeꢀnotꢀexceedingꢀ50mA)

²DielectricꢀWithstandingꢀVoltageꢀ(DWV)

³DissipationꢀFactorꢀ(DF)ꢀMaximumꢀLimitꢀatꢀ25°C

SeeꢀDissipationꢀFactorꢀLimitꢀTable

SeeꢀInsulationꢀResistanceꢀLimitꢀTable

(Ratedꢀvoltageꢀappliedꢀforꢀ120±5ꢀsecondsꢀatꢀ25°C)

⁴InsulationꢀResistanceꢀ(IR)ꢀMinimumꢀLimitꢀatꢀ25°C

¹Regarding Aging Rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part

number speciﬁc datasheet for referee time details.

²DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the

capacitor.

³Capacitance and dissipation factor (DF) measured under the following conditions:

1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF

120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF

⁴To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.

Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known

as Automatic Level Control (ALC). The ALC feature should be switched to "ON."

Insulation Resistance Limit Table (X7R Dielectric)

1,000 Megohm

Microfarads or 100 GΩ

500 Megohm

Microfarads or 10 GΩ

≥ꢀ0.012ꢀµF

100 Megohm

Microfarads or 10 GΩ

EIA Case Size

0402

0603

0805

1206

1210

1808

1812

1825

2220

2225

<ꢀ0.012ꢀµF

<ꢀ0.047ꢀµF

<ꢀꢀ0.15ꢀµFꢀ

<ꢀ0.47ꢀµF

<ꢀ0.39ꢀµF

ALL

N/A

≥ꢀ0.47ꢀµf

≥ꢀ2.2ꢀµf

≥ꢀ4.7ꢀµf

≥ꢀ10ꢀµf

N/A

≥ꢀ0.047ꢀµfꢀ<ꢀ0.47ꢀµf

≥ꢀ0.15ꢀµFꢀ<ꢀ2.2ꢀµf

≥ꢀ0.47ꢀµFꢀ<ꢀ4.7ꢀµf

≥ꢀ0.39ꢀµFꢀ<ꢀ10ꢀµf

N/A

<ꢀ2.2ꢀµF

ALL

≥ꢀ2.2ꢀµF

N/A

<ꢀ10ꢀµF

ALL

≥ꢀ10ꢀµF

N/A

C1002_X7R_SMD • 6/9/2017

3

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Post Environmental Limits

High Temperature Life, Biased Humidity, Moisture Resistance

Dissipation

Factorꢀ

(Maximumꢀ%)ꢀ

Rated DC

Voltage

Capacitance

Insulationꢀ

Resistance

Dielectric

Case Size

Value

Shiftꢀ

< 16

16/25

> 25

7.5

5.0

3.0

7.5

5.0

3.0

0402

All

< 16

16/25

> 25

<ꢀ1.0ꢀµF

≥ꢀ1.0ꢀµF

0603

0805

< 16

20.0

16/25

< 16

7.5

5.0

3.0

<ꢀ2.2ꢀµF

<ꢀ1.0ꢀµF

≥ꢀ2.2ꢀµF

≥ꢀ1.0ꢀµF

16/25

> 25

< 16

16/25

> 25

20.0

10% of Initial

Limit

X7R

± 20%

< 16

7.5

5.0

3.0

16/25

> 25

<ꢀ10ꢀµF

1206

35/50

< 16

≥ꢀ2.2ꢀµF

≥ꢀ10ꢀµF

20.0

16/25

< 16

7.5

5.0

3.0

16/25

> 25

<ꢀ22ꢀµF

≥ꢀ22ꢀµF

All

1210

< 16

20.0

16/25

< 16

7.5

5.0

3.5

1808-2225

16/25

> 25

C1002_X7R_SMD • 6/9/2017

4

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Dissipation Factor (DF) Limit Table

Dissipation

Factor

(Maximum

EIA Case

Size

Rated DC

Voltage

Capacitance

%)

5.0

3.5

10.0

2.5

5.0

3.5

2.5

< 16

16

All

0402

0603

25

<ꢀ0.1ꢀµF

≥ꢀ0.1ꢀµF

All

25

> 25

< 16

16/25

> 25

< 16

<ꢀ1.0ꢀµF

≥ꢀ1.0ꢀµF

10.0

16/25

< 16

5.0

3.5

2.5

<ꢀ2.2ꢀµF

<ꢀ1.0ꢀµF

≥ꢀ2.2ꢀµF

≥ꢀ1.0ꢀµF

16/25

> 25

< 16

0805

1206

16/25

> 25

< 16

10.0

5.0

3.5

16/25

> 25

35/50

< 16

<ꢀ10ꢀµF

2.5

≥ꢀ2.2ꢀµF

≥ꢀ10ꢀꢀµF

10.0

16/25

< 16

5.0

3.5

2.5

16/25

> 25

< 16

<ꢀ22ꢀµF

≥ꢀ22ꢀµF

All

1210

10.0

16/25

< 16

5.0

3.5

2.5

1808–2225

16/25

> 25

C1002_X7R_SMD • 6/9/2017

5

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes)

Case Size/

Series

C0402C

C0603C

C0805C

C1206C

Cap

Code

Voltage Code

9

8

4

3

5

9

8

4

3

5

1

2

9

8

4

3

6

5

1

2

A

9

8

4

3

6

5

1

2

A

Cap

Rated Voltage

(VDC)

Cap Tolerance

Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

10-20ꢀpF*

22ꢀpF

24-91pF

100-150ꢀpF** 101-151**

180-820ꢀpF** 181-821**

100-200*

220

240-910*

J

K

M

BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN

BB BB BB BB BB CF CF CF CF CF CF CF DM DM DM DM DM DM DN DN

BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN

EB EB EB EB EB EB EB EB

BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB

1000pF

1200ꢀpF

1500ꢀpF

1800ꢀpF

2200ꢀpF

2700ꢀpF

3300ꢀpF

3900ꢀpF

4700ꢀpF

5600ꢀpF

6800ꢀpF

8200ꢀpF

10000ꢀpF

12000ꢀpF

15000ꢀpF

18000ꢀpF

22000ꢀpF

27000ꢀpF

33000ꢀpF

39000ꢀpF

47000ꢀpF

56000ꢀpF

68000ꢀpF

82000ꢀpF

0.1ꢀµF

102

122

152

182

222

272

332

392

472

562

682

822

103

123

153

183

223

273

333

393

473

563

683

823

104

124

154

184

224

274

334

394

474

564

684

824

105

125

155

185

225

275

BB BB BB BB BB CF CF CF CF CF CF CF DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

BB BB BB BB BB CF CF CF CF CF CF

DN DN DN DN DN DN DN DN DN EB EB EB EB EB EB EB EB EB

BB BB BB BB

BB BB BB

BB BB BB BB¹

CF CF CF CF CF CF

CF CF CF CF CJ CF

CF CF CF CF CF

CJ CJ CJ CJ CJ

CF CF CF CF CF

CF CF CF CF

DN DN DN DN DN DN DP DE

DO DO DO DO DO DO DE DG

DP DP DP DP DP DP DE DG

DP DP DP DP DP DP DE

DN DN DN DN DN DN DE

DN DN DN DN DP DP DG

DN DN DN DN DG DG DG

DP DP DP DP DP DP

DG DG DG DG DP DP

DG DG DG DG DE DE

DP DP DP DG DH DH

DP DP DP DG

EB EB EB EB EB EB EB EB EB

EB EB EB EB EB EB EC EB EB

EB EB EB EB EB EB EC ED ED

EB EB EB EB EB EB EB ED ED

EB EB EB EB EB EB EB EM EM

EC EC EC EC EC EC EC EG

EC EC EC EC EC EC EC

EB EB EB EB EC EC EM

EB EB EB EB EC EC EG

EC EC EC EC EC EC EG

ED ED ED ED EC EC EM

EE EE EE EE ED ED EM

EF EF EF EF ED ED EH

EP EP EP EP ED ED EH

ED ED ED EG EH EH

0.12ꢀµF

0.15ꢀµF

0.18ꢀµF

0.22ꢀµF

0.27ꢀµF

0.33ꢀµF

0.39ꢀµF

0.47ꢀµF

0.56ꢀµF

0.68ꢀµF

0.82ꢀµF

1ꢀµF

1.2ꢀµF

1.5ꢀµF

1.8ꢀµF

2.2ꢀµF

CF CF CF CF

CF CF CF

CF CF CF CG¹

CG¹ CG¹ CG¹ CD¹

CG¹ CG¹

DP DP DP DG DG¹ DG¹

DE DE DE

DG DG DG

DG DG DG DG¹

ED ED ED EG EH EH

ED ED ED EF EH EH

EH EH EH¹ EH¹ EH EH

EN EN EN EH

2.7ꢀµF

Rated Voltage

(VDC)

Cap

Code

Voltage Code

9

8

4

3

5

9

8

4

3

5

1

2

9

8

4

3

6

5

1

2

A

9

8

4

3

6

5

1

2

A

Cap

Case Size/

Series

C0402C

C0603C

C0805C

C1206C

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82, and 91)

**Capacitance range Includes E12 decade values only. (i.e., 10, 12, 15, 18, 22, 27, 33, 39, 47, 56, 68, and 82)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage

capability within the same form factor (conﬁguration and dimensions).

xx¹Available only in K, M tolerance.

xx²Available only in M tolerance.

C1002_X7R_SMD • 6/9/2017

6

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 1A – Capacitance Range/Selection Waterfall (0402 – 1206 Case Sizes) cont'd

Case Size/

Series

C0402C

C0603C

C0805C

C1206C

Cap

Code

Voltage Code

9

8

4

3

5

9

8

4

3

5

1

2

9

8

4

3

6

5

1

2

A

9

8

4

3

6

5

1

2

A

Cap

Rated Voltage

(VDC)

Cap Tolerance

Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

3.3ꢀµF

3.9ꢀµF

4.7ꢀµF

5.6ꢀµF

6.8ꢀµF

8.2ꢀµF

10ꢀµF

335

395

475

565

685

825

106

226

J

K

M

ED ED ED EH

EF EF EF EH

EH EH EH EH EH¹ EH¹

EH EH EH

EH EH EH EH

EH¹ EH¹

DG DG DG

DH DH

22ꢀµF

Rated Voltage

(VDC)

Cap

Code

Voltage Code

9

8

4

3

5

9

8

4

3

5

1

2

9

8

4

3

6

5

1

2

A

9

8

4

3

6

5

1

2

A

Cap

Case Size/

Series

C0402C

C0603C

C0805C

C1206C

Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes)

Case Size/

Series

C1210C

C1808C

C1812C

C1825C

C2220C

C2225C

Cap

Code

Voltage Code

9

8

4

3

5

1

2

A

5

1

2

3

5

1

2

A

5

1

2

A

3

5

1

2

A

5

1

2

A

Cap

Rated Voltage

(VDC)

Cap Tolerance

Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

10ꢀ-ꢀ91ꢀpF*

11ꢀpF

12ꢀpF

13ꢀpF

15ꢀpF

16ꢀpF

18ꢀpF

20ꢀpF

22ꢀpF

24ꢀpF

27ꢀpF

30ꢀpF

33ꢀpF

36ꢀpF

39ꢀpF

43ꢀpF

47ꢀpF

51ꢀpF

56ꢀpF

100ꢀ-ꢀ910*

110

120

130

150

J

K

M

FB FB FB FB FB FB FB

160

180

200

220

240

270

300

330

360

390

430

470

510

560

Rated Voltage

(VDC)

Cap

Code

Voltage Code

9

8

4

3

5

1

2

A

5

1

2

3

5

1

2

A

5

1

2

A

3

5

1

2

A

5

1

2

A

Cap

Case Size/

Series

C1210C

C1808C

C1812C

C1825C

C2220C

C2225C

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82, and 91)

**Capacitance range Includes E12 decade values only. (i.e., 10, 12, 15, 18, 22, 27, 33, 39, 47, 56, 68, and 82)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage

capability within the same form factor (conﬁguration and dimensions).

xx¹Available only in K, M tolerance.

xx²Available only in M tolerance.

C1002_X7R_SMD • 6/9/2017

7

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes) cont'd

Case Size/

Series

C1210C

C1808C

C1812C

C1825C

C2220C

C2225C

Cap

Code

Voltage Code

9

8

4

3

5

1

2

A

5

1

2

3

5

1

2

A

5

1

2

A

3

5

1

2

A

5

1

2

A

Cap

Rated Voltage

(VDC)

Cap Tolerance

Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

62ꢀpF

68ꢀpF

75ꢀpF

82ꢀpF

91ꢀpF

620

680

750

820

910

J

K

M

FB FB FB FB FB FB FB

100ꢀ-ꢀ270ꢀpF** 101ꢀ-ꢀ271**

110ꢀpF

120ꢀpF

130ꢀpF

150ꢀpF

180ꢀpF

220ꢀpF

270ꢀpF

330ꢀpF

390ꢀpF

470 - 1,200

pF**

560ꢀpF

680ꢀpF

820ꢀpF

1,000ꢀpF

1,200ꢀpF

1,500ꢀpF

1,800ꢀpF

2,200ꢀpF

2,700ꢀpF

3,300ꢀpF

3,900ꢀpF

4,700ꢀpF

5,600ꢀpF

6,800ꢀpF

8,200ꢀpF

10,000ꢀpF

12,000ꢀpF

15,000ꢀpF

18,000ꢀpF

22,000ꢀpF

27,000ꢀpF

33,000ꢀpF

39,000ꢀpF

47,000ꢀpF

56,000ꢀpF

68,000ꢀpF

82,000ꢀpF

0.10ꢀµF

111

121

131

151

181

221

271

331

391

LF LF LF

471ꢀ-ꢀ122**

J

K

M

FB FB FB FB FB FB FB

LF LF LF GB GB GB GB

561

681

821

102

122

152

182

222

272

332

392

472

562

682

822

103

123

153

183

223

273

333

393

473

563

683

823

104

J

K

M

FB FB FB FB FB FB FB

FB FB FB FB FB FB FE

FB FB FB FB FB FB FB FB LF LF LF GB GB GB GB

FB FB FB FB FB FB FB FB LF LF

LF LF LF GB GB GB GB

GB GB GB GB

HB HB HB

FB FB FB FB FB FB FB FB LD LD LD GB GB GB GD

FB FB FB FB FB FB FB FB LD LD LD GB GB GB GH

KE KE KE

KE KE

FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HB

FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB HE

FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HB

FB FB FB FB FB FB FB FB LD LD LD GB GB GB GB GB HB HE

FB FB FB FB FB FB FB FB LD LD

FB FB FB FB FB FB FC FC LD LD

FB FB FB FB FB FB FC FC LD

FB FB FB FB FB FC FF FF LD

FB FB FB FB FB FD FG FG LD

JE JE JE

GB GB GB GB GB HB HB HB HB JE JE JE

GB GB GB GB GB HB HB HB HB JB JB JB

GB GB GB GB GB HB HB HB HB JC JC JC JC JC

KE KE

KE

GB GB GB GB GB HB HB HB HB JC JC JC JC JC KC KC KC KC

Rated Voltage

(VDC)

Cap

Code

Voltage Code

9

8

4

3

5

1

2

A

5

1

2

3

5

1

2

A

5

1

2

A

3

5

1

2

A

5

1

2

A

Cap

Case Size/

Series

C1210C

C1808C

C1812C

C1825C

C2220C

C2225C

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82, and 91)

**Capacitance range Includes E12 decade values only. (i.e., 10, 12, 15, 18, 22, 27, 33, 39, 47, 56, 68, and 82)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage

capability within the same form factor (conﬁguration and dimensions).

xx¹Available only in K, M tolerance.

xx²Available only in M tolerance.

C1002_X7R_SMD • 6/9/2017

8

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes) cont'd

Case Size/

Series

C1210C

C1808C

C1812C

C1825C

C2220C

C2225C

Cap

Code

Voltage Code

9

8

4

3

5

1

2

A

5

1

2

3

5

1

2

A

5

1

2

A

3

5

1

2

A

5

1

2

A

Cap

Rated Voltage

(VDC)

Cap Tolerance

Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions

0.12ꢀµF

0.15ꢀµF

0.18ꢀµF

0.22ꢀµF

0.27ꢀµF

0.33ꢀµF

0.39ꢀµF

0.47ꢀµF

0.56ꢀµF

0.68ꢀµF

0.82ꢀµF

1.0ꢀµF

1.2ꢀµF

1.5ꢀµF

1.8ꢀµF

2.2ꢀµF

2.7ꢀµF

3.3ꢀµF

3.9ꢀµF

4.7ꢀµF

5.6ꢀµF

6.8ꢀµF

8.2ꢀµF

10ꢀµF

124

154

184

224

274

334

394

474

564

684

824

105

125

155

185

225

275

335

395

475

565

685

825

106

126

156

186

226

476

J

K

M

FB FB FB FB FB FD FH FH LD

FC FC FC FC FC FD FM FM LD

FC FC FC FC FC FD FK FK LD

FC FC FC FC FC FD FK FK

FC FC FC FC FC FD

FD FD FD FD FD FD

FD FD FD FD FD FF

FD FD FD FD FD FG

FF FF FF FF FF FL

FH FH FH FH FH FM

FH FH FH FH FG FH

FH FH FH FH FG FM

FH FH FH FH FG FJ

FJ FJ FJ FJ FG FT¹

FE FE FE FG FH

FF FF FF FM FM

FG FG FG FG FK

FC FC FC FG FS

FF FF FF FH

FG FG FG FM

FH FH FH FK

FT¹ FT¹ FT¹ FS¹ FS¹

GB GB GB GB GB HB HB HB HB JC JC JC JC JC KC KC KC KC

GB GB GB GE GE HB HB HB HB JC JC JC JC JC KC KC KC KC

GB GB GB GG GG HB HB HB HB JC JC JC JC JC KC KC KC KC

GB GB GG GG GG HB HB HB HB JC JC JC JC JC KB KC KC KC

GB GB GG GG GG HB HB HD HD JC JC JC JC JC KB KC KC KC

GB GB GG GJ GJ HB HB HD HD JC JC JC JC JC KB KC KD KD

GC GC GG

GE GE GG

GB GB GB

GC GC GC

GE GE GE

GO GO GO¹

GJ GJ GJ

GL GL GL

HB HD HD HD JC JC JC JD JD KB KC KD KD

HB HD HD HD JC JC JD JD JD KB KC KD KD

HB HF HF HF JC JC JF JF JF KB KC KE KE

HB HF HF HF JC JC JF JF JF KB KD KE KE

HB

HC

HD

HF

JC JC

JD JD

JF JF

KB KE KE KE

KC

KD

GK GK

JF JF

GK

JF JO

JO JO

JO

12ꢀµF

15ꢀµF

18ꢀµF

22ꢀµF

FM FM

FS FS FS¹ FS¹

FS¹ FS¹

47ꢀµF

Rated Voltage

(VDC)

Cap

Code

Voltage Code

9

8

4

3

5

1

2

A

5

1

2

3

5

1

2

A

5

1

2

A

3

5

1

2

A

5

1

2

A

Cap

Case Size/

Series

C1210C

C1808C

C1812C

C1825C

C2220C

C2225C

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82, and 91)

**Capacitance range Includes E12 decade values only. (i.e., 10, 12, 15, 18, 22, 27, 33, 39, 47, 56, 68, and 82)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage

capability within the same form factor (conﬁguration and dimensions).

xx¹Available only in K, M tolerance.

xx²Available only in M tolerance.

C1002_X7R_SMD • 6/9/2017

9

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 2A – Chip Thickness/Tape & Reel Packaging Quantities

Paper Quantity¹

Plastic Quantity

Thickness Case Thickness ±

Code

Size¹Range (mm)

7" Reel

13" Reel

7" Reel

13" Reel

BB

CF

CG

CD

CJ

DM

DN

DO

DP

DE

DG

DH

EB

EC

EN

ED

EE

0402

0603

0805

1206

1210

1706

1808

1812

1825

0.50±0.05

0.80±0.07*

0.80±0.10*

0.80±0.15

0.80±0.15*

0.70±0.20*

0.78±0.10*

0.80±0.10*

0.90±0.10*

1.00±0.10

1.25±0.15

1.25±0.20

0.78±0.10

0.90±0.10

0.95±0.10

1.00±0.10

1.10±0.10

1.20±0.15

1.20±0.20

1.25±0.15

1.60±0.15

1.60±0.20

0.78±0.10

0.90±0.10

0.95±0.10

1.00±0.10

1.10±0.10

1.25±0.15

1.40±0.15

1.55±0.15

1.70±0.20

1.85±0.20

1.90±0.20

2.10±0.20

2.50±0.30

0.90±0.10

1.00±0.15

0.90±0.10

1.00±0.15

1.00±0.10

1.10±0.10

1.25±0.15

1.30±0.10

1.40±0.15

1.55±0.10

1.60±0.20

1.70±0.15

1.90±0.20

2.50±0.20

1.10±0.15

10,000

4,000

50,000

15,000

10,000

15,000

0

10,000

0

4,000

0

2,500

4,000

2,500

2,000

4,000

2,500

2,000

1,000

4,000

2,500

1,000

500

10,000

8,000

10,000

8,000

4,000

10,000

4,000

2,000

4,000

0

4,000

0

EF

EP

EM

EG

EH

FB

FC

FD

FE

FF

FG

FL

FH

FM

FJ

FT

FK

FS

NA

NC

LD

LF

GB

GC

GD

GE

GH

GG

GK

GJ

GL

GO

HB

0

500

1,000

0

7" Reel

13" Reel

7" Reel

13" Reel

Thickness

Code

Case

Size¹

Thickness ±

Range (mm)

Paper Quantity1

Plastic Quantity

Package quantity based on ﬁnished chip thickness speciﬁcations.

¹If ordering using the 2 mm Tape and Reel pitch option, the packaging quantity outlined in the table above will be doubled. This option is limited to EIA

0603 (1608 metric) case size devices. For more information regarding 2 mm pitch option see "Tape & Reel Packaging Information".

C1002_X7R_SMD • 6/9/2017 10

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 2A – Chip Thickness/Tape & Reel Packaging Quantities cont'd

Paper Quantity¹

Plastic Quantity

7" Reel 13" Reel

Thickness Case Thickness ±

Code

Size¹Range (mm)

7" Reel 13" Reel

HC

HD

HE

HF

JB

JC

JD

JE

1825

2220

2225

1.15±0.15

1.30 ± 0.15

1.40 ± 0.15

1.50 ± 0.15

1.00 ± 0.15

1.10 ± 0.15

1.30 ± 0.15

1.40 ± 0.15

1.50 ± 0.15

2.40 ± 0.15

1.00 ± 0.15

1.10 ± 0.15

1.30 ± 0.15

1.40 ± 0.15

0

1,000

4,000

0

1,000

500

1,000

4,000

2,000

4,000

JF

JO

KB

KC

KD

KE

7" Reel

13" Reel

7" Reel

13" Reel

Thickness

Code

Case

Size¹

Thickness ±

Range (mm)

Paper Quantity1

Plastic Quantity

Package quantity based on ﬁnished chip thickness speciﬁcations.

¹If ordering using the 2 mm Tape and Reel pitch option, the packaging quantity outlined in the table above will be doubled. This option is limited to EIA

0603 (1608 metric) case size devices. For more information regarding 2 mm pitch option see "Tape & Reel Packaging Information".

Table 2B – Bulk Packaging Quantities

Loose Packaging

Packaging Type

BulkꢀBagꢀ(default)

PackagingꢀC-Spec¹

N/A²

Case Size

Packaging Quantities (pieces/unit packaging)

EIA (in)

Metric (mm)

Minimum

Maximum

0402

0603

0805

1206

1210

1808

1812

1825

2220

2225

1005

1608

2012

3216

3225

4520

4532

4564

5650

5664

50,000

1

20,000

¹The "Packaging C-Spec" is a 4 to 8 digit code which identiﬁes the packaging type and/or product grade. When ordering, the proper code must be

included in the 15th through 22nd character positions of the ordering code. See "Ordering Information" section of this document for further details.

Commercial Grade product ordered without a packaging C-Spec will default to our standard "Bulk Bag" packaging. Contact KEMET if you require a bulk

bag packaging option for Automotive Grade products.

²A packaging C-Spec (see note 1 above) is not required for "Bulk Bag" packaging (excluding Anti-Static Bulk Bag and Automotive Grade products). The

15th through 22nd character positions of the ordering code should be left blank. All product ordered without a packaging C-Spec will default to our

standard "Bulk Bag" packaging.

C1002_X7R_SMD • 6/9/2017 11

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351

EIA

Size

Code

Metric

Size

Code

Density Level A:

Maximum (Most)

Land Protrusion (mm)

Density Level B:

Median (Nominal)

Land Protrusion (mm)

Density Level C:

Minimum (Least)

Land Protrusion (mm)

C

Y

X

V1

V2

C

Y

X

V1

V2

C

Y

X

V1

V2

0402

0603

0805

1206

1210

1210¹

1808

1812

1825

2220

2225

1005

1608

2012

3216

3225

4520

4532

4564

5650

5664

0.50

0.72

2.20

1.20

0.45

0.62

1.90

1.00

0.40

0.52

1.60

0.80

0.90

1.00

1.60

1.50

2.30

2.15

2.75

2.70

1.15

1.35

1.60

1.75

1.60

1.70

1.10

1.55

1.90

2.80

2.90

2.30

3.60

6.90

5.50

6.90

4.00

4.40

5.60

5.65

5.60

7.40

6.90

8.20

8.10

2.10

2.60

2.90

3.80

3.90

3.30

4.60

7.90

6.50

7.90

0.80

0.90

1.50

1.40

2.20

2.05

2.65

2.60

0.95

1.15

1.40

1.55

1.40

1.50

1.00

1.45

1.80

2.70

2.80

2.20

3.50

6.80

5.40

6.80

3.10

3.50

4.70

6.50

6.00

7.30

7.20

1.50

2.00

2.30

3.20

3.30

2.70

4.00

7.30

5.90

7.30

0.60

0.75

1.40

1.30

2.10

1.95

2.55

2.50

0.75

0.95

1.20

1.35

1.20

1.30

0.90

1.35

1.70

2.60

2.70

2.10

3.40

6.70

5.30

6.70

2.40

2.80

4.00

5.80

5.30

6.60

6.50

1.20

1.70

2.00

2.90

3.00

2.40

3.70

7.00

5.60

7.00

¹Only for capacitance values ≥ 22 µF

Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reﬂow

solder processes. KEMET only recommends wave soldering of EIA 0603, 0805, and 1206 case sizes.

Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reﬂow solder processes.

Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform

qualiﬁcation testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).

Image below based on Density Level B for an EIA 1210 case size.

Vꢁ

ꢀ

V2

X

C

Grid ꢂlacement Courtyard

C1002_X7R_SMD • 6/9/2017 12

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Soldering Process

Recommended Soldering Technique:

ꢀ •ꢀSolderꢀwaveꢀorꢀsolderꢀreﬂowꢀforꢀEIAꢀcaseꢀsizesꢀ0603,ꢀ0805ꢀandꢀ1206

ꢀ •ꢀAllꢀotherꢀEIAꢀcaseꢀsizesꢀareꢀlimitedꢀtoꢀsolderꢀreﬂowꢀonly

Recommended Reﬂow Soldering Proﬁle:

KEMET’sꢀfamiliesꢀofꢀsurfaceꢀmountꢀmultilayerꢀceramicꢀcapacitorsꢀ(SMDꢀMLCCs)ꢀareꢀcompatibleꢀwithꢀwaveꢀ(singleꢀorꢀdual),ꢀ

convection,ꢀIRꢀorꢀvaporꢀphaseꢀreﬂowꢀtechniques.ꢀPreheatingꢀofꢀtheseꢀcomponentsꢀisꢀrecommendedꢀtoꢀavoidꢀextremeꢀthermalꢀ

stress.ꢀKEMET’sꢀrecommendedꢀproﬁleꢀconditionsꢀforꢀconvectionꢀandꢀIRꢀreﬂowꢀreﬂectꢀtheꢀproﬁleꢀconditionsꢀofꢀtheꢀIPC/

J-STD-020ꢀstandardꢀforꢀmoistureꢀsensitivityꢀtesting.ꢀTheseꢀdevicesꢀcanꢀsafelyꢀwithstandꢀaꢀmaximumꢀofꢀthreeꢀreﬂowꢀpassesꢀ

atꢀtheseꢀconditions.

Termination Finish

ꢀ_ꢂ

ꢀ_L

t_ꢂ

Proﬁle Feature

Maꢁimum Ramp ꢃp Rate ꢄ 3ꢅCꢆsec

Maꢁimum Ramp Doꢇn Rate ꢄ 6ꢅCꢆsec

SnPb

100% Matte Sn

t_L

Preheat/Soak

TemperatureꢀMinimumꢀ(T_Smin

)

100°C

150°C

200°C

ꢀ_smaꢁ

ꢀ_smin

TemperatureꢀMaximumꢀ(T_Smax

)

Time (t_S) from T_Sminto T_Smax

60 – 120 seconds

t_s

3°C/second

maximum

3°C/second

maximum

Ramp-UpꢀRateꢀ(T_Lto T_P)

25

25ꢅC to ꢂeaꢈ

LiquidousꢀTemperatureꢀ(T_L)

TimeꢀAboveꢀLiquidousꢀ(t_L)

PeakꢀTemperatureꢀ(T_P)

183°C

60 – 150 seconds

235°C

217°C

60 – 150 seconds

260°C

Tiꢀe

TimeꢀWithinꢀ5°CꢀofꢀMaximumꢀ

20 seconds

maximum

30 seconds

maximum

PeakꢀTemperatureꢀ(t_P)

6°C/second

maximum

6°C/second

maximum

Ramp-Down Rate (T_Pto T_L)

Timeꢀ25°CꢀtoꢀPeakꢀ

Temperature

6ꢀminutes

maximum

8ꢀminutes

maximum

Note 1: All temperatures refer to the center of the package, measured on the

capacitor body surface that is facing up during assembly reﬂow.

C1002_X7R_SMD • 6/9/2017 13

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Table 4 – Performance & Reliability: Test Methods and Conditions

Stress

Reference

Test or Inspection Method

TerminalꢀStrength

JIS–C–6429

Appendixꢀ1,ꢀNote:ꢀForceꢀofꢀ1.8ꢀkgꢀforꢀ60ꢀseconds.

Appendixꢀ2,ꢀNote:ꢀStandardꢀterminationꢀsystemꢀ–ꢀ2.0ꢀmmꢀ(minimum)ꢀforꢀallꢀexceptꢀ3ꢀmmꢀforꢀ

C0G.ꢀFlexibleꢀterminationꢀsystemꢀ–ꢀ3.0ꢀmmꢀ(minimum).

BoardꢀFlex

JIS–C–6429

Magniﬁcationꢀ50ꢀX.ꢀConditions:

ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀa)ꢀMethodꢀB,ꢀ4ꢀhoursꢀatꢀ155°C,ꢀdryꢀheatꢀatꢀ235°C

ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀb)ꢀMethodꢀBꢀatꢀ215°Cꢀcategoryꢀ3

Solderability

J–STD–002

ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀc)ꢀMethodꢀD,ꢀcategoryꢀ3ꢀatꢀ260°C

TemperatureꢀCycling JESD22ꢀMethodꢀJA–104

1,000ꢀCyclesꢀ(−55°Cꢀtoꢀ+125°C).ꢀMeasurementꢀatꢀ24ꢀhoursꢀ+/−ꢀ4ꢀhoursꢀafterꢀtestꢀconclusion.

LoadꢀHumidity:ꢀ1,000ꢀhoursꢀ85°C/85%ꢀRHꢀandꢀratedꢀvoltage.ꢀAddꢀ100ꢀKꢀohmꢀresistor.ꢀ

Measurementꢀatꢀ24ꢀhoursꢀ+/−ꢀ4ꢀhoursꢀafterꢀtestꢀconclusion.

LowꢀVoltꢀHumidity:ꢀ1,000ꢀhoursꢀ85°C/85%ꢀRHꢀandꢀ1.5ꢀV.ꢀAddꢀ100ꢀKꢀohmꢀresistor.ꢀ

Measurementꢀatꢀ24ꢀhoursꢀ+/−ꢀ4ꢀhoursꢀafterꢀtestꢀconclusion.

tꢀ=ꢀ24ꢀhours/cycle.ꢀStepsꢀ7aꢀandꢀ7bꢀnotꢀrequired.

Measurementꢀatꢀ24ꢀhoursꢀ+/−ꢀ4ꢀhoursꢀafterꢀtestꢀconclusion.

−55°C/+125°C.ꢀNote:ꢀNumberꢀofꢀcyclesꢀrequiredꢀ–ꢀ300.ꢀMaximumꢀtransferꢀtimeꢀ–ꢀ20ꢀ

seconds.

MIL–STD–202ꢀMethodꢀ

BiasedꢀHumidity

103

MIL–STD–202ꢀMethodꢀ

MoistureꢀResistance

106

MIL–STD–202ꢀMethodꢀ

ThermalꢀShock

107

Dwellꢀtimeꢀ–ꢀ15ꢀminutes.ꢀAirꢀ–ꢀAir.

1,000ꢀhoursꢀatꢀ125°Cꢀwithꢀ2ꢀXꢀratedꢀvoltageꢀappliedꢀexcludingꢀtheꢀfollowing:

Case Size

0603ꢀ&ꢀ0805

1206ꢀ&ꢀ1210

Capacitance

≥ꢀ1.0ꢀµF

Applied Voltage

MIL–STD–202ꢀMethodꢀ

HighꢀTemperatureꢀLife

108

/EIA–198

1.5 X

≥ꢀ10ꢀµF

MIL–STD–202ꢀMethodꢀ

StorageꢀLife

Vibration

150°C,ꢀ0ꢀVDCꢀforꢀ1,000ꢀhours.

108

5ꢀg'sꢀforꢀ20ꢀminutes,ꢀ12ꢀcyclesꢀeachꢀofꢀ3ꢀorientations.ꢀNote:ꢀUseꢀ8"ꢀXꢀ5"ꢀPCBꢀ0.031"ꢀthickꢀ

7ꢀsecureꢀpointsꢀonꢀoneꢀlongꢀsideꢀandꢀ2ꢀsecureꢀpointsꢀatꢀcornersꢀofꢀoppositeꢀsides.ꢀPartsꢀ

mountedꢀwithinꢀ2"ꢀfromꢀanyꢀsecureꢀpoint.ꢀTestꢀfromꢀ10ꢀ–ꢀ2,000ꢀHz

MIL–STD–202ꢀMethodꢀ

204

MIL–STD–202ꢀMethodꢀ

MechanicalꢀShock

Figureꢀ1ꢀofꢀMethodꢀ213,ꢀConditionꢀF.

213

MIL–STD–202ꢀMethodꢀ

215

Resistance to Solvents

Addꢀaqueousꢀwashꢀchemical,ꢀOKEMꢀCleanꢀorꢀequivalent.

Storage & Handling

Ceramicꢀchipꢀcapacitorsꢀshouldꢀbeꢀstoredꢀinꢀnormalꢀworkingꢀenvironments.ꢀWhileꢀtheꢀchipsꢀthemselvesꢀareꢀquiteꢀrobustꢀinꢀ

otherꢀenvironments,ꢀsolderabilityꢀwillꢀbeꢀdegradedꢀbyꢀexposureꢀtoꢀhighꢀtemperatures,ꢀhighꢀhumidity,ꢀcorrosiveꢀatmospheres,ꢀ

andꢀlongꢀtermꢀstorage.ꢀInꢀaddition,ꢀpackagingꢀmaterialsꢀwillꢀbeꢀdegradedꢀbyꢀhighꢀtemperature–reelsꢀmayꢀsoftenꢀorꢀwarpꢀ

andꢀtapeꢀpeelꢀforceꢀmayꢀincrease.ꢀKEMETꢀrecommendsꢀthatꢀmaximumꢀstorageꢀtemperatureꢀnotꢀexceedꢀ40ºCꢀandꢀmaximumꢀ

storageꢀhumidityꢀnotꢀexceedꢀ70%ꢀrelativeꢀhumidity.ꢀTemperatureꢀﬂuctuationsꢀshouldꢀbeꢀminimizedꢀtoꢀavoidꢀcondensationꢀonꢀ

theꢀpartsꢀandꢀatmospheresꢀshouldꢀbeꢀfreeꢀofꢀchlorineꢀandꢀsulfurꢀbearingꢀcompounds.ꢀForꢀoptimizedꢀsolderabilityꢀchipꢀstockꢀ

shouldꢀbeꢀusedꢀpromptly,ꢀpreferablyꢀwithinꢀ1.5ꢀyearsꢀofꢀreceipt.

C1002_X7R_SMD • 6/9/2017 14

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Construction (Typical)

ꢀeꢁaileꢂ ꢃrꢄꢅꢅ ꢆeꢇꢁiꢄꢈ

Dielectric Material

(ꢀaꢁiꢂ₃)

Dielectric

Material (ꢀaꢁiꢂ₃)

ꢀarrier Layer

(ꢃi)

ꢁermination

ꢆinish

(ꢇ00ꢈ Matte Sn)

ꢅnd ꢁerminationꢉ

ꢅꢊternal ꢅlectrode

(Cu)

ꢄnner ꢅlectrodes

(ꢃi)

ꢅnd ꢁerminationꢉ

ꢅꢊternal ꢅlectrode

(Cu)

ꢀarrier Layer

(ꢃi)

ꢁermination

ꢆinish

(ꢇ00ꢈ Matte Sn)

ꢄnner ꢅlectrodes

(ꢃi)

C1002_X7R_SMD • 6/9/2017 15

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Capacitor Marking (Optional):

Theseꢀsurfaceꢀmountꢀmultilayerꢀceramicꢀcapacitorsꢀareꢀ

normallyꢀsuppliedꢀunmarked.ꢀIfꢀrequired,ꢀtheyꢀcanꢀbeꢀ

markedꢀasꢀanꢀextraꢀcostꢀoption.ꢀMarkingꢀisꢀavailableꢀ

onꢀmostꢀKEMETꢀdevicesꢀbutꢀmustꢀbeꢀrequestedꢀusingꢀ

theꢀcorrectꢀorderingꢀcodeꢀidenti ꢀer(s).ꢀIfꢀthisꢀoptionꢀisꢀ

requested,ꢀtwoꢀsidesꢀofꢀtheꢀceramicꢀbodyꢀwillꢀbeꢀlaserꢀ

markedꢀwithꢀaꢀ“K”ꢀtoꢀidentifyꢀKEMET,ꢀfollowedꢀbyꢀtwoꢀ

charactersꢀ(perꢀEIA–198ꢀ-ꢀseeꢀtableꢀbelow)ꢀtoꢀidentifyꢀtheꢀ

capacitanceꢀvalue.ꢀEIAꢀ0603ꢀcaseꢀsizeꢀdevicesꢀareꢀlimitedꢀ

toꢀtheꢀ“K”ꢀcharacterꢀonly.

•ꢀ X7Rꢀdielectricꢀproductsꢀinꢀcapacitanceꢀvaluesꢀoutlinedꢀ

below

Markingꢀappearsꢀinꢀlegibleꢀcontrast.ꢀIllustratedꢀbelowꢀisꢀanꢀ

exampleꢀofꢀanꢀMLCCꢀwithꢀlaserꢀmarkingꢀofꢀ“KA8”,ꢀwhichꢀ

designatesꢀaꢀKEMETꢀdeviceꢀwithꢀratedꢀcapacitanceꢀofꢀ100ꢀµF.ꢀ

Orientationꢀofꢀmarkingꢀisꢀvendorꢀoptional.ꢀ

2ꢄDiꢅit

ꢀꢁMꢁꢂ

Capacitance

ꢃD

Laserꢀmarkingꢀoptionꢀisꢀnot available on:

•ꢀ C0G,ꢀUltraꢀStableꢀX8RꢀandꢀY5Vꢀdielectricꢀdevicesꢀ

• EIA 0402 case size devices

Code

•ꢀ EIAꢀ0603ꢀcaseꢀsizeꢀdevicesꢀwithꢀFlexibleꢀTerminationꢀ

option.

•ꢀ KPSꢀCommercialꢀandꢀAutomotiveꢀGradeꢀstackedꢀdevices.

EIA Case Size

Metric Size Code

Capacitance

0603

0805

1206

1210

1808

1812

1825

2220

2225

1608

2012

3216

3225

4520

4532

4564

5650

5664

≤ꢀ170ꢀpF

≤ꢀ150ꢀpF

≤ꢀ910ꢀpF

≤ꢀ2,000ꢀpF

≤ꢀ3,900ꢀpF

≤ꢀ6,700ꢀpF

≤ꢀ0.018ꢀµF

≤ꢀ0.027ꢀµF

≤ꢀ0.033ꢀµF

C1002_X7R_SMD • 6/9/2017 16

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Capacitor Marking (Optional) cont’d

Capacitance (pF) For Various Alpha/Numeral Identiﬁers

Numeral

Alpha

Character

9

0

1

2

3

4

5

6

7

8

Capacitance (pF)

A

B

C

D

E

0.1

0.11

0.12

0.13

0.15

0.16

0.18

0.2

1 0

1.1

1 2

1 3

1 5

1 6

1 8

2 0

2 2

2.4

2.7

3 0

3 3

3 6

3 9

4 3

4.7

5.1

5 6

6 2

6 8

7 5

8 2

9.1

2 5

3 5

4 0

4 5

5 0

6 0

7 0

8 0

9 0

10

11

12

13

15

16

18

20

22

24

27

30

33

36

39

43

47

51

56

62

68

75

82

91

25

35

40

45

50

60

70

80

90

100

110

120

130

150

160

180

200

220

240

270

300

330

360

390

430

470

510

560

620

680

750

820

910

250

350

400

450

500

600

700

800

900

1,000

1,100

1,200

1,300

1,500

1,600

1,800

2,000

2,200

2,400

2,700

3,000

3,300

3,600

3,900

4,300

4,700

5,100

5,600

6,200

6,800

7,500

8,200

9,100

2,500

3,500

4,000

4,500

5,000

6,000

7,000

8,000

9,000

10,000 100,000 1,000,000 10,000,000

11,000 110,000 1,100,000 11,000,000

100,000,000

110,000,000

120,000,000

130,000,000

150,000,000

160,000,000

180,000,000

200,000,000

220,000,000

240,000,000

270,000,000

300,000,000

330,000,000

360,000,000

390,000,000

430,000,000

470,000,000

510,000,000

560,000,000

620,000,000

680,000,000

750,000,000

820,000,000

910,000,000

250,000,000

350,000,000

400,000,000

450,000,000

500,000,000

600,000,000

700,000,000

800,000,000

900,000,000

12,000 120,000 1,200,000 12,000,000

13,000 130,000 1,300,000 13,000,000

15,000 150,000 1,500,000 15,000,000

16,000 160,000 1,600,000 16,000,000

18,000 180,000 1,800,000 18,000,000

20,000 200,000 2,000,000 20,000,000

22,000 220,000 2,200,000 22,000,000

24,000 240,000 2,400,000 24,000,000

27,000 270,000 2,700,000 27,000,000

30,000 300,000 3,000,000 30,000,000

33,000 330,000 3,300,000 33,000,000

36,000 360,000 3,600,000 36,000,000

39,000 390,000 3,900,000 39,000,000

43,000 430,000 4,300,000 43,000,000

47,000 470,000 4,700,000 47,000,000

51,000 510,000 5,100,000 51,000,000

56,000 560,000 5,600,000 56,000,000

62,000 620,000 6,200,000 62,000,000

68,000 680,000 6,800,000 68,000,000

75,000 750,000 7,500,000 75,000,000

82,000 820,000 8,200,000 82,000,000

91,000 910,000 9,100,000 91,000,000

25,000 250,000 2,500,000 25,000,000

35,000 350,000 3,500,000 35,000,000

40,000 400,000 4,000,000 40,000,000

45,000 450,000 4,500,000 45,000,000

50,000 500,000 5,000,000 50,000,000

60,000 600,000 6,000,000 60,000,000

70,000 700,000 7,000,000 70,000,000

80,000 800,000 8,000,000 80,000,000

90,000 900,000 9,000,000 90,000,000

Fꢀ

G

H

J

0.22

0.24

0.27

0.3

K

L

M

N

P

Qꢀ

R

S

0.33

0.36

0.39

0.43

0.47

0.51

0.56

0.62

0.68

0.75

0.82

0.91

0.25

0.35

0.4

T

Uꢀ

Vꢀ

W

X

Yꢀ

Z

a

b

d

e

0.45

0.5

f

m

n

0.6

0.7

t

0.8

y

0.9

C1002_X7R_SMD • 6/9/2017 17

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Tape & Reel Packaging Information

KEMETꢀoffersꢀmultilayerꢀceramicꢀchipꢀcapacitorsꢀpackagedꢀinꢀ8,ꢀ12ꢀandꢀ16ꢀmmꢀtapeꢀonꢀ7"ꢀandꢀ13"ꢀreelsꢀinꢀaccordanceꢀwithꢀ

EIAꢀStandardꢀ481.ꢀThisꢀpackagingꢀsystemꢀisꢀcompatibleꢀwithꢀallꢀtape-fedꢀautomaticꢀpickꢀandꢀplaceꢀsystems.ꢀSeeꢀTableꢀ2ꢀforꢀ

detailsꢀonꢀreelingꢀquantitiesꢀforꢀcommercialꢀchips.

ꢒar Code Laꢇel

ꢄntiꢅStatic Reel

®

ꢆmꢇossed ꢈlasticꢉ or

ꢈunched ꢈaper Carrier.

Chip and ꢎꢈS ꢏrientation in ꢈocꢍet

(eꢌcept ꢁꢀ25 Commercial, and ꢁꢀ25 and 2225 Military)

KEMET

Sprocꢍet ꢓoles

ꢆmꢇossment or ꢈunched Caꢊity

ꢀ mm, ꢁ2 mm

or ꢁ6 mm Carrier ꢂape

ꢄntiꢅStatic Coꢊer ꢂape

(.ꢁ0 mm (.00ꢋꢃ) Maꢌimum ꢂhicꢍness)

ꢁ7ꢀ mm (7.00ꢃ)

or

330 mm (ꢁ3.00ꢃ)

ꢉꢆꢐꢄ 0ꢁ005, 020ꢁ, 0ꢋ02 and 0603 case siꢑes aꢊailaꢇle on punched paper carrier only.

Table 5 – Carrier Tape Conﬁguration, Embossed Plastic & Punched Paper (mm)

New 2 mm Pitch Reel Options*

Embossed Plastic Punched Paper

Tape

Packaging

Ordering Code

(C-Spec)

C-3190

7" Reel 13" Reel 7" Reel 13" Reel

EIA Case Size Size

(W)*

Packaging Type/Options

Pitchꢀ(P₁)* Pitchꢀ(P₁)*

01005 – 0402

0603

8

2

2/4

4

Automotiveꢀgradeꢀ7"ꢀreelꢀunmarked

Automotiveꢀgradeꢀ13"ꢀreelꢀunmarked

Commercialꢀgradeꢀ7"ꢀreelꢀunmarked

Commercialꢀgradeꢀ13"ꢀreelꢀunmarked

C-3191

2/4

4

C-7081

0805

8

4

C-7082

1206 – 1210

1805 – 1808

≥ꢀ1812

8

4

* 2 mm pitch reel only available for 0603 EIA case size.

2 mm pitch reel for 0805 EIA case size under development.

12

16

8

4

8

Beneﬁts of Changing from 4 mm to 2 mm Pitching Spacing

• Lower placement costs

•ꢀ Doubleꢀtheꢀpartsꢀonꢀeachꢀreelꢀresultsꢀinꢀfewerꢀreelꢀ

changesꢀandꢀincreasedꢀef ꢀciency

•ꢀ Fewerꢀreelsꢀresultꢀinꢀlowerꢀpackaging,ꢀshippingꢀandꢀ

storageꢀcosts,ꢀreducingꢀwaste

KPS 1210

8

KPSꢀ1812ꢀ&ꢀ2220

Arrayꢀ0508ꢀ&ꢀ0612

12

4

12

4

*Refer to Figures 1 & 2 for W and P₁carrier tape reference locations.

*Refer to Tables 6 & 7 for tolerance speciﬁcations.

C1002_X7R_SMD • 6/9/2017 18

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Figure 1 – Embossed (Plastic) Carrier Tape Dimensions

ꢁ

ꢀ 2

ꢐꢈ0 pitches cumulatiꢄe

tolerance on tape ꢑ 0.2 mmꢒ

2

ꢌ

ꢈ

ꢀo

ꢋDo

ꢅo

ꢂ

ꢇo

ꢃ

ꢌ

2

ꢆ

ꢈ

ꢆo

S

ꢈ

ꢀ

ꢈ

ꢁ

ꢈ

ꢌmꢊossment

ꢂor caꢄity siꢍe,

see ꢎote ꢈ ꢁaꢊle ꢏ

Center Lines of Caꢄity

ꢋD

ꢈ

Coꢄer ꢁape

is for tape feeder reference only,

includinꢉ draft concentric aꢊout ꢆo.

ꢆ

ꢈ

Uꢀer ꢁireꢂꢃiꢄꢅ ꢄꢆ Uꢅreeliꢅꢇ

Table 6 – Embossed (Plastic) Carrier Tape Dimensions

Metricꢀwillꢀgovern

Constant Dimensions — Millimeters (Inches)

D₁ꢀMinimum

Note 1

1.0

(0.039)

R Reference S₁ꢀMinimum

T

T₁

Tape Size

8 mm

D₀

E₁

P₀

P₂

Note 2

Note 3

Maximum Maximum

25.0

(0.984)

1.5ꢀ+0.10/-0.0ꢀ

(0.059ꢀ+0.004/-

0.0)

1.75 ±0.10

4.0 ±0.10

2.0 ±0.05

0.600

(0.024)

0.100

(0.004)

12 mm

16 mm

(0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002)

(0.024)

1.5

(0.059)

30

(1.181)

Variable Dimensions — Millimeters (Inches)

B₁ꢀMaximum

E₂

T₂

W

Tape Size

8 mm

Pitchꢀ

Fꢀ

P₁

A₀,B₀ꢀ&ꢀK₀

Note 4

4.35

(0.171)

Minimum

6.25

(0.246)

Maximum Maximum

2.5

(0.098)

3.5 ±0.05

(0.138 ±0.002) (0.157 ±0.004)

4.0 ±0.10

8.3

(0.327)

Singleꢀ(4ꢀmm)

Singleꢀ(4ꢀmm)ꢀ&ꢀ

Doubleꢀ(8ꢀmm)

8.2

10.25

5.5 ±0.05

8.0 ±0.10

4.6

12.3

12 mm

16 mm

Note 5

(0.323)

(0.404)

(0.217 ±0.002) (0.315 ±0.004)

(0.181)

(0.484)

12.1

(0.476)

14.25

(0.561)

7.5 ±0.05 12.0 ±0.10

(0.138 ±0.002) (0.157 ±0.004)

4.6

(0.181)

16.3

(0.642)

Triple (12 mm)

1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment

location and hole location shall be applied independent of each other.

2. The tape with or without components shall pass around R without damage (see Figure 6).

3. If S₁< 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).

4. B₁dimension is a reference dimension for tape feeder clearance only.

5. The cavity deﬁned by A₀, B₀and K₀shall surround the component with sufﬁcient clearance that:

(a) the component does not protrude above the top surface of the carrier tape.

(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).

(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see

Figure 4).

(e) for KPS Series product, A₀and B₀are measured on a plane 0.3 mm above the bottom of the pocket.

(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

C1002_X7R_SMD • 6/9/2017 19

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Figure 2 – Punched (Paper) Carrier Tape Dimensions

ꢀ

ꢍꢃ0 pitches cumulatiꢁe

tolerance on tape ꢎ 0.2 mmꢏ

ꢅ^ꢃ

ꢂo

ꢄDo

ꢈ⁰

ꢆ

ꢇ

ꢅ²

ꢉ⁰

ꢉottom Coꢁer ꢀape

ꢂ^ꢃ

G

Caꢁity Siꢊe,

See

ꢀ^ꢃ

Center Lines of Caꢁity

ꢀop Coꢁer ꢀape

ꢋote ꢃ, ꢀaꢌle 7

ꢉottom Coꢁer ꢀape

Uꢀer ꢁireꢂꢃiꢄꢅ ꢄꢆ Uꢅreeliꢅꢇ

Table 7 – Punched (Paper) Carrier Tape Dimensions

Metricꢀwillꢀgovern

Constant Dimensions — Millimeters (Inches)

R Reference

Note 2

Tape Size

8 mm

D₀

E₁

P₀

P₂

T₁Maximum

GꢀMinimum

0.10

1.5ꢀ+0.10ꢀ-0.0ꢀ

(0.059ꢀ+0.004ꢀ-0.0)

1.75 ±0.10

(0.069 ±0.004)

4.0 ±0.10

(0.157 ±0.004)

2.0 ±0.05

(0.079 ±0.002)

0.75

(0.030)

25

(0.984)

(0.004)

Maximum

Variable Dimensions — Millimeters (Inches)

Tape Size

8 mm

Pitch

E2ꢀMinimum

Fꢀ

P₁

TꢀMaximum

WꢀMaximum

A₀B₀

2.0 ±0.05

(0.079 ±0.002)

4.0 ±0.10

(0.157 ±0.004)

8.3

(0.327)

8.3

(0.327)

Half (2 mm)

Singleꢀ(4ꢀmm)

6.25

(0.246)

3.5 ±0.05

(0.138 ±0.002)

1.1

(0.098)

Note 1

8 mm

1. The cavity deﬁned by A₀, B₀and T shall surround the component with sufﬁcient clearance that:

a) the component does not protrude beyond either surface of the carrier tape.

b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

c) rotation of the component is limited to 20° maximum (see Figure 3).

d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).

e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

2. The tape with or without components shall pass around R without damage (see Figure 6).

C1002_X7R_SMD • 6/9/2017 20

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Packaging Information Performance Notes

1. Cover Tape Break Force:ꢀ1.0ꢀKgꢀminimum.

2. Cover Tape Peel Strength: Theꢀtotalꢀpeelꢀstrengthꢀofꢀtheꢀcoverꢀtapeꢀfromꢀtheꢀcarrierꢀtapeꢀshallꢀbe:ꢀ

Tape Width

8 mm

Peel Strength

0.1ꢀtoꢀ1.0ꢀNewtonꢀ(10ꢀtoꢀ100ꢀgf)

0.1ꢀtoꢀ1.3ꢀNewtonꢀ(10ꢀtoꢀ130ꢀgf)

12 and 16 mm

Theꢀdirectionꢀofꢀtheꢀpullꢀshallꢀbeꢀoppositeꢀtheꢀdirectionꢀofꢀtheꢀcarrierꢀtapeꢀtravel.ꢀTheꢀpullꢀangleꢀofꢀtheꢀcarrierꢀtapeꢀshallꢀbeꢀ

165°ꢀtoꢀ180°ꢀfromꢀtheꢀplaneꢀofꢀtheꢀcarrierꢀtape.ꢀDuringꢀpeeling,ꢀtheꢀcarrierꢀand/orꢀcoverꢀtapeꢀshallꢀbeꢀpulledꢀatꢀaꢀvelocityꢀofꢀ

300ꢀ±10ꢀmm/minute.

3. Labeling:ꢀBarꢀcodeꢀlabelingꢀ(standardꢀorꢀcustom)ꢀshallꢀbeꢀonꢀtheꢀsideꢀofꢀtheꢀreelꢀoppositeꢀtheꢀsprocketꢀholes.ꢀRefer to EIA

Standards 556 and 624.

Figure 3 – Maximum Component Rotation

°

ꢂ

Maꢀiꢁꢂꢁ ꢃꢄꢁpꢄꢅeꢅꢆ Rꢄꢆaꢆiꢄꢅ

Tꢄp ꢇiew

Maꢀiꢁꢂꢁ ꢃꢄꢁpꢄꢅeꢅꢆ Rꢄꢆaꢆiꢄꢅ

ꢈiꢉe ꢇiew

ꢂypical ꢅocꢆet Centerline

Tape

Maꢀiꢁꢂꢁ

°

ꢂ

s

Wiꢉꢆꢊ ꢋꢁꢁꢌ Rꢄꢆaꢆiꢄꢅ ꢋ

)

ꢃ,ꢄ2

ꢄ6 – 200

20

ꢄ0

ꢁo

Tape

Maꢀiꢁꢂꢁ

°

S

Wiꢉꢆꢊ ꢋꢁꢁꢌ Rꢄꢆaꢆiꢄꢅ ꢋ

)

ꢃ,ꢄ2

ꢄ6 – 56

72 – 200

20

ꢄ0

5

ꢂypical Component Centerline

ꢀo

Figure 4 – Maximum Lateral Movement

Figure 5 – Bending Radius

ꢂmꢃossed

Carrier

ꢄunched

Carrier

ꢁ mm ꢂ ꢃ2 mm ꢄape

ꢃ6 mm ꢄape

0.5 mm maꢀimum

ꢃ.0 mm maꢀimum

R

ꢀendinꢁ

Radius

R

C1002_X7R_SMD • 6/9/2017 21

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Figure 6 – Reel Dimensions

ꢂull Radius,

ꢌ3 (ꢇncludes

flanꢍe distortion

at outer edꢍe)

ꢀccess ꢄole at

Slot Location

(ꢅ ꢆ0 mm minimum)

See ꢁote

ꢌ2 (Measured at huꢎ)

D

(See ꢁote)

ꢀ

ꢁ

C

(ꢀrꢎor hole

ꢌꢋ (Measured at huꢎ)

diameter)

ꢇf present,

tape slot in core

for tape startꢈ

2.5 mm minimum ꢉidth ꢊ

ꢋ0.0 mm minimum depth

ꢃ

(see ꢁote)

ꢁoteꢈ Driꢏe spoꢐes optionalꢑ if used, dimensions ꢃ and D shall apply.

Table 8 – Reel Dimensions

Metricꢀwillꢀgovern

Constant Dimensions — Millimeters (Inches)

Tape Size

8 mm

A

BꢀMinimum

C

DꢀMinimum

178 ±0.20

(7.008 ±0.008)

or

1.5

(0.059)

13.0ꢀ+0.5/-0.2ꢀ

(0.521ꢀ+0.02/-0.008)

20.2

(0.795)

12 mm

16 mm

330 ±0.20

(13.000 ±0.008)

Variable Dimensions — Millimeters (Inches)

Tape Size

8 mm

NꢀMinimum

W₁

W₂ꢀMaximum

W₃

8.4ꢀ+1.5/-0.0

(0.331ꢀ+0.059/-0.0)

14.4

(0.567)

50

(1.969)

12.4ꢀ+2.0/-0.0

18.4

Shallꢀaccommodateꢀtapeꢀ

widthꢀwithoutꢀinterference

12 mm

16 mm

(0.488ꢀ+0.078/-0.0)ꢀꢀ

(0.724)

16.4ꢀ+2.0/-0.0

(0.646ꢀ+0.078/-0.0)

22.4

(0.882)

C1002_X7R_SMD • 6/9/2017 22

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

Figure 7 – Tape Leader & Trailer Dimensions

ꢄmꢋossed Carrier

Carrier ꢀape

ꢈunched Carrier

ꢉ mm ꢊ ꢁ2 mm only

Round Sprocꢂet ꢃoles

ꢃTART

ꢀꢁꢂ

ꢀop Coꢇer ꢀape

ꢄlonꢅated Sprocꢂet ꢃoles

(32 mm tape and ꢆider)

ꢁ00 mm

Minimum Leader

ꢌ00 mm Minimum

ꢀrailer

Components

ꢁ60 mm Minimum

ꢀop Coꢇer ꢀape

Figure 8 – Maximum Camber

ꢆlonꢅated Sprocꢁet ꢂoles

(32 mm ꢇ ꢈider tapes)

Carrier ꢀape

Round Sprocꢁet ꢂoles

ꢃ mm Maꢄimum, either direction

Straiꢅht ꢆdꢅe

250 mm

C1002_X7R_SMD • 6/9/2017 23

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)

KEMET Electronics Corporation Sales Ofﬁces

Forꢀaꢀcompleteꢀlistꢀofꢀourꢀglobalꢀsalesꢀof ꢀces,ꢀpleaseꢀvisitꢀwww.kemet.com/sales.

Disclaimer

Allꢀproductꢀspeci ꢀcations,ꢀstatements,ꢀinformationꢀandꢀdataꢀ(collectively,ꢀtheꢀ“Information”)ꢀinꢀthisꢀdatasheetꢀareꢀsubjectꢀtoꢀchange.ꢀTheꢀcustomerꢀisꢀresponsibleꢀforꢀ

checkingꢀandꢀverifyingꢀtheꢀextentꢀtoꢀwhichꢀtheꢀInformationꢀcontainedꢀinꢀthisꢀpublicationꢀisꢀapplicableꢀtoꢀanꢀorderꢀatꢀtheꢀtimeꢀtheꢀorderꢀisꢀplaced.

AllꢀInformationꢀgivenꢀhereinꢀisꢀbelievedꢀtoꢀbeꢀaccurateꢀandꢀreliable,ꢀbutꢀitꢀisꢀpresentedꢀwithoutꢀguarantee,ꢀwarranty,ꢀorꢀresponsibilityꢀofꢀanyꢀkind,ꢀexpressedꢀorꢀimplied.

StatementsꢀofꢀsuitabilityꢀforꢀcertainꢀapplicationsꢀareꢀbasedꢀonꢀKEMETꢀElectronicsꢀCorporation’sꢀ(“KEMET”)ꢀknowledgeꢀofꢀtypicalꢀoperatingꢀconditionsꢀforꢀsuchꢀ

applications,ꢀbutꢀareꢀnotꢀintendedꢀtoꢀconstituteꢀ–ꢀandꢀKEMETꢀspeci ꢀcallyꢀdisclaimsꢀ–ꢀanyꢀwarrantyꢀconcerningꢀsuitabilityꢀforꢀaꢀspeci ꢀcꢀcustomerꢀapplicationꢀorꢀuse.ꢀ

TheꢀInformationꢀisꢀintendedꢀforꢀuseꢀonlyꢀbyꢀcustomersꢀwhoꢀhaveꢀtheꢀrequisiteꢀexperienceꢀandꢀcapabilityꢀtoꢀdetermineꢀtheꢀcorrectꢀproductsꢀforꢀtheirꢀapplication.ꢀAnyꢀ

technicalꢀadviceꢀinferredꢀfromꢀthisꢀInformationꢀorꢀotherwiseꢀprovidedꢀbyꢀKEMETꢀwithꢀreferenceꢀtoꢀtheꢀuseꢀofꢀKEMET’sꢀproductsꢀisꢀgivenꢀgratis,ꢀandꢀKEMETꢀassumesꢀnoꢀ

obligationꢀorꢀliabilityꢀforꢀtheꢀadviceꢀgivenꢀorꢀresultsꢀobtained.

AlthoughꢀKEMETꢀdesignsꢀandꢀmanufacturesꢀitsꢀproductsꢀtoꢀtheꢀmostꢀstringentꢀqualityꢀandꢀsafetyꢀstandards,ꢀgivenꢀtheꢀcurrentꢀstateꢀofꢀtheꢀart,ꢀisolatedꢀcomponentꢀ

failuresꢀmayꢀstillꢀoccur.ꢀAccordingly,ꢀcustomerꢀapplicationsꢀwhichꢀrequireꢀaꢀhighꢀdegreeꢀofꢀreliabilityꢀorꢀsafetyꢀshouldꢀemployꢀsuitableꢀdesignsꢀorꢀotherꢀsafeguardsꢀ

(suchꢀasꢀinstallationꢀofꢀprotectiveꢀcircuitryꢀorꢀredundancies)ꢀinꢀorderꢀtoꢀensureꢀthatꢀtheꢀfailureꢀofꢀanꢀelectricalꢀcomponentꢀdoesꢀnotꢀresultꢀinꢀaꢀriskꢀofꢀpersonalꢀinjuryꢀorꢀ

propertyꢀdamage.

Althoughꢀallꢀproduct–relatedꢀwarnings,ꢀcautionsꢀandꢀnotesꢀmustꢀbeꢀobserved,ꢀtheꢀcustomerꢀshouldꢀnotꢀassumeꢀthatꢀallꢀsafetyꢀmeasuresꢀareꢀindictedꢀorꢀthatꢀotherꢀ

measuresꢀmayꢀnotꢀbeꢀrequired.

KEMET is a registered trademark of KEMET Electronics Corporation.

C1002_X7R_SMD • 6/9/2017 24


型号：	C1210C106M1RACTU
厂家：	KEMET CORPORATION
描述：	X7R Dielectric, 6.3 - 250 VDC (Commercial Grade)
文件：	总24页 (文件大小：1385K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

C1210C106M1RACTU [KEMET]

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