C3640C332BHGALTU_技术文档

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC

(Commercial Grade)

Overview

KEMET’s High Voltage surface mount MLCCs in

In addition to Commercial Grade, Automotive Grade devices

C0G dielectric feature a 125°C maximum operating

temperature and are considered “stable.” The Electronics

Industries Alliance (EIA) characterizes C0G dielectric as

a Class I material. Components of this classiﬁcation are

temperature compensating and are suited for resonant

circuit applications or those where Q and stability of

capacitance characteristics are required. C0G exhibits no

change in capacitance with respect to time and voltage

and boasts a negligible change in capacitance with

reference to ambient temperature. Capacitance change is

limited to ±30ppm/ºC from −55°C to +125°C.

are available which meet the demanding Automotive

Electronics Council's AEC-Q200 qualiﬁcation requirements.

These devices exhibit low ESR at high frequencies

and ﬁnd conventional use as snubbers or ﬁlters in

applications such as switching power supplies and

lighting ballasts. Their exceptional performance

at high frequencies has made high voltage MLCC's

the preferred dielectric choice of design engineers

worldwide. In addition to their use in power supplies,

these capacitors are widely used in industries related

to automotive(hybrid), telecommunications, medical,

military, aerospace, semiconductors and test/diagnostic

equipment.

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Ordering Information

C

1210

C

332

J

C

G

A

C

TU

Case Size Speciﬁcation/ Capacitance Capacitance Rated Voltage

Failure Rate/

Design

Packaging/

Grade (C-Spec)

Ceramic

Dielectric

G = C0G

Termination Finish²

(L" x W")

Series

Code (pF)

Tolerance¹

(VDC)

0603

0805

1206

1210

1808

1812

1825

2220

2225

2824

3040

3640

4540

C = Standard

Two

B = ±0.10 pF

C = ±0.25 pF

D = ±0.5 pF

F = ±1%

C = 500

A = N/A

C = 100% Matte Sn

L = SnPb

(5% Pb minimum)

See

"Packaging

C-Spec

Ordering

Options

Table" below

signiﬁcant

digits and

number of

zeros.

B = 630

D = 1,000

F = 1,500

G = 2,000

Z = 2,500

H = 3,000

G = ±2%

J = ±5%

K = ±10%

M = ±20%

¹Additional capacitance tolerance offerings may be available. Contact KEMET for details.

²Additional termination ﬁnish options may be available. Contact KEMET for details.

One world. One KEMET

C1009_C0G_HV_SMD • 12/6/2016

1

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Packaging C-Spec Ordering Options Table

Packaging/Grade

Packaging Type¹

Ordering Code (C-Spec)

Bulk Bag/Unmarked

7" Reel/Unmarked

Not required (Blank)

TU

7411 (EIA 0603 and smaller case sizes)

7210 (EIA 0805 and larger case sizes)

13" Reel/Unmarked

7" Reel/Unmarked/2 mm pitch²

13" Reel/Unmarked/2 mm pitch²

7081

7082

¹Default packaging is “Bulk Bag”. An ordering code C-Spec is not required for “Bulk Bag” packaging.

¹"Bulk Bag" packaging option is not available for case sizes larger than 2225 (5664 Metric).

¹The terms “Marked” and “Unmarked” pertain to laser marking option of capacitors. All packaging options labeled as “Unmarked” will contain

capacitors that have not been laser marked. The option to laser mark is not available on these devices. For more information see “Capacitor Marking”.

²The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case

size devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.

Beneﬁts

• Operating temperature range of −55°C to +125°C

• Lead (Pb)-Free, RoHS and REACH compliant

• EIA 0603, 0805, 1206, 1210, 1808, 1812, 1825, 2220,

2225, 2824, 3040, 3640 and 4540 case sizes

• DC voltage ratings of 500 V, 630 V, 1 KV, 1.5 KV, 2 KV,

2.5 KV and 3 KV

• Preferred capacitance solution at line frequencies

and into the MHz range

• No capacitance change with respect to applied

rated DC voltage

• Negligible capacitance change with respect to

temperature from −55°C to +125°C

• Capacitance offerings ranging from 1pF to 0.150μF

• Available capacitance tolerances of ±0.10pF, ±0.25pF,

±0.5pF, ±1%, ±2%, ±5%, ±10% and ±20%

• No piezoelectric noise

• No capacitance decay with time

• Non-polar device, minimizing installation concerns

• Automotive (AEC–Q200) grade available

• 100% pure matte tin-plated termination ﬁnish allowing

for excellent solderability

• Extremely low ESR and ESL

• High thermal stability

• High ripple current capability

• SnPb plated termination ﬁnish option available upon

request (5% Pb minimum)

Applications

Typical applications include switch mode power supplies (input ﬁlters, resonators, tank circuits, snubbed circuits, output

ﬁlters), high voltage coupling and DC blocking, lighting ballasts, voltage multiplier circuits, DC/DC converters and coupling

capacitors in Ćuk converters. Markets include power supply, LCD ﬂuorescent backlight ballasts, HID lighting, telecom

equipment, industrial and medical equipment/control, LAN/WAN interface, analog and digital modems, and automotive.

C1009_C0G_HV_SMD • 12/6/2016

2

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Dimensions – Millimeters (Inches)

L

ꢁ

ꢂ

ꢀ

S

EIA Size

Code

Metric Size

Code

L

W

Width

B

Mounting

Technique

T Thickness

Separation

Minimum

Length

Bandwidth

1.60 (0.063)

±0.15 (0.006)

2.00 (0.079)

±0.20 (0.008)

3.20 (0.126)

±0.20 (0.008)

3.20 (0.126)

±0.20 (0.008)

4.70 (0.185)

±0.50 (0.020)

4.50 (0.177)

±0.30 (0.012)

4.50 (0.177)

±0.30 (0.012)

5.70 (0.224)

±0.40 (0.016)

5.60 (0.220)

±0.40 (0.016)

7.10 (0.280)

±0.40 (0.016)

7.60 (0.300)

±0.40 (0.016)

9.10 (0.358)

±0.40 (0.016)

11.40 (0.449)

±0.40 (0.016)

0.80 (0.032)

±0.15 (0.006)

1.25 (0.049)

±0.20 (0.008)

1.60 (0.063)

±0.20 (0.008)

2.50 (0.098)

±0.20 (0.008)

2.00 (0.079)

±0.20 (0.008)

3.20 (0.126)

±0.30 (0.012)

6.40 (0.252)

±0.40 (0.016)

5.00 (0.197)

±0.40 (0.016)

6.40 (0.248)

±0.40 (0.016)

6.10 (0.240)

±0.40 (0.016)

10.20 (0.402)

±0.40 (0.016)

10.20 (0.402)

±0.40 (0.016)

10.20 (0.402)

±0.40 (0.016)

0.35 (0.014)

±0.15 (0.006)

0.50 (0.02)

±0.25 (0.010)

0.50 (0.02)

±0.25 (0.010)

0.50 (0.02)

0603

0805

1206

1210

1808

1812

1825

2220

2225

2824

3040

3640

4540

1608

2012

3216

3225

4520

4532

4564

5650

5664

7260

7610

9210

-

0.70 (0.028)

Solder Wave or

0.75 (0.030)

Solder Reﬂow

±0.25 (0.010)

0.60 (0.024)

±0.35 (0.014)

0.60 (0.024)

±0.35 (0.014)

0.60 (0.024)

±0.35 (0.014)

0.60 (0.024)

±0.35 (0.014)

0.60 (0.024)

±0.35 (0.014)

1.27 (0.050)

±0.40 (0.016)

1.27 (0.050)

±0.40 (0.016)

1.27 (0.050)

±0.40 (0.016)

1.27 (0.050)

±0.40 (0.016)

See Table 2 for

Thickness

N/A

Solder Reﬂow

Only

Qualiﬁcation/Certiﬁcation

Commercial Grade products are subject to internal qualiﬁcation. Details regarding test methods and conditions are

referenced in Table 4, Performance & Reliability.

C1009_C0G_HV_SMD • 12/6/2016

3

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Environmental Compliance

Lead (Pb)-free, RoHS, and REACH compliant without exemptions (excluding SnPb termination ﬁnish option).

Electrical Parameters/Characteristics

Item

Parameters/Characteristics

Operating Temperature Range

−55°C to +125°C

±30 ppm/ºC

0%

Capacitance Change with Reference to +25°C and 0 VDC Applied

(TCC)

Aging Rate (Maximum % Capacitance Loss/Decade Hour)

¹Dielectric Withstanding Voltage (DWV)

130% of rated voltage for voltage rating of < 1,000 V

120% of rated voltage for voltage rating of ≥ 1,000 V

(5±1 seconds and charge/discharge not exceeding 50 mA)

²Dissipation Factor (DF) Maximum Limit at 25ºC

³Insulation Resistance (IR) Limit at 25°C

0.1%

1,000 megohm microfarads or 100 GΩ

(500 VDC applied for 120±5 seconds at 25°C)

¹DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the

capacitor.

²Capacitance and dissipation factor (DF) measured under the following conditions:

1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF

1 kHz ±50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF

³To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.

Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known

as Automatic Level Control (ALC). The ALC feature should be switched to "ON."

Post Environmental Limits

High Temperature Life, Biased Humidity, Moisture Resistance

Rated DC

Voltage

Capacitance Dissipation Factor Capacitance

Insulation

Resistance

10% of Initial

Limit

Dielectric

C0G

Value

(Maximum %)

Shift

All

0.5

0.3% or ±0.25 pF

C1009_C0G_HV_SMD • 12/6/2016

4

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Table 1A – Capacitance Range/Selection Waterfall (0805 – 1808 Case Sizes)

Case Size/Series C0805C

C1206C

C1210C

C1808C

Voltage Code

C

B

D

C

B

D

F

G

C

B

D

F

G

C

B

D

F

G

Z

H

Cap

Code

Capacitance

Rated Voltage (VDC)

Capacitance

Tolerance

Product Availability and Chip Thickness Codes

See Table 2 for Chip Thickness Dimensions

1.0 - 9.1 pF*

10 pF - 47pF*

11 pF

109 - 919*

100 - 470*

110

B

C

D

DG DG DG

LB LB LB LB LB LB LB

F

G

J

K

M

DG DG DG ED ED ED ED ED FM FM FM FM FM LB LB LB LB LB LB LB

DG DG DG ED ED ED ED EF FM FM FM FM FM LB LB LB LB LB LB LB

DG DG DG ED ED ED ED EF FM FM FM FM FM LB LB LB LB LB LC LB

DG DG DG ED ED ED ED EG FM FM FM FM FM LB LB LB LB LB LC LB

DG DG DG ED ED ED ED EG FG FG FG FM FM LA LA LA LA LB LC LB

DG DG DG ED ED ED ED EG FG FG FG FM FM LA LA LA LA LB LC LC

DG DG DG ED ED ED EF EG FG FG FG FM FM LA LA LA LA LB LC LC

DG DG DG ED ED ED EF EG FG FG FG FM FM LA LA LA LA LC LC LC

DG DG DG ED ED ED EF EG FG FG FG FM FM LA LA LA LA LC LC

DG DG DG ED ED ED EG EG FG FG FG FM FM LA LA LA LA LC LC

DG DG DG ED ED ED EG EG FG FG FG FM FM LA LA LA LB LC LC

DG DG DG ED ED ED EG EG FG FG FG FK FK LA LA LA LB LC LC

12 pF

13 pF

15 pF

16 pF

18 pF

20 pF

22 pF

24 pF

27 pF

30 pF

33 pF

36 pF

39 pF

43 pF

47 pF

51 pF

120

130

150

160

180

200

220

240

270

300

330

360

390

430

470

510

560

620

680

750

820

910

101

111

56 pF

62 pF

68 pF

75 pF

82 pF

91 pF

100 pF

110 pF

120 pF

130 pF

150 pF

160 pF

180 pF

200 pF

220 pF

240 pF

270 pF

300 pF

330 pF

360 pF

390 pF

430 pF

470 pF

510 pF

560 pF

620 pF

680 pF

750 pF

820 pF

910 pF

1,000 pF

1,100 pF

121

131

151

161

181

201

221

241

271

301

331

361

391

431

471

511

561

621

681

751

821

911

DG DG

DG

ED ED EF EG

ED ED EG EG

ED ED EG

ED EF EG

FG FG FG FK FK LA LA LA LB LC LC

FG FG FG FK FS LA LA LA LB LA LC

FG FM FM FS

FG FM FM FM

FM FM FM FY

FM FK FK FS

FS LA LB LB LC LA

FS LA LB LB LC LB

FS LA LB LB LA LC

FS LB LB LB LA LC

LB LB LB LA

DG

LB LB LB LA

LB LB LB LB

LC LC LC LB

102

112

ED EF EG

EF EG

Rated Voltage (VDC)

Cap

Code

Capacitance

Voltage Code

C

B

D

C

B

D

F

G

C

B

D

F

G

C

B

D

F

G

Z

H

Case Size/Series

C0805C

C1206C

C1210C

C1808C

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage

capability within the same form factor (conﬁguration and dimensions).

These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts.

C1009_C0G_HV_SMD • 12/6/2016

5

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Table 1A – Capacitance Range/Selection Waterfall (0805 – 1808 Case Sizes) cont'd

Case Size/Series C0805C

C1206C

C1210C

C1808C

Voltage Code

C

B

D

C

B

D

F

G

C

B

D

F

G

C

B

D

F

G

Z

H

Cap

Code

Capacitance

Rated Voltage (VDC)

Capacitance

Tolerance

Product Availability and Chip Thickness Codes

See Table 2 for Chip Thickness Dimensions

1,200 pF

1,300 pF

1,500 pF

1,600 pF

1,800 pF

2,000 pF

2,200 pF

2,400 pF

2,700 pF

3,000 pF

3,300 pF

3,600 pF

3,900 pF

4,300 pF

4,700 pF

5,100 pF

5,600 pF

6,200pF

6,800pF

7,500pF

8,200 pF

122

132

152

162

182

202

222

242

272

302

332

362

392

432

472

512

562

622

682

752

822

F

G

J

K

M

EF EG

EG EB

EB EB

EC EC

ED ED

FM FK FK FS

LC LC LC LC

LC LC LC

LC LA LB

LC LA LC

LA LA

FM FS

FK FS

FS

FK

FS

FL

FS FM

FL FM

LA LA

LA LB

FL

FY

LA LB

FM FY

FY FS

LA LC

LA

LB

FY

FS

FE

LC

Rated Voltage (VDC)

Cap

Code

Capacitance

Voltage Code

C

B

D

C

B

D

F

G

C

B

D

F

G

C

B

D

F

G

Z

H

Case Size/Series

C0805C

C1206C

C1210C

C1808C

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage

capability within the same form factor (conﬁguration and dimensions).

These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts.

C1009_C0G_HV_SMD • 12/6/2016

6

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Table 1B – Capacitance Range/Selection Waterfall (1812 – 2225 Case Sizes)

Case Size/Series

C1812C

C1825C

C2220C

C2225C

Cap

Code

Voltage Code

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

Capacitance

Rated Voltage (VDC)

Capacitance

Tolerance

Product Availability and Chip Thickness Codes

See Table 2 for Chip Thickness Dimensions

10 pF - 47pF*

11 pF

100 - 470*

110

120

130

150

160

180

200

220

240

270

300

330

360

390

430

470

510

560

620

680

750

820

910

101

111

121

131

151

161

181

201

221

241

271

301

331

361

391

431

471

511

561

621

681

751

821

911

F

G

J

K

M

GK GK GK GK GK GK GK HG HG HG HG HG HG HG JK JK JK JK JK JK JK KF KF KF KF KF KF KF

GH GH GH GH GH GK GM HE HE HE HE HE HE HG JK JK JK JK JK JK JK KF KF KF KF KF KF KF

GH GH GH GH GH GK GM HE HE HE HE HE HE HG JK JK JK JK JK JK JK KE KE KE KE KE KE KF

GH GH GH GH GH GK GO HE HE HE HE HE HE HG JE JE JE JE JE JK JK KE KE KE KE KE KE KF

GK GK GK GK GH GK GO HE HE HE HE HE HE HG JE JE JE JE JE JK JK KE KE KE KE KE KE KF

GK GK GK GK GK GK GO HE HE HE HE HE HE HG JE JE JE JE JE JK JK KE KE KE KE KE KE KF

12 pF

13 pF

15 pF

16 pF

18 pF

20 pF

22 pF

24 pF

27 pF

30 pF

33 pF

36 pF

39 pF

43 pF

47 pF

51 pF

56 pF

62 pF

68 pF

75 pF

82 pF

91 pF

100 pF

110 pF

120 pF

130 pF

150 pF

160 pF

180 pF

200 pF

220 pF

240 pF

270 pF

300 pF

330 pF

360 pF

390 pF

430 pF

470 pF

510 pF

560 pF

620 pF

680 pF

750 pF

820 pF

910 pF

GK GK GK GK GK GK

GH GH GH GK GH GM

GH GH GH GK GH GO

GH GH GH GK GK

HE HE HE HE HE HE HJ JE JE JE JE JE JK JE KE KE KE KE KE KE KF

HE HE HE HE HE HE HJ JE JE JE JE JE JK JK KF KF KF KF KE KE KF

HE HE HE HE HE HE HJ JK JK JK JK JK JK JK KF KF KF KF KE KE KF

HE HE HE HE HG HE HJ JK JK JK JK JK JK JL KF KF KF KF KE KE KF

HE HE HE HE HG HE HK JK JK JK JK JK JK JL KF KF KF KF KE KF KH

HE HE HE HE HG HG HK JE JE JE JK JK JK JL KF KF KF KF KE KF KH

HE HE HE HG HG HG

JE JE JE JK JK JK JL KE KE KE KF KE KF KH

JE JE JE JK JK JK JN KE KE KE KF KE KF KJ

JE JK JK JK JK JK JN KE KE KE KF KE KF KJ

GH GH GH GK GK

GH GH GH GH GM

Rated Voltage (VDC)

Voltage Code

Cap

Code

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

Capacitance

Case Size/Series

C1812C

C1825C

C2220C

C2225C

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage

capability within the same form factor (conﬁguration and dimensions).

These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts.

C1009_C0G_HV_SMD • 12/6/2016

7

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Table 1B – Capacitance Range/Selection Waterfall (1812 – 2225 Case Sizes) cont'd

Case Size/Series

C1812C

C1825C

C2220C

C2225C

Cap

Code

Voltage Code

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

Capacitance

Rated Voltage (VDC)

Capacitance

Tolerance

Product Availability and Chip Thickness Codes

See Table 2 for Chip Thickness Dimensions

1,000 pF

1,100 pF

1,200 pF

1,300 pF

1,500 pF

1,600 pF

1,800 pF

2,000 pF

2,200 pF

2,400 pF

2,700 pF

3,000 pF

3,300 pF

3,600 pF

3,900 pF

4,300 pF

4,700 pF

5,100 pF

5,600 pF

6,200pF

6,800pF

7,500pF

8,200 pF

9,100 pF

10,000 pF

12,000 pF

15,000 pF

18,000 pF

22,000 pF

27,000 pF

33,000 pF

39,000 pF

102

112

122

132

152

162

182

202

222

242

272

302

332

362

392

432

472

512

562

622

682

752

822

912

103

123

153

183

223

273

333

393

F

G

J

K

M

GH GH GH GH GM

GH GK GK GH GO

GK GK GK GK GO

GK GK GK GK

GK GK GK GM

GK GK GK GO

GK GH GK GO

GK GH GK

GK GH GM

GH GH GO

GH GK GO

GH GK

HE HE HE HG HG HG

HE HE HE HG HG HJ

HE HE HE HG HE HJ

HE HE HE HG HE HK

HE HG HG HG HG HK

HE HG HG HG HG

HE HG HG HE HJ

HE HG HG HE HK

HG HG HG HE HK

HG HG HG HG

HG HG HG HJ

HG HE HG HK

HG HE HG

JE JK JK JK JK JK JN KE KE KE KF KE KF KJ

JE JK JK JK JK JK

JE JK JK JK JK JL

JE JK JK JK JE JL

JE JK JK JK JE JN

JE JK JK JE JK

JK JK JK JE JL

JK JK JK JK JN

JK JK JK JK

JK JK JK JL

JK JK JK JN

JK JE JE JN

JK JE JK JN

JK JE JK

KE KE KE KF KF KF

KE KE KE KF KF KH

KE KE KE KF KE KH

KE KE KE KF KE KJ

KE KE KE KF KF KJ

KE KE KE KE KH

KE KE KE KE KJ

KE KF KF KF KJ

KE KF KF KF

KE KF KF KH

KE KF KF KJ

KF KE KF

GH GM

GK GO

GM GO

GO

HG HE HJ

HE HG HK

HE HG

HE HJ

HG HK

JK JE JL

KF KE KF

JE JE JL

KF KE KH

JE JE JL

KF KE KH

JE JK JN

KE KE KH

JE JL

KE KF KJ

JE JL

KE KH

HJ

HK

JK JN

KF KJ

JL JN

KF KJ

JN

KH

KJ

Rated Voltage (VDC)

Voltage Code

Cap

Code

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

C

B

D

F

G

Z

H

Capacitance

Case Size/Series

C1812C

C1825C

C2220C

C2225C

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage

capability within the same form factor (conﬁguration and dimensions).

These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts.

C1009_C0G_HV_SMD • 12/6/2016

8

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Table 1C – Capacitance Range/Selection Waterfall (2824 – 4540 Case Sizes)

Case Size/

Series

C2824C

C3040C

C3640C

C4540C

Cap

Code

Voltage Code

C

B

D

F

G

C

B

D

F

G

C

B

D

F

G

C

B

D

F

G

Capacitance

Rated

Voltage (VDC)

Capacitance

Tolerance

Product Availability and Chip Thickness Codes

See Table 2 for Chip Thickness Dimensions

10 - 2,000 pF

2,200 pF

2,400 pF

2,700 pF

3,000 pF

3,300 pF

3,600 pF

3,900 pF

4,300 pF

4,700 pF

5,100 pF

5,600 pF

6,200 pF

6,800 pF

7,500 pF

8,200 pF

9,100 pF

10,000 pF

12,000 pF

15,000 pF

18,000 pF

22,000 pF

27,000 pF

33,000 pF

39,000 pF

47,000 pF

56,000 pF

68,000 pF

82,000 pF

0.1 µF

100 - 202

222

242

272

302

332

362

392

432

472

512

562

622

682

752

822

912

103

123

153

183

223

273

333

393

473

563

683

823

104

124

154

J

K

M

TA TA TA TA TA

TA TA TA TA TA QB QB QB QB QB

TA TA TA TA TB QB QB QB QB QB MA MA MA MA MA

TA TA TA TB TB QB QB QB QB QB MA MA MA MA MA SA SA SA SA SA

TA TA TA TB TC QB QB QB QB QB MA MA MA MA MA SA SA SA SA SA

TA TA TA TB

TA TA TA TC

QB QB QB QB QC MA MA MA MA MA SA SA SA SA SA

QB QB QB QC QC MA MA MA MA MB SA SA SA SA SA

QB QB QB QC QD MA MA MA MA MB SA SA SA SA SB

TA TA TA

TA TA TB

TA TB TC

TA TB

TB TB

TB TC

TB

TC

QB QB QB QD

QB QB QB

QB QB QC

QB QC QC

QB QC QD

QB QC

MA MA MA MB MB SA SA SA SA SB

MA MA MA MB MC SA SA SA SB SB

MA MA MA MC

MA MA MA

MA MA MB

MA MB MC

MA MB

SA SA SA SB SC

SA SA SA SB

SA SA SA SC

SA SA SA

SA SA SB

SA SB SC

SA SB

QC QD

QC

MB MC

MB

QD

MC

SB SC

0.12 µF

0.15 µF

MC

SB

SC

Rated Voltage (VDC)

Voltage Code

Cap

Code

C

B

D

F

G

C

B

D

F

G

C

B

D

F

G

C

B

D

F

G

Capacitance

Case Size/Series

C2824C

C3040C

C3640C

C4540C

*Capacitance range Includes E24 decade values only. (i.e., 10, 11, 12, 13, 15, 16, 18, 20, 22, 24, 27, 30, 33, 36, 39, 43, 47, 51, 56, 62, 68, 75, 82 and 91)

KEMET reserves the right to substitute product with an improved temperature characteristic, tighter capacitance tolerance and/or higher voltage

capability within the same form factor (conﬁguration and dimensions).

These products are protected under US Patents 7,172,985 and 7,670,981, other patents pending, and any foreign counterparts.

C1009_C0G_HV_SMD • 12/6/2016

9

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Table 2A – Chip Thickness/Tape & Reel Packaging Quantities

Paper Quantity

7" Reel 13" Reel

Plastic Quantity

7" Reel 13" Reel

Thickness Case Thickness ±

Code

Size

Range (mm)

DG

EB

EC

ED

EF

EG

FE

FG

FL

FM

FY

FK

FS

LA

LB

LC

GH

GK

GM

GO

HE

HG

HJ

HK

JE

0805

1206

1210

1808

1812

1825

2220

2225

2824

3040

3640

4540

1.25 ± 0.15

0.78 ± 0.10

0.90 ± 0.10

1.00 ± 0.10

1.20 ± 0.15

1.60 ± 0.15

1.00 ± 0.10

1.25 ± 0.15

1.40 ± 0.15

1.70 ± 0.20

2.00 ± 0.20

2.10 ± 0.20

2.50 ± 0.30

1.40 ± 0.15

1.60 ± 0.15

2.00 ± 0.15

1.40 ± 0.15

1.60 ± 0.20

2.00 ± 0.20

2.50 ± 0.20

1.40 ± 0.15

1.60 ± 0.20

2.00 ± 0.20

2.50 ± 0.20

1.40 ± 0.15

1.60 ± 0.20

2.00 ± 0.20

2.50 ± 0.20

1.40 ± 0.15

1.60 ± 0.20

2.00 ± 0.20

2.50 ± 0.20

1.40 ± 0.15

2.00 ± 0.20

2.50 ± 0.20

1.40 ± 0.15

2.00 ± 0.20

2.50 ± 0.20

1.40 ± 0.15

2.00 ± 0.20

2.50 ± 0.20

1.40 ± 0.15

2.00 ± 0.20

2.50 ± 0.20

0

2,500

10,000

4000

0

10000

0

4,000

2,500

2,000

2,500

2,000

1,000

500

10,000

8,000

10,000

8,000

4,000

2,000

4,000

2,000

4,000

2,000

4,000

2,000

2,500

2,000

1,650

1,400

1,550

1,500

500

1,000

500

1,000

500

JK

JL

JN

KE

KF

KH

KJ

TA

TB

TC

QB

QC

QD

MA

MB

MC

SA

SB

SC

500

1,000

500

750

300

500

350

250

200

7" Reel

13" Reel

7" Reel

13" Reel

Thickness

Code

Case

Size

Thickness ±

Range (mm)

Paper Quantity

Plastic Quantity

Package quantity based on ﬁnished chip thickness speciﬁcations.

C1009_C0G_HV_SMD • 12/6/2016 10

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Table 2B – Bulk Packaging Quantities

Loose Packaging

Bulk Bag (default)

N/A²

Packaging Type

Packaging C-Spec¹

Case Size

Packaging Quantities (pieces/unit packaging)

EIA (in)

Metric (mm)

Minimum

Maximum

0402

0603

0805

1206

1210

1808

1812

1825

2220

2225

1005

1608

2012

3216

3225

4520

4532

4564

5650

5664

50,000

1

20,000

¹The "Packaging C-Spec" is a 4 to 8 digit code which identiﬁes the packaging type and/or product grade. When ordering, the proper code must be

included in the 15th through 22nd character positions of the ordering code. See "Ordering Information" section of this document for further details.

Commercial Grade product ordered without a packaging C-Spec will default to our standard "Bulk Bag" packaging. Contact KEMET if you require a bulk

bag packaging option for Automotive Grade products.

²A packaging C-Spec (see note 1 above) is not required for "Bulk Bag" packaging (excluding Anti-Static Bulk Bag and Automotive Grade products). The

15th through 22nd character positions of the ordering code should be left blank. All product ordered without a packaging C-Spec will default to our

standard "Bulk Bag" packaging.

C1009_C0G_HV_SMD • 12/6/2016 11

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351

Density Level A:

Maximum (Most)

Land Protrusion (mm)

Density Level B:

Median (Nominal)

Land Protrusion (mm)

Density Level C:

Minimum (Least)

Land Protrusion (mm)

EIA

Size

Code

Metric

Size

Code

C

Y

X

V1

V2

C

Y

X

V1

V2

C

Y

X

V1

V2

0603

0805

1206

1210

1808

1812

1825

2220

2225

2824

3040

3640

4540

1608

2012

3216

3225

4520

4532

4564

5650

5664

7260

7610

9210

-

0.90

1.15

1.10

4.00

2.10

0.80

0.95

1.00

3.10

1.50

0.60

0.75

0.90

2.40

1.20

1.00

1.60

2.30

2.15

2.75

2.70

3.45

3.70

4.45

5.60

1.35

1.75

1.60

1.70

1.55

1.90

2.80

2.30

3.60

6.90

5.50

6.90

6.60

4.40

5.60

5.65

7.40

6.90

8.20

8.10

9.60

2.60

2.90

3.80

3.30

4.60

7.90

6.50

7.90

7.60

0.90

1.50

2.20

2.05

2.65

2.60

3.35

1.15

1.55

1.40

1.50

1.45

1.80

2.70

2.20

3.50

6.80

5.40

6.80

6.50

3.50

4.70

6.50

6.00

7.30

7.20

8.70

2.00

2.30

3.20

2.70

4.00

7.30

5.90

7.30

7.00

0.75

1.40

2.10

1.95

2.55

2.50

3.25

0.95

1.35

1.20

1.30

1.35

1.70

2.60

2.10

3.40

6.70

5.30

6.70

6.40

2.80

4.00

5.80

5.30

6.60

6.50

8.00

1.70

2.00

2.90

2.40

3.70

7.00

5.60

7.00

6.70

1.70 10.70 10.10 11.70 3.60

1.70 10.70 11.60 11.70 4.35

1.70 10.70 13.90 11.70 5.50

1.50 10.60 9.20 11.10 3.50

1.50 10.60 10.70 11.10 4.25

1.50 10.60 13.00 11.10 5.40

1.30 10.50 8.50 10.80

1.30 10.50 10.00 10.80

1.30 10.50 12.30 10.80

Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reﬂow

solder processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.

Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reﬂow solder processes.

Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform

qualiﬁcation testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).

Image below based on Density Level B for an EIA 1210 case size.

Vꢂ

ꢀ

Vꢃ

ꢁ

C

Grid ꢄlacement Courtyard

C1009_C0G_HV_SMD • 12/6/2016 12

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Soldering Process

Recommended Soldering Technique:

• Solder wave or solder reﬂow for EIA case sizes 0603, 0805 and 1206

• All other EIA case sizes are limited to solder reﬂow only

Recommended Reﬂow Soldering Proﬁle:

KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual),

convection, IR or vapor phase reﬂow techniques. Preheating of these components is recommended to avoid extreme thermal

stress. KEMET’s recommended proﬁle conditions for convection and IR reﬂow reﬂect the proﬁle conditions of the IPC/

J-STD-020 standard for moisture sensitivity testing. These devices can safely withstand a maximum of three reﬂow passes

at these conditions.

Termination Finish

ꢀ_ꢃ

ꢀ_L

t_ꢃ

Proﬁle Feature

Maꢂimum ꢄamp ꢅp ꢄate ꢆ 3ꢇCꢈsec

Maꢂimum ꢄamp Doꢉn ꢄate ꢆ ꢊꢇCꢈsec

SnPb

100% Matte Sn

t_L

Preheat/Soak

Temperature Minimum (T_Smin

)

100°C

150°C

200°C

ꢀ_smaꢂ

ꢀ_smin

Temperature Maximum (T_Smax

Time (t_S) from T_Sminto T_Smax

)

60 – 120 seconds

t_s

3°C/second

maximum

3°C/second

maximum

Ramp-Up Rate (T_Lto T_P)

ꢁ5

ꢁ5ꢇC to ꢃeaꢋ

Liquidous Temperature (T_L)

Time Above Liquidous (t_L)

Peak Temperature (T_P)

183°C

60 – 150 seconds

235°C

217°C

60 – 150 seconds

260°C

Time

Time Within 5°C of Maximum

Peak Temperature (t_P)

20 seconds

maximum

30 seconds

maximum

6°C/second

maximum

6°C/second

maximum

Ramp-Down Rate (T_Pto T_L)

Time 25°C to Peak

Temperature

6 minutes

maximum

8 minutes

maximum

Note 1: All temperatures refer to the center of the package, measured on the

capacitor body surface that is facing up during assembly reﬂow.

C1009_C0G_HV_SMD • 12/6/2016 13

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Table 4 – Performance & Reliability: Test Methods and Conditions

Stress

Reference

Test or Inspection Method

Terminal Strength

JIS–C–6429

Appendix 1, Note: Force of 1.8 kg for 60 seconds.

Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm

for C0G. Flexible termination system – 3.0 mm (minimum).

Board Flex

JIS–C–6429

Magniﬁcation 50 X. Conditions:

a) Method B, 4 hours at 155°C, dry heat at 235°C

b) Method B at 215°C category 3

Solderability

J–STD–002

c) Method D, category 3 at 260°C

Temperature Cycling

Biased Humidity

JESD22 Method JA–104 1,000 cycles (−55°C to +125°C). Measurement at 24 hours +/−4 hours after test conclusion.

Load Humidity: 1,000 hours 85°C/85% RH and 200 VDC maximum. Add 100 K ohm resistor.

Measurement at 24 hours +/−4 hours after test conclusion.

MIL–STD–202 Method

103

Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.

Measurement at 24 hours +/−4 hours after test conclusion.

MIL–STD–202 Method

106

t = 24 hours/cycle. Steps 7a and 7b not required. Measurement at 24 hours +/−4 hours after

test conclusion.

Moisture Resistance

MIL–STD–202 Method

107

MIL–STD–202 Method

108

MIL–STD–202 Method

108

−55°C/+125°C. Note: Number of cycles required – 300. Maximum transfer time – 20

Thermal Shock

High Temperature Life

Storage Life

seconds. Dwell time – 15 minutes. Air – Air.

1,000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 1.2 X rated voltage applied.

150°C, 0 VDC for 1,000 hours.

5 g's for 20 min., 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB 0.031" thick 7

secure points on one long side and 2 secure points at corners of opposite sides. Parts

mounted within 2" from any secure point. Test from 10 – 2,000 Hz

MIL–STD–202 Method

204

Vibration

MIL–STD–202 Method

Mechanical Shock

Figure 1 of Method 213, Condition F.

213

MIL–STD–202 Method

215

Resistance to Solvents

Add aqueous wash chemical, OKEM Clean or equivalent.

Storage and Handling

Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in

other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres,

and long term storage. In addition, packaging materials will be degraded by high temperature–reels may soften or warp

and tape peel force may increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum

storage humidity not exceed 70% relative humidity. Temperature ﬂuctuations should be minimized to avoid condensation on

the parts and atmospheres should be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock

should be used promptly, preferably within 1.5 years of receipt.

C1009_C0G_HV_SMD • 12/6/2016 14

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Construction

Detailed Cross Section

Dielectric Material

(Caꢄrꢅ₃)

Dielectric Material

(Caꢄrꢅ₃)

ꢀarrier Layer

(ꢁi)

ꢃnd ꢆerminationꢊ

ꢃꢎternal ꢃlectrode

(Cu)

ꢆermination ꢇinish

(ꢈ00ꢉ Matte Sn ꢊ

Snꢋꢌ ꢍ 5ꢉ ꢋꢌ min)

ꢂnner ꢃlectrodes

(ꢁi)

ꢃnd ꢆerminationꢊ

ꢃꢎternal ꢃlectrode

(Cu)

ꢀarrier Layer

(ꢁi)

ꢆermination ꢇinish

(ꢈ00ꢉ Matte Sn ꢊ

Snꢋꢌ ꢍ 5ꢉ ꢋꢌ min)

ꢂnner ꢃlectrodes

(ꢁi)

Capacitor Marking (Optional):

Laser marking option is not available on:

• C0G, Ultra Stable X8R and Y5V dielectric devices

• EIA 0402 case size devices

• EIA 0603 case size devices with Flexible Termination option.

• KPS Commercial and Automotive grade stacked devices.

These capacitors are supplied unmarked only.

C1009_C0G_HV_SMD • 12/6/2016 15

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Tape & Reel Packaging Information

KEMET offers multilayer ceramic chip capacitors packaged in 8, 12, 16 and 24 mm tape on 7" and 13" reels in accordance

with EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2

for details on reeling quantities for commercial chips.

ꢗar Code Laꢌel

ꢈntiꢉStatic ꢊeel

®

ꢋmꢌossed ꢍlasticꢎ or

ꢍunched ꢍaper Carrierꢆ

Chip and ꢓꢍS ꢔrientation in ꢍocꢒet

(eꢑcept ꢁꢀꢂ5 Commercial, and ꢁꢀꢂ5 and ꢂꢂꢂ5 Military)

KEMET

Sprocꢒet Holes

ꢋmꢌossment or ꢍunched Caꢏity

ꢀ mm, ꢁꢂ mm

or ꢁꢃ mm Carrier ꢄape

ꢈntiꢉStatic Coꢏer ꢄape

(ꢆꢁ0 mm (ꢆ00ꢐꢇ) Maꢑimum ꢄhicꢒness)

ꢁꢅꢀ mm (ꢅꢆ00ꢇ)

or

330 mm (ꢁ3ꢆ00ꢇ)

ꢎꢋꢕꢈ 0ꢁ005, 0ꢂ0ꢁ, 0ꢐ0ꢂ and 0ꢃ03 case siꢖes aꢏailaꢌle on punched paper carrier onlyꢆ

Table 5 – Carrier Tape Conﬁguration, Embossed Plastic & Punched Paper (mm)

Embossed Plastic Punched Paper

Tape

7" Reel 13" Reel 7" Reel 13" Reel

Pitch (P₁)* Pitch (P₁)*

EIA Case Size Size

(W)*

New 2 mm Pitch Reel Options*

Packaging

01005 – 0402

0603

8

2

2/4

4

Ordering Code

(C-Spec)

C-3190

Packaging Type/Options

2/4

4

Automotive grade 7" reel unmarked

Automotive grade 13" reel unmarked

Commercial grade 7" reel unmarked

Commercial grade 13" reel unmarked

0805

8

4

C-3191

1206 – 1210

1805 – 1808

≥ 1812

8

4

C-7081

12

16

24

12

16

8

4

C-7082

* 2 mm pitch reel only available for 0603 EIA case size.

2 mm pitch reel for 0805 EIA case size under development.

8

2824

12

16

8

12

16

8

Beneﬁts of Changing from 4 mm to 2 mm Pitching Spacing

• Lower placement costs

• Double the parts on each reel results in fewer reel

changes and increased efﬁciency

• Fewer reels result in lower packaging, shipping and

storage costs, reducing waste

3040 – 4540

KPS 1210

KPS 1812 & 2220

Array 0508 & 0612

12

4

12

4

*Refer to Figures 1 & 2 for W and P₁carrier tape reference locations.

*Refer to Tables 6 & 7 for tolerance speciﬁcations.

C1009_C0G_HV_SMD • 12/6/2016 16

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Figure 1 – Embossed (Plastic) Carrier Tape Dimensions

ꢁ

ꢀ ꢊ

ꢐꢈ0 pitches cumulatiꢄe

tolerance on tape ꢑ 0ꢒꢊ mmꢓ

ꢊ

ꢌ

ꢈ

ꢀo

ꢋDo

ꢅo

ꢂ

ꢇo

ꢃ

ꢌ

ꢊ

ꢆ

ꢈ

ꢆo

S

ꢈ

ꢀ

ꢈ

ꢁ

ꢈ

ꢌmꢉossment

ꢂor caꢄity siꢍe,

see ꢎote ꢈ ꢁaꢉle ꢏ

Center Lines of Caꢄity

ꢋD

ꢈ

Coꢄer ꢁape

is for tape feeder reference only,

including draft concentric aꢉout ꢆ

ꢆ

ꢈ

o

.

User Direction of Unreeling

Table 6 – Embossed (Plastic) Carrier Tape Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

R Reference S₁Minimum

T

T1

Maximum

Tape Size

8 mm

D₀

E₁

P₀

P₂

Note 2

Note 3

Maximum

25.0

(0.984)

1.5+0.10/−0.0

1.75±0.10

4.0±0.10

2.0±0.05

0.600

0.100

12 mm

16 mm

24 mm

(0.059+0.004/−0.0) (0.069±0.004)

(0.157±0.004)

(0.079±0.002)

(0.024)

(0.004)

30

(1.181)

1.5+0.10/−0.0

(0.059+0.004/−0.0) (0.069±0.004)

1.75±0.10

4.0±0.10

(0.157±0.004)

2.0±0.10

(0.078±0.003)

30

(1.181)

5

0.250

(0.009)

0.350

(0.013)

(0.196)

Variable Dimensions — Millimeters (Inches)

E₂

T₂

W

Tape Size

8 mm

Pitch

F

P₁

A₀,B₀& K₀

Minimum

6.25

(0.246)

Maximum

2.5

(0.098)

Maximum

8.3

(0.327)

3.5±0.05

(0.138±0.002)

4.0±0.10

(0.157±0.004)

Single (4 mm)

Single (4 mm) &

Double (8 mm)

10.25

5.5±0.05

8.0±0.10

4.6

12.3

12 mm

16 mm

24 mm

(0.404)

(0.217±0.002)

(0.315±0.004)

(0.181)

(0.484)

Note 5

14.25

(0.561)

7.5±0.05

(0.138±0.002)

12.0±0.10

(0.157±0.004)

4.6

(0.181)

16.3

(0.642)

Triple (12 mm)

16 mm

22.25

(0.875)

11.5±0.10

(0.452±0.003)

16.0±0.10

(0.629±0.004)

3

24.3

(0.956)

(0.118)

1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment

location and hole location shall be applied independent of each other.

2. The tape with or without components shall pass around R without damage (see Figure 6).

3. If S₁< 1.0 mm, there may not be enough area for cover tape to be properly applied (see EIA Standard 481 paragraph 4.3 section b).

4. B₁dimension is a reference dimension for tape feeder clearance only.

5. The cavity deﬁned by A₀, B₀and K₀shall surround the component with sufﬁcient clearance that:

(a) the component does not protrude above the top surface of the carrier tape.

(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3).

(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape (see

Figure 4).

(e) for KPS Series product, A₀and B₀are measured on a plane 0.3 mm above the bottom of the pocket.

(f) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

C1009_C0G_HV_SMD • 12/6/2016 17

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Figure 2 – Punched (Paper) Carrier Tape Dimensions

ꢀ

ꢏꢃ0 pitches cumulatiꢁe

tolerance on tape ꢐ 0ꢑꢇ mmꢒ

ꢅ^ꢃ

ꢂo

ꢄDo

ꢉ⁰

ꢆ

ꢈ

ꢅ^ꢇ

ꢊ⁰

ꢊottom Coꢁer ꢀape

ꢂ^ꢃ

G

Caꢁity Siꢋe,

See

ꢀ^ꢃ

Center Lines of Caꢁity

ꢀop Coꢁer ꢀape

ꢌote ꢃ, ꢀaꢍle ꢎ

ꢊottom Coꢁer ꢀape

User Direction of Unreeling

Table 7 – Punched (Paper) Carrier Tape Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

R Reference

Note 2

Tape Size

8 mm

D₀

E₁

P₀

P₂

T₁Maximum

G Minimum

0.10

1.5+0.10/−0.0

(0.059+0.004/−0.0)

1.75±0.10

(0.069±0.004)

4.0±0.10

(0.157±0.004)

2.0±0.05

(0.079±0.002)

0.75

(0.030)

2

(0.004)

(0.984)

Maximum

Variable Dimensions — Millimeters (Inches)

Tape Size

8 mm

Pitch

E2 Minimum

F

P₁

T Maximum

W Maximum

A₀B₀

2.0±0.05

(0.079±0.002)

4.0±0.10

(0.157±0.004)

8.3

(0.327)

8.3

(0.327)

Half (2 mm)

Single (4 mm)

6.25

(0.246)

3.5±0.05

(0.138±0.002)

1.1

(0.098)

Note 1

8 mm

1. The cavity deﬁned by A₀, B₀and T shall surround the component with sufﬁcient clearance that:

a) the component does not protrude beyond either surface of the carrier tape.

b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.

c) rotation of the component is limited to 20° maximum (see Figure 3).

d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).

e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.

2. The tape with or without components shall pass around R without damage (see Figure 6).

C1009_C0G_HV_SMD • 12/6/2016 18

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Packaging Information Performance Notes

1. Cover Tape Break Force: 1.0 Kg minimum.

2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:

Tape Width

8 mm

Peel Strength

0.1 to 1.0 Newton (10 to 100 gf)

0.1 to 1.3 Newton (10 to 130 gf)

0.1 to 1.6 Newton (10 to 160 gf)

12 and 16 mm

24 mm

The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be

165° to 180° from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of

300±10 mm/minute.

3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA

Standards 556 and 624.

Figure 3 – Maximum Component Rotation

°

ꢂ

Maximum Component Rotation

Top View

Maximum Component Rotation

Side View

ꢂypical ꢈocꢉet Centerline

Tape

Maximum

°

ꢂ

s

Width (mm) Rotation (

)

ꢃ,ꢄꢅ

ꢄꢆ – ꢅ00

ꢅ0

ꢄ0

ꢁo

Tape

Maximum

°

S

Width (mm) Rotation (

)

ꢃ,ꢄꢅ

ꢄꢆ – 5ꢆ

ꢇꢅ – ꢅ00

ꢅ0

ꢄ0

5

ꢂypical Component Centerline

ꢀo

Figure 4 – Maximum Lateral Movement

Figure 5 – Bending Radius

ꢂmꢃossed

Carrier

ꢄunched

Carrier

ꢂ mm ꢃ ꢄꢅ mm ꢆape

ꢄꢇ mm ꢆape

0ꢀ5 mm maꢁimum

ꢄꢀ0 mm maꢁimum

ꢀ

ꢁending

ꢀadius

ꢀ

C1009_C0G_HV_SMD • 12/6/2016 19

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Figure 6 – Reel Dimensions

ꢂull ꢃadius,

ꢎ3 (ꢇncludes

flange distortion

at outer edge)

ꢀccess Hole at

Slot Location

(ꢅ ꢆ0 mm minimum)

See ꢁote

ꢎꢉ (Measured at huꢏ)

D

(See ꢁote)

ꢀ

ꢁ

C

(ꢀrꢏor hole

ꢎꢍ (Measured at huꢏ)

diameter)

ꢇf present,

tape slot in core

for tape startꢈ

ꢉꢊ5 mm minimum ꢋidth ꢌ

ꢍ0ꢊ0 mm minimum depth

ꢄ

(see ꢁote)

ꢁoteꢈ Driꢐe spoꢑes optionalꢒ if used, dimensions ꢄ and D shall applyꢊ

Table 8 – Reel Dimensions

Metric will govern

Constant Dimensions — Millimeters (Inches)

Tape Size

8 mm

A

B Minimum

C

D Minimum

178±0.20

(7.008±0.008)

or

1.5

(0.059)

13.0+0.5/−0.2

(0.521+0.02/−0.008)

20.2

(0.795)

12 mm

16 mm

24 mm

330±0.20

(13.000±0.008)

1.2

(0.047)

13.0 + −0.2

(0.521 + −0.008)

21

(0.826)

Variable Dimensions — Millimeters (Inches)

Tape Size

8 mm

N Minimum

W₁

W₂Maximum

W₃

8.4+1.5/−0.0

(0.331+0.059/−0.0)

14.4

(0.567)

12.4+2.0/−0.0

18.4

12 mm

16 mm

24 mm

(0.488+0.078/−0.0)

(0.724)

50

(1.969)

Shall accommodate tape

width without interference

16.4+2.0/−0.0

(0.646+0.078/−0.0)

25+1.0/−0.0

(0.984+0.039/−0.0)

22.4

(0.882)

27.4+1.0/−1.0

(1.078+0.039/−0.039)

C1009_C0G_HV_SMD • 12/6/2016 20

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

Figure 7 – Tape Leader & Trailer Dimensions

ꢅmꢌossed Carrier

Carrier ꢀape

ꢉunched Carrier

ꢊ mm ꢋ ꢁꢆ mm only

ꢃound Sprocꢄet Holes

START

END

ꢀop Coꢈer ꢀape

ꢅlongated Sprocꢄet Holes

(3ꢆ mm tape and ꢇider)

ꢁ00 mm

Minimum Leader

ꢍ00 mm Minimum

ꢀrailer

Components

ꢁꢂ0 mm Minimum

ꢀop Coꢈer ꢀape

Figure 8 – Maximum Camber

ꢅlongated sprocꢂet holes

(3ꢆ mm ꢇ ꢈider tapes)

Carrier ꢀape

ꢁound Sprocꢂet Holes

ꢃ mm Maꢄimum, either direction

Straight ꢅdge

ꢆ50 mm

C1009_C0G_HV_SMD • 12/6/2016 21

Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)

High Voltage C0G Dielectric, 500 – 3,000 VDC (Commercial Grade)

KEMET Electronic Corporation Sales Ofﬁces

For a complete list of our global sales ofﬁces, please visit www.kemet.com/sales.

Disclaimer

All product speciﬁcations, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for

checking and verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed.

All Information given herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.

Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such

applications, but are not intended to constitute – and KEMET speciﬁcally disclaims – any warranty concerning suitability for a speciﬁc customer application or use.

The Information is intended for use only by customers who have the requisite experience and capability to determine the correct products for their application. Any

technical advice inferred from this Information or otherwise provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes no

obligation or liability for the advice given or results obtained.

Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component

failures may still occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards

(such as installation of protective circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury or

property damage.

Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other

measures may not be required.

KEMET is a registered trademark of KEMET Electronics Corporation.

C1009_C0G_HV_SMD • 12/6/2016 22


型号：	C3640C332BHGALTU
厂家：	KEMET CORPORATION
描述：	Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
文件：	总22页 (文件大小：1325K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

C3640C332BHGALTU [KEMET]

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