IRFR9014 [KERSEMI]
Power MOSFET;
| 型号： | IRFR9014 |
| 厂家： | 
Kersemi Electronic Co., Ltd. |
| 描述： | Power MOSFET |
| 文件： | 总7页 (文件大小：4533K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
Power MOSFET
FEATURES
• Dynamic dV/dt Rating
PRODUCT SUMMARY
VDS (V)
- 60
Available
• Repetitive Avalanche Rated
RDS(on) (Ω)
VGS = - 10 V
0.50
RoHS*
• Surface Mount (IRFR9014/SiHFR9014)
COMPLIANT
Qg (Max.) (nC)
12
• Straight Lead (IRFU9014/SiHFU9014)
Q
gs (nC)
3.8
• Available in Tape and Reel
Qgd (nC)
5.1
• P-Channel
Configuration
Single
• Fast Switching
S
• Lead (Pb)-free Available
DESCRIPTION
DPAK
IPAK
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
(TO-252)
(TO-251)
G
The DPAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU/SiHFU series) is for through-hole
mounting applications. Power dissipation levels up to 1.5 W
D
P-Channel MOSFET
are possible in typical surface mount applications.
ORDERING INFORMATION
Package
DPAK (TO-252)
DPAK (TO-252)
IRFR9014TRLPbFa
SiHFR9014TL-E3a
IRFR9014TRLa
SiHFR9014TLa
DPAK (TO-252)
IRFR9014TRPbFa
SiHFR9014T-E3a
IRFR9014TRa
IPAK (TO-251)
IRFU9014PbF
SiHFU9014-E3
IRFU9014
IRFR9014PbF
SiHFR9014-E3
IRFR9014
Lead (Pb)-free
SnPb
SiHFR9014
SiHFR9014Ta
SiHFU9014
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
- 60
20
V
VGS
T
C = 25 °C
- 5.1
- 3.2
- 20
Continuous Drain Current
VGS at 5.0 V
ID
TC =100°C
A
Pulsed Drain Currenta
IDM
Linear Derating Factor
0.20
W/°C
Linear Derating Factor (PCB Mount)e
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
Maximum Power Dissipation
Maximum Power Dissipation (PCB Mount)e
Peak Diode Recovery dV/dtc
0.020
140
EAS
IAR
mJ
A
- 5.1
2.5
EAR
mJ
TC = 25 °C
25
PD
W
TA = 25 °C
2.5
dV/dt
- 4.5
- 55 to + 150
V/ns
Operating Junction and Storage Temperature Range
TJ, Tstg
°C
Soldering Recommendations (Peak Temperature)
for 10 s
260d
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = - 25 V, starting TJ = 25 °C, L = 6.3 mH, RG = 25 Ω, IAS = - 5.1 A (see fig. 12).
c. ISD ≤ - 6.7 A, dI/dt ≤ 90 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
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1
IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
Maximum Junction-to-Ambient
RthJA
-
-
110
Maximum Junction-to-Ambient
(PCB Mount)a
RthJA
RthJC
-
-
-
-
50
°C/W
Maximum Junction-to-Case (Drain)
5.0
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
VDS
ΔVDS/TJ
VGS(th)
IGSS
VGS = 0 V, ID = - 250 µA
Reference to 25 °C, ID = - 1 mA
VDS = VGS, ID = - 250 µA
- 60
-
-
V
V/°C
V
-
- 0.059
-
- 2.0
-
-
-
-
-
-
- 4.0
100
- 100
- 500
0.50
-
VGS
=
20 V
-
nA
VDS = - 60 V, VGS = 0 V
-
-
Zero Gate Voltage Drain Current
IDSS
µA
V
DS = - 48 V, VGS = 0 V, TJ = 125 °C
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
RDS(on)
gfs
VGS = - 10 V
ID = - 3.1 Ab
-
Ω
VDS = - 25 V, ID = - 3.1 Ab
1.4
S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Ciss
Coss
Crss
Qg
-
-
-
-
-
-
-
-
-
-
270
170
31
-
-
VGS = 0 V,
VDS = - 25 V,
f = 1.0 MHz, see fig. 5
-
-
pF
nC
12
3.8
5.1
-
ID = - 6.7 A, VDS = - 48 V,
Qgs
Qgd
td(on)
tr
VGS = - 10 V
-
see fig. 6 and 13b
-
11
63
9.6
31
-
VDD = - 30 V, ID = - 6.7 A,
ns
RG = 24 Ω, RD = 4.0 Ω, see fig. 10b
Turn-Off Delay Time
Fall Time
td(off)
tf
-
-
D
Between lead,
Internal Drain Inductance
LD
LS
-
-
4.5
7.5
-
-
6 mm (0.25") from
nH
package and center of
G
die contactc
Internal Source Inductance
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
D
MOSFET symbol
showing the
integral reverse
p - n junction diode
IS
-
-
-
-
- 5.1
- 20
A
G
Pulsed Diode Forward Currenta
ISM
S
Body Diode Voltage
VSD
trr
TJ = 25 °C, IS = - 5.1 A, VGS = 0 Vb
-
-
-
-
- 5.5
160
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
80
ns
µC
TJ = 25 °C, IF = - 6.7 A, dI/dt = 100 A/µsb
Qrr
ton
0.096
0.19
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
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IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
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IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
RD
VDS
VGS
D.U.T.
RG
-
+
VDD
- 10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
td(on) tr
td(off) tf
VGS
10 %
90 %
VDS
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
L
IAS
VDS
Vary tp to obtain
required IAS
VDS
D.U.T.
IAS
R G
-
V
+
DD
VDD
tp
- 10 V
0.01 Ω
tp
VDS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
- 10 V
12 V
0.2 µF
0.3 µF
-
QGS
QGD
V
+
DS
D.U.T.
VG
VGS
- 3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
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IRFR9014, IRFU9014, SiHFR9014, SiHFU9014
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-
+
-
+
-
RG
+
-
• dV/dt controlled by RG
• ISD controlled by duty factor "D"
• D.U.T. - device under test
VDD
Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
Period
D =
P.W.
V
= - 10 V*
GS
D.U.T. I waveform
SD
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. V waveform
DS
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Ripple ≤ 5 %
Inductor current
I
SD
* VGS = - 5 V for logic level and - 3 V drive devices
Fig. 14 - For P-Channel
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相关型号：
IRFR9014-T1
Power Field-Effect Transistor, 5.3A I(D), 60V, 0.5ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, DPAK-3
SAMSUNG
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