KK74HCT244AN [KODENSHI]

Octal 3-State Noninverting Buffer/Line Driver/Line Receiver High-Performance Silicon-Gate CMOS; 八路三态同相缓冲器/线路驱动器/线接收器高性能硅栅CMOS
KK74HCT244AN
型号: KK74HCT244AN
厂家: KODENSHI KOREA CORP.    KODENSHI KOREA CORP.
描述:

Octal 3-State Noninverting Buffer/Line Driver/Line Receiver High-Performance Silicon-Gate CMOS
八路三态同相缓冲器/线路驱动器/线接收器高性能硅栅CMOS

总线驱动器 总线收发器 栅
文件: 总6页 (文件大小:358K)
中文:  中文翻译
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TECHNICAL DATA  
KK74HCT244A  
Octal 3-State Noninverting  
Buffer/Line Driver/Line Receiver  
High-Performance Silicon-Gate CMOS  
The KK74HCT244A is identical in pinout to the LS/ALS244. The  
device may be used as a level converter for interfacing TTL or NMOS  
outputs to High-Speed CMOS inputs.  
The KK74HCT244A is an octal noninverting buffer/line driver/line  
receiver designed to be used with 3-state memory address drivers, clock  
drivers, and other bus-oriented systems. The device has non-inverted  
outputs and two active-low output enables.  
ORDERING INFORMATION  
TTL/NMOS-Compatible Input Levels  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 4.5 to 5.5 V  
Low Input Current: 1.0 µA  
KK74HCT244AN  
Plastic  
KK74HCT244ADW SOIC  
TA = -55° to 125° C for all packages  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
FUNCTION TABLE  
Inputs  
Enable A,  
Outputs  
YA,YB  
A,B  
Enable B  
L
L
H
L
H
X
L
H
Z
PIN 20=VCC  
PIN 10 = GND  
X=don’t care;Z = high impedance  
1
KK74HCT244A  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
Unit  
V
VCC  
VIN  
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
-0.5 to +7.0  
-1.5 to VCC +1.5  
-0.5 to VCC +0.5  
V
VOUT  
V
IIN  
IOUT  
ICC  
PD  
DC Input Current, per Pin  
mA  
mA  
mA  
mW  
±20  
±35  
±75  
DC Output Current, per Pin  
DC Supply Current, VCC and GND Pins  
Power Dissipation in Still Air, Plastic DIP**  
750  
500  
SOIC Package**  
Tstg  
TL  
Storage Temperature  
-65 to +150  
260  
°C  
°C  
Lead Temperature, 1 mm from Case for 10 Seconds  
(Plastic DIP or SOIC Package)  
*Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
**Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C  
SOIC Package: : - 7 mW/°C from 65° to 125°C  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
VCC  
Parameter  
Min  
4.5  
0
Max  
5.5  
Unit  
V
DC Supply Voltage (Referenced to GND)  
DC Input Voltage, Output Voltage (Referenced to GND)  
Operating Temperature, All Package Types  
Input Rise and Fall Time (Figure 1)  
VIN, VOUT  
TA  
VCC  
+125  
500  
V
-55  
0
°C  
ns  
tr, tf  
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.  
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this  
high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or  
V
OUT)VCC.  
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused  
outputs must be left open.  
2
KK74HCT244A  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
Symbol  
Parameter  
Test Conditions  
VCC  
V
Guaranteed Limit  
Unit  
25 °C  
to  
85  
°C  
125  
°C  
-55°C  
VIH  
VIL  
Minimum High-  
Level Input Voltage  
VOUT= VCC-0.1 V  
IOUT⎢≤ 20 µA  
4.5  
5.5  
2.0  
2.0  
2.0  
2.0  
2.0  
2.0  
V
V
V
Maximum Low -  
Level Input Voltage  
VOUT=0.1 V  
IOUT⎢ ≤ 20 µA  
4.5  
5.5  
0.8  
0.8  
0.8  
0.8  
0.8  
0.8  
VOH  
Minimum High-  
Level Output Voltage  
VIN=VIH  
IOUT⎢ ≤ 20 µA  
4.5  
5.5  
4.4  
5.4  
4.4  
5.4  
4.4  
5.4  
VIN=VIH  
4.5  
3.98  
3.84  
3.7  
IOUT⎢ ≤ 6.0 mA  
VOL  
Maximum Low-  
Level Output Voltage  
VIN= VIL  
IOUT⎢ ≤ 20 µA  
4.5  
5.5  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
VIN= VIL  
4.5  
5.5  
0.26  
0.1  
0.33  
1.0  
0.4  
1.0  
IOUT⎢ ≤6.0 mA  
VIN=VCC  
IIH  
Minimum High-  
Level Input Leakage  
Current  
µA  
µA  
µA  
IIL  
Maximum Low-  
Level Input Leakage  
Current  
VIN=GND  
5.5  
5.5  
-0.1  
0.5  
-1.0  
5.0  
-1.0  
IOZH  
Minimum High-  
Level Three-State  
Leakage Current  
VIN(01) =VIH  
VIN(19) =VIH  
VIN =VСС (on other  
outputs)  
10.0  
VOUT=VCC  
IOZL  
Maximum Low-  
Level Three-State  
Leakage Current  
VIN(01) =VIH  
VIN(19) =VIH  
VIN =VСС (on other  
outputs)  
5.5  
5.5  
-0.5  
-5.0  
40  
-10.0  
160  
µA  
VOUT=GND  
ICC  
Maximum Quiescent VIL=GND  
Supply Current  
per Package)  
4.0  
µA  
VIN=VCC  
IOUT=0 µA  
Additional Quiescent VIN=2.4 V, Any One Input  
mA  
ICC  
-55°C  
2.9  
25°C to 125°C  
Supply Current  
VIN=VCC or GND, Other  
Inputs  
5.5  
2.4  
IOUT=0µA  
NOTE: Total Supply Current = ICC + Σ∆ICC.  
3
KK74HCT244A  
AC ELECTRICAL CHARACTERISTICS (VCC =5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)  
Symbol  
Parameter  
Test Conditions  
VCC  
Guaranteed Limit  
Unit  
ns  
В
25 °C 85°C 125°  
to  
C
-55°C  
tPLH, tPHL Maximum Propagation  
Delay, A to YA or B to YB  
(Figures 1 and 2)  
VCC=5 V±10%  
VIL=0 V  
VIH=3 V  
tLH=tHL=6 ns  
CL=50 pF  
5.0  
5.0  
5.0  
5.0  
20  
26  
22  
12  
25  
33  
28  
15  
30  
tPLZ, tPHZ Maximum Propagation  
Delay , Output Enable to  
VCC=5 V±10%  
VIL=0 V  
39  
33  
18  
ns  
ns  
ns  
YA or YB (Figures 1 and 2) VIH=3 V  
tLH=tHL=6 ns  
CL=50 pF  
tPZL, tPZH Maximum Propagation  
Delay , Output Enable to  
VCC=5 V±10%  
VIL=0 V  
YA or YB (Figures 1 and 2) VIH=3 V  
tLH=tHL=6 ns  
CL=50 pF  
tTLH, tTHL Maximum Output Transition VCC=5 V±10%  
Time, Any Output (Figures  
1 and 2)  
VIL=0 V  
VIH=3 V  
tLH=tHL=6 ns  
CL=50 pF  
CIN  
Maximum Input Capacitance VCC=5 V±10%  
5.0  
5.0  
10  
15  
10  
15  
10  
15  
pF  
pF  
COUT  
Maximum Three-State  
VCC=5 V±10%  
Output Capacitance (Output  
in High-Impedance State)  
Power Dissipation Capacitance (Per Enabled Output)  
Typical @25°C,VCC=5.0 V  
CPD  
Used to determine the no-load dynamic power  
consumption:  
55  
pF  
PD=CPDVCC2f+ICCVCC  
Figure 1. Switching Waveforms  
Figure 2. Switching Waveforms  
4
KK74HCT244A  
Figure 3. Test Circuit  
Figure 4. Test Circuit  
EXPANDED LOGIC DIAGRAM  
(1/8 of the Device)  
5
KK74HCT244A  
N SUFFIX PLASTIC DIP  
(MS - 001AD)  
A
Dimension, mm  
11  
10  
20  
1
Symbol MIN  
MAX  
26.92  
7.11  
B
24.89  
6.1  
A
B
C
D
F
5.33  
0.36  
1.14  
0.56  
F
L
1.78  
2.54  
7.62  
G
H
J
C
SEATING  
PLANE  
-T-  
K
N
0
10  
°
°
M
J
G
H
D
2.92  
7.62  
0.2  
3.81  
8.26  
0.36  
K
L
M
N
0.25 (0.010) M  
T
NOTES:  
1. Dimensions “A”, “B” do not include mold flash or protrusions.  
Maximum mold flash or protrusions 0.25 mm (0.010) per side.  
0.38  
D SUFFIX SOIC  
(MS - 013AC)  
A
20  
11  
Dimension, mm  
Symbol MIN  
MAX  
13  
H
B
P
12.6  
7.4  
A
B
C
D
F
7.6  
2.35  
0.33  
0.4  
2.65  
0.51  
1.27  
1
10  
G
R x 45  
C
-T-  
SEATING  
PLANE  
1.27  
9.53  
G
H
J
K
M
D
J
F
M
0.25 (0.010) M T C  
0
°
8
°
NOTES:  
0.1  
0.23  
10  
0.3  
0.32  
10.65  
0.75  
K
M
P
1. Dimensions A and B do not include mold flash or protrusion.  
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side  
for A; for B 0.25 mm (0.010) per side.  
0.25  
R
6

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