KKA1062AN [KODENSHI]

Telecom IC, PDIP16;
KKA1062AN
型号: KKA1062AN
厂家: KODENSHI KOREA CORP.    KODENSHI KOREA CORP.
描述:

Telecom IC, PDIP16

光电二极管
文件: 总9页 (文件大小:360K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TECHNICAL DATA  
TELEPHONE SPEECH NETWORK  
WITH DIALER INT`ERFACE  
KKA1062/1062A  
FEATURES  
PIN CONNECTION  
- Low DC line voltage; operates down to 1.6V (excluding  
polarity guard)  
16  
1
2
3
4
5
6
7
8
SLPE  
LN  
- Voltage regulator with adjustable static resistance  
- Provides a supply for external circuits  
GAS1  
GAS2  
OR  
15 AGC  
- Symmetrical high-impedance inputs (64 k) for  
dynamic, magnetic or piezo-electric microphones  
- Asymmetrical high-impedance input (32 k) for electret  
microphones  
REG  
14  
13  
12  
KKA1062  
V
CC  
- DTMF signal input with confidence tone  
or  
- Mute input for pulse or DTMF dialing  
- KKA1062: active HIGH (MUTE)  
KKA1062A  
GAR  
MIC-  
MIC+  
STAB  
MUTE  
DTMF  
IR  
- KKA1062A: active LOW (MUTE)  
- Receiving amplifier for dynamic, magnetic or  
piezo-electric earpieces  
11  
10  
9
- Large gain setting range on microphone and earpiece  
amplifiers  
V
EE  
- Line loss compensation (line current dependent) for  
microphone and earpiece amplifiers  
- Gain control curve adaptable to exchange supply  
- DC line voltage adjustment facility  
DESCRIPTION  
The KKA1062 and KKA1062A are integrated circuits that perform all speech and line interface functions required in fully  
electronic telephone sets. They perform electronic switching between dialing and speech. The ICs operates at line voltage down  
to 1.6 V DC (with reduced performance) to facilitate the use of more telephone sets connected in parallel.  
All statements and values refer to all versions unless otherwise specified. The KKA1062 (KKA1062A) is packaged in a standard  
16-pin plastic DIP and special plastic DIP with internal heatsink is also available.  
QUICK REFERENCE DATA  
Characteristic  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
Line Voltage  
VLN  
I line  
Iline = 15mA  
3.55  
4.0  
2.0  
4.25  
V
Operating Line Current  
Normal Operation  
Vdc  
mA  
mA  
11  
1
140  
11  
with Reduced Performance  
Internal Supply Current  
I CC  
VCC = 2.8V  
Iline= 15mA  
Ip= 1.2mA  
Ip= 0mA  
0.9  
1.35  
mA  
V
Supply Voltage for Peripherals  
VCC  
2.2  
2.2  
2.7  
3.4  
Voltage Gain  
GV  
microphone amplifier  
receiving amplifier  
Line loss compensation  
Gain Control  
44  
20  
52  
31  
dB  
dB  
5.8  
dB  
V
GV  
Vexch  
Rexch  
Exchange Supply Voltage  
36  
60  
1
Exchange Feeding bridge Resistance  
0.4  
kΩ  
KKA1062/1062A  
BLOCK DIAGRAM  
VCC  
13  
LN  
1
10  
IR  
5
GAR  
-
4
KKA1062A  
QR  
+
7
+
-
MIC+  
2
GAS1  
6
MIC-  
-
+
-
+
11  
DTMF  
dB  
3
GAS2  
(1)  
12  
MUTE  
SUPPLY AND  
REFERENCE  
CONTROL  
CURRENT  
LOW VOLTAGE  
CIRCUIT  
CURRENT  
REFERENCE  
16  
9
14  
15  
8
VEE  
REG AGC  
STAB  
SLPE  
(1) Pin 12 is active HIGH (MUTE) for KKA1062.  
Fig.1 Block diagram for KKA1062A  
KKA1062/1062A  
FUNCTIONAL DESCRIPTION  
At line currents below 9mA the internal reference voltage is  
automatically adjusted to a lower value (typically 1.6V at 1mA). This  
means that more sets can be operated in parallel with DC line voltage  
(excluding the polarity guard) down to an absolute minimum voltage  
of 1.6V. At line currents below 9mA the circuit has limited sending  
and receiving levels. The internal reference voltage can be adjusted  
by means of an external resistor (RVA). This resistor when connected  
between LN and REG will decrease the internal reference voltage  
and when connected between REG and SLPE will increase the  
internal reference voltage.  
Supplies VCC, LN, SLPE, REG and STAB  
Power for the IC and its peripheral circuits is usually obtained from  
the telephone line. The supply voltage is delivered from the line via a  
dropping resistor and regulated by the IC. The supply voltage VCC  
may also be used to supply external circuits e.g. dialing and control  
circuits.  
Decoupling of the supply voltage is performed by a capacitor  
between VCC and VEE . The internal voltage regulator is decoupled by  
a capacitor between REG and VEE.  
Microphone inputs MIC+ and MIC- and gain pins  
GAS1 and GAS2  
The DC current flowing into the set is determined by the exchange  
supply voltage Vexch , the feeding bridge resistance Rexch and the DC  
resistance of the telephone  
The circuit has symmetrical microphone inputs. Its input impedance  
is 64 k(2 x 32k) and its voltage gain is typically 52 dB (when R7  
= 68k?; see Fig.6).  
line Rline  
.
Dynamic, magnetic, piezo-electric or electret (with built-in FET  
source followers) can be used.  
The circuit has internal current stabilizer operating at a level  
determined by a 3.6 kresistor connected between STAB and VEE  
(see Fig.6). When the line current (Iline) is more than 0.5mA greater  
than the sum of the IC supply current (ICC) and the current drawn by  
the peripheral circuitry connected to VCC (Ip) the excess current is  
shunted to VEE via LN.  
The gain of the microphone amplifier can be adjusted between 44 dB  
and 52 dB to suit the sensitivity of the transducer in use. The gain is  
proportional to the value of R7 which is connected between GAS1  
and GAS2.  
The regulated voltage on the line terminal (VLN) can be calculated as:  
Stability is ensured by two external capacitors, C6 connected  
between GAS1 and SLPE and C8 connected between GAS1 and  
VEE. The value of C6 is 100pF but this may be increased to obtain a  
first-order low-pass filter. The value of C8 is 10 times the value of  
C6. The cut-off frequency corresponds to the time constant R7 x C6.  
V
V
LN = Vref + ISLPE x R9  
LN = Vref + {(Iline - ICC - 0.5 x 10-3A) - Ip} x R9  
Vref is an internally generated temperature compensated reference  
voltage of 3.7V and R9 is an external resistor connected between  
SLPE and VEE.  
Input MUTE (KKA1062A)  
In normal use the value of R9 would be 20?.  
When MUTE is LOW or open-circuit, the DTMF input is enable and  
the microphone and receiving amplifier inputs are inhibited. The  
reverse is true when MUTE is HIGH.  
MUTE switching causes only negligible clicking on the line and  
earpiece output. If the number of parallel sets in use causes a drop in  
line current to below 6 mA the DTMF amplifier becomes active  
independent to the DC level applied to the MUTE input.  
Changing the value of R9 will also affect microphone gain, DTMF  
gain, gain control characteristics, sidetone level, maximum output  
swing on LN and the DC characteristics (especially at the lower  
voltages).  
Fig.2 Equivalent impedance circuit  
Dual-tone multi-frequency input DTMF  
When the DTMF input is enable dialing tones may be sent on to the  
line. The voltage gain from DTMF to LN is typically 25.5 dB (when  
R7=68k) and varies with R7 in the same way as the microphone  
gain. The signalling tones can be heard in the earpiece at a low level  
(confidence tone).  
Receiving amplifier IR, QR and GAR  
The receiving amplifier has one input (IR) and a non-inverting output  
(QR). The IR to QR gain is typically 31dB (when R4 = 100k). It  
can be adjusted between 20 and 31dB to match the sensitivity of the  
transducer in use. The gain is set with the value of R4 which is  
connected between GAR and QR. The overall receive gain, between  
LN and QR, is calculated by subtracting the anti-sidetone network  
attenuation (32dB) from the amplifier gain. Two external capacitors,  
C4 and C7, ensure stability. C4 is normally 100pF and C7 is 10 times  
the value of C4. The value of C4 may be increased to obtain a first-  
order low-pass filter. The cut-off frequency will depend on the time  
constant R4 x C4.  
Under normal conditions, when ISLPE >>ICC + 0.5mA + Ip, the static  
behaviour of the circuit is that of a 3.7V regulator diode with an  
internal resistance equal to that of R9. In the audio frequency range  
the dynamic impedance is largely determined by R1. Fig.2 show the  
equivalent impedance of the circuit.  
The output voltage of the receiving amplifier is specified for  
continuous-wave drive. The maximum output voltage will be higher  
under speech conditions where the peak to RMS ratio is higher.  
Automatic gain control input AGC  
KKA1062/1062A  
Zbal  
Zline  
Automatic line loss compensation is achieved by connecting a  
resistor (R6) between AGC and VEE  
=
(2)  
.
Zbal + R 8  
Zline+ R 1  
The automatic gain control varies the gain of the microphone  
amplifier and the receiving amplifier in accordance with the DC line  
current. The control range is 5.8 dB which corresponds to a line  
length of 5 km for a  
If fixed values are chosen for R1, R2, R3 and R9, then condition (1)  
will always be fulfilled when  
0.5mm diameter twisted-pair copper cable with a DC resistance of  
176 ?/km and average attenuation of  
To obtain optimum sidetone suppression, condition (2) has to be  
fulfilled which results in:  
R 8  
1.2dB/km. Resistor R6 should be chosen in accordance with the  
exchange supply voltage and its feeding bridge resistance. The ratio  
of start and stop currents of the AGC curve is independent of the  
value of R6. If no automatic  
line-loss compensation is required the AGC pin may be left open-  
circuit. The amplifiers, in this condition, will give their maximum  
specified gain.  
Zbal  
=
x Zline = k x Zline  
R 1  
R 8  
R 1  
Where k is scale factor; k =  
The scale factor k, dependent on the value of R8, is chosen to meet  
the following criteria:  
- compatibility with a standard capacitor from the E6 or  
E12 range for Zbal  
- |Zbal//R8|<<R8 fulfilling condition (a) and thus  
ensuring correct  
Sidetone suppression  
The anti-sidetone network, R1//Zline, R2, R3, R8, R9 and Zbal  
suppresses the transmitted signal in the earpiece. Maximum  
compensation is obtained when the following conditions are fulfilled:  
anti-sidetone bridge operation  
- |Zbal + R8|>>R9 to avoid influencing the transmit gain.  
R 8 x Zbal  
In practise Zline varies considerably with the line type and length. The  
value chosen for Zbal should therefore be for an average line thus  
giving optimum setting for short or long lines.  
R9 x R2 = R1 x R 3 +  
(1)  
R 8 + Zbal  
ABSOLUTE MAXIMUM RATING  
Characteristic  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
Positive Continuous Line Voltage  
Repetitive Line Voltage During Switch-on  
or Line Interruption  
VLN  
VLN(R)  
12  
13.2  
V
V
Repetitive Peak Line Voltage for a 1ms  
Pulse per 5s  
VLN(RM)  
28  
V
R9 = 20; R10 = 13;  
see Fig.6  
Line Current  
Input Voltage on all other Pins  
Total Power  
Dissipation  
Operating Ambient Temperature  
Storage Temperature  
Iline  
VI  
Ptot  
140  
VCC+0.7  
0.58  
0.67  
+75  
mA  
V
W
R9 = 20; note 1  
R9 = 20; note 2  
-0.7  
Standard DIP  
DIP with heatsink  
TA  
Tstg  
Tj  
-25  
-40  
oC  
oC  
oC  
+125  
+125  
Junction Temperature  
Notes  
1. Mostly dependent on the maximum required TA and on the voltage between LN and SLPE.  
2. Calculated for the maximum ambient temperature specified and a maximum junction temperature of 125oC.  
(Thermal Resistance RJA = 85oC/W for standard DIP and RJA = 75oC/W for special DIP with heatsink).  
150  
LN (mA)  
130  
150  
I
I
LN (mA)  
130  
110  
90  
(1)  
110  
90  
(1)  
(2)  
(3)  
(4)  
(2)  
(3)  
(4)  
70  
70  
(1) TA = 45oC; Ptot = 0.94 W  
(2) TA = 55oC; Ptot = 0.82 W  
(3) TA = 65oC; Ptot = 0.71 W  
(4) TA = 75oC; Ptot = 0.58 W  
(1) TA = 45oC; Ptot = 1.07 W  
(2) TA = 55oC; Ptot = 0.93 W  
(3) TA = 65oC; Ptot = 0.80 W  
(4) TA = 75oC; Ptot = 0.67 W  
50  
30  
50  
30  
4
6
8
10  
12  
2
4
6
8
10  
12  
2
V
LN - VSLPE (V)  
V
LN - VSLPE (V)  
Fig.3a Safe operating area  
(Standard DIP)  
Fig.3b Safe operating area  
(DIP with HS)  
KKA1062/1062A  
ELECTRICAL CHARACTERISTICS  
Iline = 11mA to mA; VEE = 0V; f = 800Hz; TA = 25oC; unless otherwise specified.  
Characteristic  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
Voltage Drop over Circuit between LN and VEE  
VLN  
MIC inputs open-circuit  
I
line = 1mA  
1.6  
1.9  
4.0  
5.7  
V
Iline = 4mA  
Iline = 15mA  
3.55  
4.9  
4.25  
6.5  
I
line = 100mA  
Iline = 140mA  
Iline = 15mA  
Iline = 15mA  
RVA(LN to REG) = 68k Ω  
RVA(REG to SLPE) = 39kΩ  
VCC = 2.8V  
7.5  
Variation with Temperature  
-0.3  
mV/oC  
V
|VLN/T  
Voltage Drop over Circuit Between LN and VEE  
with External Resistor RVA  
VLN  
3.5  
4.5  
Supply Current  
ICC  
0.9  
1.35  
mA  
V
Supply Voltage available for Peripheral Circuitry  
VCC  
Iline = 15mA;  
Ip = 1.2mA  
Ip = 0mA  
2.2  
2.7  
3.4  
Microphone inputs MIC- and MIC+ (pins 6 and 7)  
Input Impedance  
Differential  
Single-ended  
Common mode rejection ratio  
Voltage Gain MIC+ or MIC- to LN  
|Zi |  
between MIC- and MIC+  
MIC- or MIC+ to VEE  
64  
32  
82  
52.0  
0.2  
kΩ  
kΩ  
dB  
dB  
dB  
CMRR  
Gv  
50.5  
53.5  
Iline = 15mA; R7 = 68k Ω  
f = 300 and 3400 Hz  
Gain Variation with Frequency referenced to  
800Hz  
Gvf  
Gain Variation with Temperature referenced to  
without R6; Iline = 50mA;  
TA = -25 and +75 oC  
0.2  
dB  
GvT  
25 oC  
DTMF Input (Pin 11)  
Input Impedance  
Voltage Gain from DTMF to LN  
Gain Variation with Frequency referenced to  
800Hz  
20.7  
25.5  
0.2  
|Zi |  
Gv  
kΩ  
dB  
dB  
24.3  
27.0  
Iline = 15mA; R7 = 68kΩ  
f = 300 and 3400 Hz  
Gvf  
Gain Variation with Temperature referenced to  
Iline = 50mA;  
0.2  
dB  
GvT  
25 oC  
TA = -25 and +75 oC  
Gain adjustment inputs GAS1 and GAS2 (Pins2 and 3)  
Transmitting Amplifier Gain variation by  
adjustment of R7 between GAS1 and GAS2  
-8  
0
dB  
Gv  
Sending amplifier output LN (Pin1)  
Output Voltage (RMS value)  
VLN(rms)  
THD = 10 %  
I
line = 4mA  
0.8  
2.3  
V
V
Iline = 15mA  
1.7  
Receiving amplifier input IR (Pin 10)  
Input Impedance  
21  
|Zi |  
Iline = 15mA; RL = 300;  
kΩ  
(from pin 9 to  
Receiving amplifier output QR (Pin 4)  
Output Impedance  
4
|Zo |  
Voltage Gain from IR to QR  
Gv  
29.5  
31  
32.5  
dB  
Iline = 15mA; RL = 300;  
(from pin 9 to pin 4)  
f = 300 and 3400 Hz  
Gain Variation with Frequency referenced to  
800Hz  
0.2  
0.2  
dB  
dB  
Gvf  
GvT  
Vo(rms)  
Gain Variation with Temperature referenced to  
25oC  
without R6; Iline = 50mA;  
TA = -25 and +75oC  
Output Voltage (RMS value)  
THD = 2%; sine wave drive:  
KKA1062/1062A  
R4 = 100 K;  
line = 15 mA; Ip = 0 mA  
RL = 150 Ω  
I
0.22  
0.3  
0.33  
0.48  
V
V
RL = 450 Ω  
Output Voltage (RMS value)  
Vo(rms)  
15  
mV  
Iline = 15mA; RL = 300;  
(from pin 9 to pin 4)  
Gain adjustment input GAR (Pin 5)  
Receiving Amplifier Gain Variation by  
adjustment of R4 between GAR and QR  
-11  
0
dB  
Gv  
Iline = 15mA; RL = 300;  
(from pin 9 to pin 4)  
Mute input (Pin 12)  
HIGH Level Input Voltage  
LOW Level Input Voltage  
Input Current  
VIH  
VIIL  
Iline = 15mA  
Iline = 15mA  
1.5  
-
VCC  
0.3  
15  
V
V
IMUTE  
8
uA  
Reduction of Gain  
MIC+ or MIC- to LN  
TEA1062  
TEA1062A  
Voltage Gain from DTMF to QR  
TEA1062  
TEA1062A  
dB  
dB  
Gv  
MUTE = HIGH  
MUTE = LOW  
R4 = 100k; RL = 300Ω  
MUTE = HIGH  
70  
70  
Gv  
-17  
-17  
MUTE = LOW  
Automatic Gain Control Input AGC (Pin 15)  
Controlling the Gain from IR to QR and the  
Gain from MIC+, MIC- to LN  
Gv  
R6 = 110kΩ  
(between AGC and VEE  
line = 70mA  
)
Gain Control Range  
5.8  
23  
61  
dB  
mA  
mA  
I
Highest Line Current for Maximum Gain  
Lowest Line Current for Minimum Gain  
IlineH  
IlineL  
Iline = 15mA  
Iline = 70mA  
20  
65  
The supply possibilities can be increased by setting the voltage drop over the circuit VLN to a higher value be resistor RVA connected between REG and  
SLPE.  
VCC > 2.2V; Iline = 15mA at VLN = 4V; R1 = 620; R9 = 20Ω  
(1) Ip = 2.1mA. Curve (1) is valid when the receiving or when MUTE = HIGH(KKA1062), MUTE = LOW(KKA1062A).  
(2) Ip = 1.7mA. Curve (2) is valid when MUTE = LOW(KKA1062), MUTE = HIGH(KKA1062A) and the receiving amplifier is  
driven; Vo(rms) = 150mV, RL = 150.  
Fig.4 Typical current Ip available from VCC for peripheral circuitry.  
KKA1062/1062A  
Fig. 5 Variation of gain as a function of the line current with R6 as a parameter  
TABLE 1  
Values of resistor R6 for optimum line-loss compensation at various values of exchange supply voltage (Vexch) and exchange bridge resistance (Rexch );  
R9 = 20>.  
400 Rexch ()  
600 Rexch ()  
800 Rexch ()  
1000 Rexch ()  
Vexch (V)  
R6 (k)  
36  
48  
60  
100  
140  
-
78.7  
110  
-
-
-
93.1  
120  
82  
102  
PINNING  
Pin  
Symbol  
Description  
1
2
LN  
GAS1  
GAS2  
QR  
Positive Line Terminal  
Gain Adjustment; Transmitting Amplifier  
Gain Adjustment; Transmitting Amplifier  
Non-inverting Output; Receiving Amplifier  
Gain Adjustment; Receiving Amplifier  
Inverting Microphone Input  
3
4
5
GAR  
MIC-  
MIC+  
STAB  
VEE  
6
7
Non-inverting Microphone Input  
Current Stabilizer  
8
9
Negative Line Terminal  
10  
11  
12  
13  
14  
15  
16  
IR  
Receiving Amplifier Input  
DTMF  
MUTE  
VCC  
Dual-tone Multi-Frequency Input  
Mute Input (see note 1)  
Positive Supply Decoupling  
REG  
AGC  
SLPE  
Voltage Regulator Decoupling  
Automatic Gain Control Input  
Slope (DC resistance) Adjustment  
Note 1. Pin 12 is active HIGH (MUTE) for KKA1062  
KKA1062/1062A  
APPLICATION INFORMATION  
KKA1062A  
Fig. 6 Typical application of KKA1062A, with piezo-electric earpiece and DTMF dialling  
KKA1062/1062A  
N SUFFIX PLASTIC DIP  
(MS - 001BB)  
A
Dimension, mm  
9
8
16  
1
Symbol  
MIN  
18.67  
6.1  
MAX  
19.69  
7.11  
B
A
B
C
D
F
5.33  
0.36  
1.14  
0.56  
F
L
1.78  
C
2.54  
7.62  
G
H
J
SEATING  
PLANE  
-T-  
N
M
0
°
10  
°
J
G
K
H
D
2.92  
7.62  
0.2  
3.81  
8.26  
0.36  
K
L
M
N
0.25 (0.010) M  
T
NOTES:  
1. Dimensions “A”, “B” do not include mold flash or protrusions.  
Maximum mold flash or protrusions 0.25 mm (0.010) per side.  
0.38  
D SUFFIX SOIC  
(MS - 012AC)  
Dimension, mm  
A
16  
Symbol  
MIN  
9.8  
MAX  
10  
9
A
B
C
D
F
H
B
P
3.8  
4
1.35  
0.33  
0.4  
1.75  
0.51  
1.27  
1
8
G
R x 45  
C
1.27  
5.72  
G
H
J
-T-  
SEATING  
PLANE  
K
M
D
J
F
0.25 (0.010) M T C  
M
0
°
8
°
0.1  
0.19  
5.8  
0.25  
0.25  
6.2  
K
M
P
NOTES:  
1. Dimensions A and B do not include mold flash or protrusion.  
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side  
0.25  
0.5  
R
for A; for B 0.25 mm (0.010) per side.  

相关型号:

SI9130DB

5- and 3.3-V Step-Down Synchronous Converters

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1-E3

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135_11

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9136_11

Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY