SL8X305 [LANSDALE]
Microcontroller; 微控制器
| 型号： | SL8X305 |
| 厂家： | 
LANSDALE SEMICONDUCTOR INC. |
| 描述： | Microcontroller |
| 文件： | 总6页 (文件大小：1304K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SL8X305
Microcontroller
Legacy Device: Philips/Signetics S8X305
FEATURES
• Fetch, Decode, and Execute a 16-bit Instruction in a minimum
of 200ns (one machine cycle)
• Bit-oriented instruction set (addressable single– or multiple-bit
subfields)
• Separate buses for instruction, instruction Address and 3–
State I/O
• Thirteen 8-bit general-purpose working registers
• Source/destination architecture
• Bipolar low-power Schottky technology/TTL inputs and outputs
• On–chip oscillator and timing generation
• Single +5V supply
• Multiple package options
PRODUCT DESCRIPTION
The Signetics 8X305 Microcontroller (Figure 1) is a
high–speed bipolar microprocessor implemented with
low–power Schottky technology. In a single chip, the 8X305
combines speed, flexibility, and a bit–oriented instruction set.
These features and other basic characteristics of the chip com-
bine to provide cost–effective solutions for a broad range of
applications. The 8X305 is particularly useful in systems that
require high–speed bit manipulations — sophisticated con-
trollers, data communications, very fast interface control, and
other applications of a similar nature.
The 8X305 can fetch, decode, and execute a 16-bit instruction
word in a minimum of 200ns. Within one instruction cycle, the
8-bit data-processing path can be programmed to rotate, mask,
shift, and/or merge single or multiple bit subfields and, in addi-
tion, perform an ALU operation; in the same instruction, an
external data field can be input, processed, and output to a speci-
fied destination — likewise, single or multiple bit data fields can
be internally moved from a given source to a given destination.
To summarize, fixed or variable-length data fields can be
fetched, processed, operated on by the ALU, and moved to a dif-
ferent location — all in a timeframe of 200ns. To interface with
I/O and program memory, the 8X305 uses a 13-bit instruction
bus, an 8-bit bidirectional multiplexed I/O data/address bus and a
5-bit I/O control bus.
A wide selection of I/O devices, interface chips, and special-
purpose parts are available for systems use. In most applications,
the more powerful 8X305 is functionally interchangeable with its
predecessor — the 8X300.
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LANSDALE Semiconductor, Inc.
Lansdale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliabili-
ty, function or design. Lansdale does not assume any liability arising out of the application or use of any product or circuit
described herein; neither does it convey any license under its patent rights nor the rights of others. “Typical” parameters which
may be provided in Lansdale data sheets and/or specifications can vary in different applications, and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by the customer’s
technical experts. Lansdale Semiconductor is a registered trademark of Lansdale Semiconductor, Inc.
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