LT1225CS8 [Linear]
Very High Speed Operational Amplifier; 超高速运算放大器
| 型号： | LT1225CS8 |
| 厂家： | 
Linear |
| 描述： | Very High Speed Operational Amplifier |
| 文件： | 总8页 (文件大小：248K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1225
Very High Speed
Operational Amplifier
U
DESCRIPTIO
EATURE
S
F
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■
Gain of 5 Stable
TheLT1225isaveryhighspeedoperationalamplifierwith
excellent DC performance. The LT1225 features reduced
input offset voltage and higher DC gain than devices with
comparable bandwidth and slew rate. The circuit is a
singlegainstagewithoutstandingsettlingcharacteristics.
The fast settling time makes the circuit an ideal choice for
data acquisition systems. The output is capable of driving
a 500Ω load to ±12V with ±15V supplies and a 150Ω load
to ±3V on ±5V supplies. The circuit is also capable of
driving large capacitive loads which makes it useful in
buffer or cable driver applications.
150MHz Gain Bandwidth
400V/µs Slew Rate
20V/mV DC Gain, RL = 500Ω
1mV Maximum Input Offset Voltage
±12V Minimum Output Swing into 500Ω
Wide Supply Range: ±2.5V to ±15V
7mA Supply Current
90ns Settling Time to 0.1%, 10V Step
Drives All Capacitive Loads
O U
PPLICATI
Wideband Amplifiers
Buffers
Active Filters
Video and RF Amplification
Cable Drivers
Data Acquisition Systems
S
A
The LT1225 is a member of a family of fast, high per-
formance amplifiers that employ Linear Technology
Corporation’s advanced bipolar complementary
processing.
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■
U
O
TYPICAL APPLICATI
Gain of 5 Pulse Response
20MHz,AV = 50 Instrumentation Amplifier
+
LT1225
–
1k
10k
1k
1k
250Ω
250Ω
+
200pF
1k
+
V
V
OUT
LT1225
IN
–
–
10k
LT1225 TA02
–
LT1225
+
LT1225 TA01
1
LT1225
W W W
U
/O
ABSOLUTE AXI U RATI GS
PACKAGE RDER I FOR ATIO
Total Supply Voltage (V+ to V–) .............................. 36V
Differential Input Voltage ......................................... ±6V
Input Voltage ............................................................±VS
Output Short Circuit Duration (Note 1) ............ Indefinite
Operating Temperature Range
TOP VIEW
ORDER PART
1
2
3
4
NUMBER
NULL
–IN
8
7
6
5
NULL
+
V
LT1225CN8
LT1225CS8
OUT
NC
+IN
–
V
LT1225C................................................ 0°C to 70°C
Maximum Junction Temperature
Plastic Package .............................................. 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
N8 PACKAGE
S8 PACKAGE
S8 PART MARKING
1225
8-LEAD PLASTIC DIP 8-LEAD PLASTIC SOIC
LT1225 PO01
TJ MAX = 15O°C, θJA = 130°C/W (N8)
TJ MAX = 15O°C, θJA = 220°C/W (S8)
ELECTRICAL CHARACTERISTICS VS = ±15V, TA = 25°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
0.5
100
4
MAX
1.0
400
8
UNITS
mV
V
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Current
Input Resistance
(Note 2)
OS
I
I
nA
OS
µA
B
e
f = 10kHz
f = 10kHz
7.5
1.5
nV/√Hz
pA/√Hz
n
i
n
R
V
= ±12V
CM
24
12
40
70
MΩ
kΩ
IN
Differential
C
Input Capacitance
Input Voltage Range +
Input Voltage Range –
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Swing
2
14
pF
V
IN
–13
115
95
–12
V
CMRR
PSRR
V
= ±12V
94
86
dB
CM
V = ±5V to ±15V
S
dB
A
V
V
= ±10V, R = 500Ω
12.5
±12.0
24
20
V/mV
V
VOL
OUT
OUT
OUT
L
R = 500Ω
L
±13.3
40
I
Output Current
V
= ±12V
mA
V/µs
MHz
MHz
ns
OUT
SR
Slew Rate
(Note 3)
250
400
6.4
150
7
Full Power Bandwidth
Gain Bandwidth
10V Peak, (Note 4)
f = 1MHz
GBW
t , t
r
Rise Time, Fall Time
Overshoot
A
A
= 5, 10% to 90%, 0.1V
= 5, 0.1V
f
VCL
VCL
20
%
Propagation Delay
Settling Time
50% V to 50% V
7
ns
IN
OUT
t
10V Step, 0.1%, A = –5
90
ns
s
V
Differential Gain
f = 3.58MHz, A = 5, R = 150Ω
1.0
1.7
4.5
7
%
V
L
Differential Phase
Output Resistance
Supply Current
f = 3.58MHz, A = 5, R = 150Ω
Deg
Ω
V
L
R
A
= 5, f = 1MHz
VCL
O
I
9
mA
S
2
LT1225
ELECTRICAL CHARACTERISTICS V = ±5V, T = 25°C, V
CM = 0V unless otherwise noted.
S
A
SYMBOL
PARAMETER
CONDITIONS
(Note 2)
MIN
TYP
1.0
100
4
MAX
2.0
400
8
UNITS
mV
nA
V
Input Offset Voltage
Input Offset Current
Input Bias Current
OS
I
I
OS
µA
V
B
Input Voltage Range +
Input Voltage Range –
Common-Mode Rejection Ratio
Large-Signal Voltage Gain
2.5
4
–3
115
–2.5
V
CMRR
V
= ±2.5V
94
10
dB
CM
A
V
OUT
V
OUT
= ±2.5V, R = 500Ω
= ±2.5V, R = 150Ω
15
13
V/mV
V/mV
VOL
OUT
OUT
L
L
V
Output Voltage
R = 500Ω
R = 150Ω
±3.0
±3.0
±3.7
±3.3
V
V
L
L
I
Output Current
Slew Rate
V
OUT
= ±3V
20
40
250
13.3
100
9
mA
V/µs
MHz
MHz
ns
SR
(Note 3)
Full Power Bandwidth
Gain Bandwidth
Rise Time, Fall Time
Overshoot
3V Peak, (Note 4)
f = 1MHz
GBW
t , t
A
VCL
A
VCL
= 5, 10% to 90%, 0.1V
= 5, 0.1V
r
f
10
9
%
Propagation Delay
Settling Time
50% V to 50% V
ns
IN
OUT
t
I
– 2.5V to 2.5V, 0.1%, A = –4
70
7
ns
s
V
Supply Current
9
mA
S
0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
V = ±15V, (Note 2)
MIN
TYP
MAX
1.5
2.5
UNITS
V
OS
Input Offset Voltage
0.5
1.0
mV
mV
S
V = ±5V, (Note 2)
S
Input V Drift
10
100
4
µV/°C
nA
OS
I
I
Input Offset Current
V = ±15V and V = ±5V
600
9
OS
S
S
Input Bias Current
V = ±15V and V = ±5V
µA
B
S
S
CMRR
PSRR
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
V = ±15V, V = ±12V and V = ±5V, V = ±2.5V
93
85
115
95
dB
S
CM
S
CM
V = ±5V to ±15V
S
dB
A
V = ±15V, V
= ±10V, R = 500Ω
10
8
12.5
10
V/mV
V/mV
VOL
OUT
OUT
S
OUT
L
V = ±5V, V
= ±2.5V, R = 500Ω
S
OUT
L
V
Output Swing
Output Current
V = ±15V, R = 500Ω
±12.0
±3.0
±13.3
±3.3
V
V
S
L
V = ±5V, R = 500Ω or 150Ω
S
L
I
V = ±15V, V
= ±12V
OUT
24
20
40
40
mA
mA
S
V = ±5V, V
= ±3V
S
OUT
SR
Slew Rate
V = ±15V, (Note 3)
250
400
7
V/µs
S
I
Supply Current
V = ±15V and V = ±5V
10.5
mA
S
S
S
Note 1: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 3: Slew rate is measured between ±10V on an output swing of ±12V
on ±15V supplies, and ±2V on an output swing of ±3.5V on ±5V supplies.
Note 2: Input offset voltage is tested with automated test equipment
in <1 second.
Note 4: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2πVp.
3
LT1225
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Common-Mode Range vs
Supply Voltage
Output Voltage Swing vs
Supply Voltage
Supply Current vs Supply Voltage
20
15
10
5
8.0
7.5
7.0
6.5
6.0
20
15
10
5
T
= 25°C
A
L
T
= 25°C
OS
T = 25°C
A
A
R
= 500Ω
∆V < 1mV
∆V = 30mV
OS
+V
SW
+V
–V
CM
–V
SW
CM
0
0
0
5
10
15
20
0
5
10
15
20
0
5
10
15
20
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
LT1225 TPC01
LT1225 TPC02
LT1225 TPC03
Output Voltage Swing vs
Resistive Load
Input Bias Current vs Input
Common-Mode Voltage
Open-Loop Gain vs
Resistive Load
30
25
20
15
10
5
100
90
80
70
60
50
5.0
4.5
4.0
3.5
3.0
T
= 25°C
OS
T
= 25°C
A
A
V
= ±15V
= 25°C
S
A
∆V = 30mV
T
I
+ I
B+ B–
V
V
= ±15V
= ±5V
I
=
S
B
2
V
= ±15V
S
S
V
= ±5V
S
0
10
100
1k
10k
10
100
1k
10k
–15 –10
–5
0
5
10
15
LOAD RESISTANCE (Ω)
LOAD RESISTANCE (Ω)
INPUT COMMON-MODE VOLTAGE (V)
LT1225 TPC04
LT1225 TPC06
LT1225 TPC05
Output Short-Circuit Current vs
Temperature
Supply Current vs Temperature
Input Bias Current vs Temperature
5.0
4.75
4.5
10
9
55
50
45
40
35
30
25
V
= ±15V
V
= ±15V
V
= ±5V
S
S
S
I
+ I
B+ B–
I
=
B
2
8
4.25
4.0
7
SINK
SOURCE
6
3.75
3.5
5
4
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
LT1225 TPC08
LT1225 TPC07
LT1225 TPC09
4
LT1225
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Power Supply Rejection Ratio vs
Common-Mode Rejection Ratio vs
Frequency
Input Noise Spectral Density
Frequency
1000
100
10
10
100
80
120
100
V
= ±15V
= 25°C
V
= ±15V
= 25°C
S
A
S
A
T
T
i
n
+PSRR
1.0
0.1
0.01
80
60
60
–PSRR
40
e
n
40
20
0
V
T
V
R
= ±15V
= 25°C
= 101
S
A
20
0
A
= 100k
S
1
100
10k
100k 1M
FREQUENCY (Hz)
10M 100M
1k
10k
100k
1M
10M
100M
1k
10
100
1k
FREQUENCY (Hz)
10k
100k
FREQUENCY (Hz)
LT1225 TPC11
LTXXXX • TPCXX
LT1225 TPC10
Voltage Gain and Phase vs
Frequency
Frequency Response vs
Capacitive Load
Output Swing vs Settling Time
24
22
20
10
100
80
100
80
V
T
= ±15
V
T
= ±15V
= 25°C
= –5
S
A
S
A
V
8
6
4
V
= ±15V
= 25°C
S
10mV SETTLING
A
C = 100pF
C = 50pF
C = 0pF
A
V
= 5
V
S
= ±5V
A
V
= –5
18
16
14
12
10
8
2
0
60
60
V
= ±15V
S
V
= ±5V
S
–2
–4
–6
–8
–10
40
40
A
V
= –5
C = 1000pF
C = 500pF
20
0
20
0
A
= 5
V
6
4
T
= 25°C
1k
A
1M
10M
FREQUENCY (HZ)
100M
100
10k
100k 1M
10M 100M
0
20
40
60
80
100
120
FREQUENCY (Hz)
SETTLING TIME (ns)
LT1225 TPC15
LT1225 TPC13
LTC1225 TPC14
Closed-Loop Output Impedance vs
Frequency
Gain Bandwidth vs Temperature
Slew Rate vs Temperature
500
450
400
350
100
10
153
152
151
150
V
S
A
V
= ±15V
= –5
V
= ±15V
= 25°C
= 5
V = ±15V
S
S
A
V
T
A
–SR
+SR
1
300
250
200
149
148
147
0.1
0.01
50
TEMPERATURE (˚C)
100 125
50
TEMPERATURE (˚C)
100 125
–50 –25
0
25
75
1M
10M
–50 –25
25
75
10k
100M
0
100k
FREQUENCY (Hz)
LT1225 TPC18
LT1225 TPC16
LT1225 TPC17
5
LT1225
PPLICATI
O U
W
U
A
S I FOR ATIO
Small Signal, AV = 5
Small Signal, AV = –5
TheLT1225maybeinserteddirectlyintoHA2541,HA2544,
AD847, EL2020 and LM6361 applications, provided that
the amplifier configuration is a noise gain of 5 or greater,
andthenullingcircuitryisremoved.Thesuggestednulling
circuit for the LT1225 is shown below.
Offset Nulling
+
V
5k
0.1µF
LT1225 AI02
1
Thelarge-signalresponseinbothinvertingandnoninvert-
ing gain shows symmetrical slewing characteristics. Nor-
mally the noninverting response has a much faster rising
edge than falling edge due to the rapid change in input
common-modevoltagewhichaffectsthetailcurrentofthe
input differential pair. Slew enhancement circuitry has
been added to the LT1225 so that the noninverting slew
rate response is balanced.
8
3
2
+
–
7
4
6
LT1225
0.1µF
–
V
LT1225 AI01
Layout and Passive Components
Large Signal, AV = 5
Large Signal, AV = –5
As with any high speed operational amplifier, care must be
taken in board layout in order to obtain maximum perfor-
mance. Key layout issues include: use of a ground plane,
minimization of stray capacitance at the input pins, short
lead lengths, RF-quality bypass capacitors located close
to the device (typically 0.01µF to 0.1µF), and use of low
ESR bypass capacitors for high drive current applications
(typically 1µF to 10µF tantalum). Sockets should be
avoided when maximum frequency performance is
required, although low profile sockets can provide
reasonable performance up to 50MHz. For more details
see Design Note 50. Feedback resistor values greater than
5karenotrecommendedbecauseapoleisformedwiththe
input capacitance which can cause peaking. If feedback
resistors greater than 5k are used, a parallel
capacitorof5pFto10pFshouldbeusedtocanceltheinput
pole and optimize dynamic performance.
LT1225 AI03
Input Considerations
Resistors in series with the inputs are recommended for
the LT1225 in applications where the differential input
voltage exceeds ±6V continuously or on a transient basis.
An example would be in noninverting configurations with
high input slew rates or when driving heavy capacitive
loads. The use of balanced source resistance at each input
isrecommendedforapplicationswhereDCaccuracymust
be maximized.
Transient Response
TheLT1225gain-bandwidthis150MHzwhenmeasuredat
1MHz. The actual frequency response in gain of 5 is
considerablyhigherthan30MHzduetopeakingcausedby
a second pole beyond the gain of 5 crossover point. This
is reflected in the small-signal transient response. Higher
noisegainconfigurationsexhibitlessovershootasseenin
the inverting gain of 5 response.
Capacitive Loading
The LT1225 is stable with all capacitive loads. This is
accomplishedbysensingtheloadinducedoutputpoleand
adding compensation at the amplifier gain node. As the
capacitive load increases, both the bandwidth and phase
margin decrease so there will be peaking in the frequency
6
LT1225
O U
W
U
PPLICATI
A
S I FOR ATIO
Compensation
domain and in the transient response. The photo of the
small-signalresponsewith1000pFloadshows50%peak-
ing.Thelarge-signalresponsewitha10,000pFloadshows
the output slew rate being limited by the short-circuit
current.
The LT1225 has a typical gain-bandwidth product of
150MHz which allows it to have wide bandwidth in high
gain configurations (i.e., in a gain of 10 it will have a
bandwidth of about 15MHz). The amplifier is stable in a
noise gain of 5 so the ratio of the output signal to the
inverting input must be 1/5 or less. Straightforward gain
configurations of 5 or –4 are stable, but there are a few
configurations that allow the amplifier to be stable for
lower signal gains (the noise gain, however, remains 5 or
more). One example is the summing amplifier shown in
the typical applications section below. Each input signal
hasagainof –RF/RIN totheoutput, butitiseasilyseenthat
this configuration is equivalent to a gain of –4 as far as the
amplifier is concerned. Lag compensation can also be
used to give a low frequency gain less than 5 with a high
frequency gain of 5 or greater. The example below has a
DC gain of one, but an AC gain of 5. The break frequency
of the RC combination across the amplifier inputs should
be approximately a factor of 10 less than the gain band-
width of the amplifier divided by the high frequency gain
(in this case 1/10 of 150MHz/5 or 3MHz).
AV = 5, CL = 10,000pF
AV = –5, CL = 1000pF
LT1225 AI04
The LT1225 can drive coaxial cable directly, but for best
pulse fidelity the cable should be doubly terminated with
a resistor in series with the output.
U
O
TYPICAL APPLICATI S
Cable Driving
Lag Compensation
R3
Ω75
+
V
75Ω CABLE
IN
LT1225
V
OUT
V
+
IN
–
LT1225
V
OUT
R4
75Ω
500Ω
R1
1k
–
100pF
2k
= 1, f < 3MHz
R2
250Ω
LT1225 TA03
A
V
LT1225 TA04
Wein Bridge Oscillator
Summing Amplifier
430Ω
#327
LAMP
R
F
R
R
–
+
IN
V
–
+
IN1
LT1225
V
OUT
1.5k
IN
>10V
LT1225
V
OUT
P-P
V
IN2
1MHz
R
IN
100pF
100pF
V
IN
n
1.5k
nR
F
4
R
IN
=
LT1225 TA06
LT1225 TA05
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
7
LT1225
W
W
SI PLIFIED SCHE ATIC
V+
7
NULL
1
8
BIAS 1
–IN
BIAS 2
+IN
3
2
6
OUT
V–
4
LT1224 • TA10
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead Plastic DIP
0.400
(10.160)
MAX
0.130 ± 0.005
0.300 – 0.320
0.045 – 0.065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.128)
8
1
7
6
5
4
0.065
(1.651)
TYP
0.250 ± 0.010
(6.350 ± 0.254)
0.009 – 0.015
(0.229 – 0.381)
0.125
0.020
(0.508)
MIN
(3.175)
MIN
+0.025
–0.015
2
3
0.045 ± 0.015
(1.143 ± 0.381)
0.325
+0.635
8.255
N8 0392
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
S8 Package
8-Lead Plastic SOIC
0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020
(0.254 – 0.508)
7
5
8
6
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0.228 – 0.244
0.150 – 0.157
0.016 – 0.050
0.406 – 1.270
(5.791 – 6.197)
(3.810 – 3.988)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
0°– 8° TYP
1
3
4
SO8 0392
2
LT/GP 1092 5K REV A
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
8
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1992
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