LT1371HVCSW#TRPBF [Linear]
LT1371 - 500kHz High Efficiency 3A Switching Regulator; Package: SO; Pins: 20; Temperature Range: 0°C to 70°C;
| 型号： | LT1371HVCSW#TRPBF |
| 厂家： | 
Linear |
| 描述： | LT1371 - 500kHz High Efficiency 3A Switching Regulator; Package: SO; Pins: 20; Temperature Range: 0°C to 70°C 稳压器 开关 |
| 文件： | 总16页 (文件大小：323K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1371
500kHz High Efficiency
3A Switching Regulator
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DESCRIPTION
FEATURES
The LT®1371 is a monolithic high frequency current mode
switching regulator. It can be operated in all standard
switching configurations including boost, buck, flyback,
forward, inverting and “Cuk.” A 3A high efficiency switch
is included on the die, along with all oscillator, control and
protection circuitry.
■
Faster Switching with Increased Efficiency
■
Uses Small Inductors: 4.7µH
■
All Surface Mount Components
■
Low Minimum Supply Voltage: 2.7V
■
Quiescent Current: 4mA Typ
■
Current Limited Power Switch: 3A
■
Regulates Positive or Negative Outputs
The LT1371 typically consumes only 4mA quiescent
current and has higher efficiency than previous parts.
High frequency switchingallows for very smallinductors
to be used.
■
Shutdown Supply Current: 12µA Typ
■
Easy External Synchronization
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APPLICATIONS
New design techniques increase flexibility and maintain
ease of use. Switching is easily synchronized to an exter-
nal logic level source. A logic low on the Shutdown pin
reduces supply current to 12µA. Unique error amplifier
circuitry can regulate positive or negative output voltage
while maintaining simple frequency compensation tech-
niques. Nonlinear error amplifier transconductance re-
duces output overshoot on start-up or overload recovery.
Oscillator frequency shifting protects external compo-
nents during overload conditions.
■
Boost Regulators
■
Laptop Computer Supplies
■
Multiple Output Flyback Supplies
Inverting Supplies
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
5V to 12V Boost Converter
12V Output Efficiency
D1
100
5V
L1*
4.7µH
V
= 5V
MBRS330T3
IN
†
V
OUT
12V
90
80
70
60
50
V
R1
IN
53.6k
1%
ON
V
S/S
SW
OFF
LT1371
C4**
*COILCRAFT DO3316P-472 (4.7µH),
DO3316P-103 (10µH) OR
+
+
C1**
22µF
FB
C
22µF
25V
× 2
GND
V
SUMIDA CD104-100MC (10µH)
25V
**
†
R2
6.19k
1%
AVX TPSD226M025R0200
MAX I
OUT
C2
0.047µF
R3
2k
L1
I
OUT
C3
0.0047µF
4.7µH 0.7A
10µH 0.8A
0.01
0.1
1
LT1371 • TA01
OUTPUT CURRENT (A)
LT1371 • TA02
1
LT1371
W W W
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ABSOLUTE AXI U RATI GS
Supply Voltage ....................................................... 30V
Switch Voltage
Operating Ambient Temperature Range ...... 0°C to 70°C
Operating Junction Temperature Range
LT1371 ............................................................... 35V
LT1371HV .......................................................... 42V
S/S, SHDN, SYNC Pin Voltage ................................ 30V
Feedback Pin Voltage (Transient, 10ms) .............. ±10V
Feedback Pin Current........................................... 10mA
Negative Feedback Pin Voltage
Commercial .......................................... 0°C to 125°C
Industrial ......................................... –40°C to 125°C
Short Circuit ......................................... 0°C to 150°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
(Transient, 10ms)............................................. ±10V
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PACKAGE RDER I FOR ATIO
FRONT VIEW
ORDER PART
ORDER PART
NUMBER
7
6
5
4
3
2
1
V
IN
S/S
NUMBER
TAB
IS
GND
V
SW
TOP VIEW
GND
NFB
FB
LT1371CSW
LT1371CR
V
1
2
20
19 NC
18
V
C
SW
LT1371HVCSW
LT1371ISW
LT1371HVCR
LT1371IR
FB
NFB
V
C
3
V
SW
R PACKAGE
7-LEAD PLASTIC DD
LT1371HVISW
LT1371HVIR
GND
GND
GND
GND
SHDN
SYNC
4
17 GND
16 GND
15 GND
14 GND
13 NC
TJMAX = 125°C, θJA = 30°C/W
5
WITH PACKAGE SOLDERED TO 0.5 INCH2 COPPER
AREA OVER BACKSIDE GROUND PLANE OR INTERNAL
POWER PLANE. θJA CAN VARY FROM 20°C/W TO
> 40°C/W DEPENDING ON MOUNTING TECHNIQUE
6
7
8
9
12 NC
ORDER PART
NUMBER
FRONT VIEW
V
10
11 GND
IN
7
6
5
4
3
2
1
V
IN
S/S
SW PACKAGE
20-LEAD PLASTIC SO WIDE
TAB
IS
GND
V
SW
LT1371CT7
LT1371HVCT7
LT1371IT7
GND
NFB
FB
TJMAX = 125°C, θJA = 50°C/W
θJA WILL VARY FROM APPROXIMATELY 40°C/W WITH
0.75 INCH2 OF 1 OZ COPPER TO 50°C/W WITH 0.33 INCH2
OF 1 OZ COPPER ON A DOUBLE-SIDED BOARD
V
C
LT1371HVIT7
T7 PACKAGE
7-LEAD TO-220
TJMAX = 125°C, θJA = 50°C/W, θJC = 4°C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
VIN = 5V, VC = 0.6V, VFB = VREF, VSW, S/S, SHDN, SYNC and NFB pins open, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Reference Voltage
Measured at Feedback Pin
V = 0.8V
C
1.230
1.225
1.245
1.245
1.260
1.265
V
V
REF
●
I
Feedback Input Current
Reference Voltage Line Regulation
V
= V
REF
250
550
900
nA
nA
FB
FB
●
●
2.7V ≤ V ≤ 25V, V = 0.8V
0.01
0.03
%/V
IN
C
2
LT1371
ELECTRICAL CHARACTERISTICS
VIN = 5V, VC = 0.6V, VFB = VREF, VSW, S/S, SHDN, SYNC and NFB pins open, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Negative Feedback Reference Voltage
Measured at Negative Feedback Pin
–2.540
–2.570
–2.490
–2.490
–2.440
–2.410
V
V
NFB
Feedback Pin Open, V = 0.8V
●
●
●
C
I
Negative Feedback Input Current
V
= V
–45
–30
0.01
–15
0.05
µA
NFB
NFB
NFR
Negative Feedback Reference Voltage
Line Regulation
2.7V ≤ V ≤ 25V, V = 0.8V
%/V
IN
C
g
m
Error Amplifier Transconductance
∆I = ±25µA
1100
700
1500
1900
2300
µmho
µmho
C
●
●
●
Error Amplifier Source Current
Error Amplifier Sink Current
Error Amplifier Clamp Voltage
V
V
= V – 150mV, V = 1.5V
120
200
350
µA
µA
FB
FB
REF
C
= V
+ 150mV, V = 1.5V
1400
2400
REF
C
High Clamp, V = 1V
Low Clamp, V = 1.5V
1.70
0.25
1.95
0.40
2.30
0.52
V
V
FB
FB
A
V
Error Amplifier Voltage Gain
500
1
V/V
V
V Pin Threshold
C
Duty Cycle = 0%
0.8
1.25
f
Switching Frequency
2.7V ≤ V ≤ 25V
450
430
400
500
500
550
580
580
kHz
kHz
kHz
IN
0°C ≤ T ≤ 125°C
●
●
J
–40°C ≤ T ≤ 0°C (I Grade)
J
Maximum Switch Duty Cycle
85
95
130
47
%
ns
V
Switch Current Limit Blanking Time
Output Switch Breakdown Voltage
260
BV
LT1371
LT1371HV
0° C ≤ T ≤ 125°C
●
●
35
42
40
47
V
V
J
–40°C ≤ T ≤ 0°C (I Grade)
J
V
Output Switch ON Resistance
Switch Current Limit
I
= 2A
SW
●
0.25
0.45
Ω
SAT
I
Duty Cycle = 50%
Duty Cycle = 80% (Note 1)
●
●
3.0
2.6
3.8
3.4
5.4
5.0
A
A
LIM
∆I
Supply Current Increase During Switch ON Time
15
25
mA/A
IN
∆I
SW
Control Voltage to Switch Current
Transconductance
4
A/V
Minimum Input Voltage
Supply Current
●
●
2.4
4
2.7
5.5
V
I
2.7V ≤ V ≤ 25V
mA
Q
IN
Shutdown Supply Current
2.7V ≤ V ≤ 25V, V ≤ 0.6V
IN S/S
0° C ≤ T ≤ 125°C
●
12
30
50
µA
µA
J
–40°C ≤ T ≤ 0°C (I Grade)
J
Shutdown Threshold
2.7V ≤ V ≤ 25V
●
●
●
●
0.6
5
1.3
12
2
V
µs
IN
Shutdown Delay
25
S/S or SHDN Pin Input Current
Synchronization Frequency Range
0V ≤ V or V
≤ 5V
SHDN
–10
600
15
µA
S/S
800
kHz
The
●
denotes specifications which apply over the full operating
Note 1: For duty cycles (DC) between 50% and 90%, minimum
guaranteed switch current is given by I = 1.33 (2.75 – DC).
temperature range.
LIM
3
LT1371
TYPICAL PERFORMANCE CHARACTERISTICS
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Switch Saturation Voltage
vs Switch Current
Switch Current Limit
vs Duty Cycle
Minimum Input Voltage
vs Temperature
6
5
4
3
2
1
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
3.0
2.8
2.6
2.4
2.2
2.0
1.8
150°C
100°C
25°C
25°C AND
125°C
–55°C
–55°C
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
75 100
125 150
0.4 0.8 1.2 1.6 2.0 2.4 2.8
SWITCH CURRENT (A)
3.2
3.6 4.0
0
–50 –25
0
25 50
0
TEMPERATURE (°C)
LT1371 • G02
LT1371 • G01
LT1371 • G03
Shutdown Delay and Threshold
vs Temperature
Minimum Synchronization
Voltage vs Temperature
Error Amplifier Output Current
vs Feedback Pin Voltage
20
18
16
14
12
10
8
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
400
300
3.0
2.5
2.0
1.5
1.0
0.5
0
f
= 700kHz
SYNC
25°C
–55°C
SHUTDOWN THRESHOLD
SHUTDOWN DELAY
200
125°C
100
0
6
–100
–200
–300
4
2
0
75 100
–0.3
–0.2
–0.1
V
0.1
–50 –25
0
25 50
125 150
–50
50
100 125
150
–25
0
25
75
REF
TEMPERATURE (°C)
FEEDBACK PIN VOLTAGE (V)
TEMPERATURE (°C)
LT1371 • G05
LT1371 • G06
LT1371 • G04
Error Amplifier Transconductance
vs Temperature
S/S or SHDN Pin Input Current
vs Voltage
Switching Frequency
vs Feedback Pin Voltage
2000
1800
1600
1400
1200
1000
800
5
4
110
100
90
80
70
60
50
40
30
20
10
V
IN
= 5V
∆I (V )
∆V (FB)
C
g
=
m
3
2
1
0
–1
–2
–3
–4
–5
600
400
200
0
125
150
–1
0
1
2
3
4
5
6
7
8
9
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
FEEDBACK PIN VOLTAGE (V)
–50 –25
25 50
100
0
75
TEMPERATURE (°C)
VOLTAGE (V)
LT1371 • G07
LT1371 • G08
LT1371 • G09
4
LT1371
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TYPICAL PERFORMANCE CHARACTERISTICS
VC Pin Threshold and High
Clamp Voltage vs Temperature
Feedback Input Current
vs Temperature
Negative Feedback Input Current
vs Temperature
0
–10
–20
–30
–40
–50
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
800
700
600
500
400
300
200
100
0
V
=V
REF
V
=V
NFR
FB
NFB
V
HIGH CLAMP
C
V
THRESHOLD
C
125
150
–50
50
100 125
150
–50 –25
0
25
50 75
100 125 150
–50 –25
0
25 50 75 100
TEMPERATURE (°C)
–25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
LT1371 • G12
LT1371 • G10
LT1371 • G11
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PIN FUNCTIONS
VC: The Compensation pin is used for frequency compen-
sation, current limiting and soft start. It is the output of the
error amplifier and the input of the current comparator.
Loop frequency compensation can be performed with an
RC network connected from the VC pin to ground.
leave it floating. To synchronize switching, drive the S/S
pin between 600kHz and 800kHz.
SHDN: (SW Package Only): The Shutdown pin is active
low and the shutdown threshold is typically 1.3V. For
normal operation, pull the SHDN pin high, tie it to VIN or
leave it floating.
FB: The Feedback pin is used for positive output voltage
sensing and oscillator frequency shifting. It is the invert-
ing input to the error amplifier. The noninverting input of
thisamplifier is internally tied toa 1.245Vreference. Load
on the FB pin should not exceed 250µA when NFB pin is
used. See Applications Information.
SYNC (SW Package Only): To synchronize switching,
drive the SYNC pin between 600kHz and 800kHz. If not
used, the SYNC pin can be tied high, low or left floating.
VIN: Bypass Input Supply pin with a low ESR capacitor,
10µF or more. The regulator goes into undervoltage lock-
out when VIN drops below 2.5V. Undervoltage lockout
stops switching and pulls the VC pin low.
NFB: The Negative Feedback pin is used for negative
output voltage sensing. It is connected to the inverting
input of the negative feedback amplifier through a 100k
source resistor.
VSW: The Switch pin is the collector of the power switch
and has large currents flowing through it. Keep the traces
to the switching components as short as possible to
minimize radiation and voltage spikes.
S/S (R and T7 Packages Only): Shutdown and Synchroni-
zation Pin. The S/S pin is logic level compatible. Shutdown
is active low and the shutdown threshold is typically 1.3V.
For normal operation, pull the S/S pin high, tie it to VIN or
GND: Tie all Ground pins to a good quality ground plane.
5
LT1371
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BLOCK DIAGRAM
V
SW
IN
SHUTDOWN
DELAY AND RESET
LOW DROPOUT
2.3V REG
SHDN
S/S*
ANTI-SAT
SYNC
LOGIC
DRIVER
SWITCH
SYNC
NFBA
OSC
5:1 FREQUENCY
SHIFT
+
100k
50k
NFB
FB
–
COMP
–
+
+
–
EA
IA
0.04Ω
A
V
≈ 6
V
C
1.245V
REF
GND LT1371 • BD
GND SENSE
*R AND T7 PACKAGES ONLY
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OPERATION
The LT1371 is a current mode switcher. This means that
switch duty cycle is directly controlled by switch current
rather than by output voltage. Referring to the block
diagram, the switch is turned ON at the start of each
oscillator cycle. It is turned OFF when switch current
reachesapredeterminedlevel. Controlofoutputvoltageis
obtained by using the output of a voltage sensing error
amplifier to set current trip level. This technique has
several advantages. First, it has immediate response to
input voltage variations, unlike voltage mode switchers
which have notoriously poor line transient response.
Second, it reduces the 90° phase shift at mid-frequencies
in the energy storage inductor. This greatly simplifies
closed-loop frequency compensation under widely vary-
ing input voltage or output load conditions. Finally, it
allows simple pulse-by-pulse current limiting to provide
maximum switch protection under output overload or
short conditions. A low dropout internal regulator pro-
vides a 2.3V supply for all internal circuitry. This low
dropout design allows input voltage to vary from 2.7V to
25V with virtually no change in device performance. A
500kHz oscillator is the basic clock for all internal timing.
It turns ON the output switch via the logic and driver
circuitry. Special adaptive anti-sat circuitry detects onset
of saturation in the power switch and adjusts driver
current instantaneously to limit switch saturation. This
minimizes driver dissipation and provides very rapid turn-
off of the switch.
A 1.245V bandgap reference biases the positive input of
the error amplifier. The negative input of the amplifier is
broughtoutforpositiveoutputvoltagesensing.Theerror
amplifier has nonlinear transconductance to reduce out-
put overshoot on start-up or overload recovery. When
the feedback voltage exceeds the reference by 40mV,
error amplifier transconductance increases 10 times,
whichreducesoutputovershoot.Thefeedbackinputalso
invokes oscillator frequency shifting, which helps pro-
tect components during overload conditions. When the
feedback voltage drops below 0.6V, the oscillator fre-
quencyisreduced5:1.Lowerswitchingfrequencyallows
full control of switch current limit by reducing minimum
switch duty cycle.
6
LT1371
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APPLICATIO S I FOR ATIO
Unique error amplifier circuitry allows the LT1371 to
directly regulate negative output voltages. The negative
feedback amplifier’s 100k source resistor is brought out
fornegativeoutputvoltagesensing. TheNFBpinregulates
at –2.49V while the amplifier output internally drives the
FB pin to 1.245V. This architecture, which uses the same
main error amplifier, prevents duplicating functions and
maintains ease of use. Consult LTC Marketing for units
that can regulate down to –1.25V.
functions. Itisusedforfrequencycompensation, current
limit adjustment and soft starting. During normal regula-
tor operation this pin sits at a voltage between 1V (low
outputcurrent)and 1.9V(highoutputcurrent). Theerror
amplifierisacurrentoutput(gm)type, sothisvoltagecan
be externally clamped for lowering current limit. Like-
wise, acapacitorcoupledexternalclampwillprovidesoft
start. Switch duty cycle goes to zero if the VC pin is pulled
below the control pin threshold, placing the LT1371 in an
idle mode.
The error signal developed at the amplifier output is
brought out externally. This pin (VC) has three different
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APPLICATIO S I FOR ATIO
V
OUT
Positive Output Voltage Setting
R1
R2
R1
V
= V
REF
1 +
OUT
The LT1371 develops a 1.245V reference (VREF) from the
FB pin to ground. Output voltage is set by connecting the
FB pin to an output resistor divider (Figure 1). The FB pin
bias current represents a small error and can usually be
ignoredforvaluesofR2upto7k. Thesuggestedvaluefor
R2 is 6.19k. The NFB pin is normally left open for positive
output applications. Positive fixed voltage versions are
available (consult LTC Marketing).
(
)
FB
PIN
V
OUT
R1 = R2
– 1
(
)
1.245
R2
V
REF
LT1371 • F01
Figure 1. Positive Output Resistor Divider
–V
OUT
R1
R2
–V
= V
1 +
+ I
(R1)
NFB
OUT
NFB
(
)
R1
I
NFB
Negative Output Voltage Setting
NFB
PIN
V
– 2.49
OUT
The LT1371 develops a –2.49V reference (VNFR) from the
NFBpintoground.Outputvoltageissetbyconnectingthe
NFB pin to an output resistor divider (Figure 2). The
–30µA NFB pin bias current (INFB) can cause output
voltage errors and should not be ignored. This has been
accounted for in the formula in Figure 2. The suggested
value for R2 is 2.49k. The FB pin is normally left open for
negative output applications. See Dual Polarity Output
Voltage Sensing for limitations on FB pin loading when
using the NFB pin.
R1 =
R2
+
30 • 10–
2.49
R2
6
V
(
)
(
)
NFR
LT1371 • F02
Figure 2. Negative Output Resistor Divider
the LT1371 acts to prevent either output from going
beyond its set output voltage. For example, in this applica-
tion if the positive output were more heavily loaded than
the negative, the negative output would be greater and
would regulate at the desired set-point voltage. The posi-
tive output would sag slightly below its set-point voltage.
This technique prevents either output from going unregu-
lated high at no load. Please note that the load on the FB
pin should not exceed 250µA when the NFB pin is used.
This situation occurs when the resistor dividers are used
at both FB and NFB. True load on FB is not the full divider
current unless the positive output is shorted to ground.
See Dual Output Flyback Converter application.
Dual Polarity Output Voltage Sensing
Certain applications benefit from sensing both positive
and negative output voltages. One example is the “Dual
Output Flyback Converter with Overvoltage Protection”
circuit shown in the Typical Applications section. Each
output voltage resistor divider is individually set as de-
scribed above. When both the FB and NFB pins are used,
7
LT1371
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APPLICATIO S I FOR ATIO
Shutdown and Synchronization
Total power dissipation of the die is the sum of supply
current times supply voltage, plus switch power:
The 7-pin R and T7 package devices have a dual function
S/S pin which is used for both shutdown and synchroni-
zation. The SW package device has both a Shutdown
(SHDN) pin and a Synchronization (SYNC) pin which can
be used separately or tied together. These pins are logic
level compatible and can be pulled high, tied to VIN or left
floating for normal operation. A logic low on the S/S pin or
SHDN pin activates shutdown, reducing the part’s supply
current to 12µA. Typical synchronization range is from
1.05 to 1.8 times the part’s natural switching frequency,
but is only guaranteed between 600kHz and 800kHz. A
12µs resetable shutdown delay network guarantees the
part will not go into shutdown while receiving a synchro-
nization signal when the functions are combined.
P
D(TOTAL) = (IIN)(VIN) + PSW
Surface mount heat sinks are also becoming available
which can lower package thermal resistance by 2 or 3
times. One manufacturer is Wakefield Engineering who
offers surface mount heat sinks for both the R package
(DD)andSWpackage(SW20)andcanbereachedat(617)
245-5900.
Choosing the Inductor
For most applications the inductor will fall in the range of
2.2µH to 22µH. Lower values are chosen to reduce physi-
cal size of the inductor. Higher values allow more output
current because they reduce peak current seen by the
power switch, which has a 3A limit. Higher values also
reduce input ripple voltage and reduce core loss.
Cautionshouldbeusedwhensynchronizingabove700kHz
because at higher sync frequencies the amplitude of the
internal slope compensation used to prevent subharmonic
switching is reduced. This type of subharmonic switching
onlyoccurswhenthedutycycleoftheswitchisabove50%.
Higher inductor values will tend to eliminate problems.
When choosing an inductor you might have to consider
maximum load current, core and copper losses, allowable
component height, output voltage ripple, EMI, fault
current in the inductor, saturation and, of course, cost.
Thefollowingprocedureissuggestedasawayofhandling
thesesomewhatcomplicatedandconflictingrequirements.
Thermal Considerations
Care should be taken to ensure that the worst-case input
voltage and load current conditions do not cause exces-
sive die temperatures. Typical thermal resistance is
30°C/W for the R package and 50°C/W for the SW and T7
packages but these numbers will vary depending on the
mounting techniques (copper area, air flow, etc.). Heat is
transferred from the R and T7 packages via the tab and
from the SW package via pins 4 to 7 and 14 to 17.
1. Assume that the average inductor current for a boost
converter is equal to load current times VOUT/VIN and
decide whether or not the inductor must withstand
continuous overload conditions. If average inductor
current at maximum load current is 1A, for instance, a
1A inductor may not survive a continuous 3A overload
condition. Also be aware that boost converters are not
short-circuit protected and that, under output short
conditions, inductor current is limited only by the
available current of the input supply.
Average supply current (including driver current) is:
IIN = 4mA + DC [ISW/60 + ISW (0.004)]
ISW = switch current
2. Calculate peak inductor current at full load current to
ensure that the inductor will not saturate. Peak current
can be significantly higher than output current, espe-
ciallywithsmallerinductorsandlighterloads, sodon’t
omit this step. Powdered iron cores are forgiving
because they saturate softly, whereas ferrite cores
DC = switch duty cycle
Switch power dissipation is given by:
PSW = (ISW)2 (RSW)(DC)
RSW = output switch ON resistance
8
LT1371
U U
W
U
APPLICATIO S I FOR ATIO
saturate abruptly and other core materials fall in be- physically smaller capacitors have high ESR. The ESR
tween. The following formula assumes continuous range needed for typical LT1371 applications is 0.025Ω
modeoperationbutiterrsonlyslightlyonthehighside to 0.2Ω. A typical output capacitor is an AVX type TPS,
for discontinuous mode, so it can be used for all
conditions.
22µF at 25V (2 each), with a guaranteed ESR less than
0.2Ω. This is a “D” size surface mount solid tantalum
capacitor. TPS capacitors are specially constructed and
testedforlowESR,sotheygivethelowestESRforagiven
volume. To further reduce ESR, multiple output capaci-
tors can be used in parallel. The value in microfarads is
not particularly critical, and values from 22µF to greater
than 500µF work well, but you cannot cheat mother
nature on ESR. If you find a tiny 22µF solid tantalum
capacitor, it will have high ESR and output ripple voltage
willbeterrible.Table1showssometypicalsolidtantalum
surface mount capacitors.
V
V
V (V
2(f)(L)(V
– V )
OUT
IN OUT IN
I
= (I
)
OUT
+
PEAK
)
)
)
IN
OUT
V = Minimum Input Voltage
f = 500kHz Switching Frequency
IN
3. Decide if the design can tolerate an “open” core geom-
etry, like a rod or barrel, which has high magnetic field
radiation, or whether it needs a closed core, like a
toroid,topreventEMIproblems.Onewouldnotwantan
open core next to a magnetic storage media, for in-
stance! This is a tough decision because the rods or
barrels are temptingly cheap and small and there are no
helpful guidelines to calculate when the magnetic field
radiation will be a problem.
Table 1. Surface Mount Solid Tantalum Capacitor
ESR and Ripple Current
E CASE SIZE
ESR (MAX Ω)
RIPPLE CURRENT (A)
AVX TPS, Sprague 593D
AVX TAJ
0.1 to 0.3
0.7 to 0.9
0.7 to 1.1
0.4
D CASE SIZE
4. Start shopping for an inductor which meets the re-
quirements of core shape, peak current (to avoid
saturation), averagecurrent(tolimitheating)andfault
current.Iftheinductorgetstoohot,wireinsulationwill
melt and cause turn-to-turn shorts. Keep in mind that
allgoodthingslikehighefficiency,lowprofileandhigh
temperature operation will increase cost, sometimes
dramatically.
AVX TPS, Sprague 593D
AVX TAJ
0.1 to 0.3
0.9 to 2.0
0.7 to 1.1
0.36 to 0.24
C CASE SIZE
AVX TPS
AVX TAJ
0.2 (Typ)
1.8 to 3.0
0.5 (Typ)
0.22 to 0.17
B CASE SIZE
AVX TAJ
2.5 to 10
0.16 to 0.08
Many engineers have heard that solid tantalum capacitors
are prone to failure if they undergo high surge currents.
This is historically true and AVX type TPS capacitors are
speciallytestedforsurgecapability,butsurgeruggedness
is not a critical issue with the output capacitor. Solid
tantalum capacitors fail during very high turn-on surges,
which do not occur at the output of regulators. High
discharge surges, such as when the regulator output is
dead-shorted, do not harm the capacitors.
5. After making an initial choice, consider the secondary
things like output voltage ripple, second sourcing, etc.
Use the experts in the LTC Applications Department if
you feel uncertain about the final choice. They have
experience with a wide range of inductor types and can
tell you about the latest developments in low profile,
surface mounting, etc.
Output Capacitor
Single inductor boost regulators have large RMS ripple
current in the output capacitor, which must be rated to
handle the current. The formula to calculate this is:
The output capacitor is normally chosen by its effective
series resistance (ESR), because this is what determines
output ripple voltage. At 500kHz any polarized capacitor
is essentially resistive. To get low ESR takes volume, so
9
LT1371
U U
W
U
APPLICATIO S I FOR ATIO
Output Capacitor Ripple Current (RMS)
generatesaloop“zero”at5kHzto50kHzthatisinstrumen-
tal in giving acceptable loop phase margin. Ceramic ca-
pacitors remain capacitive to beyond 300kHz and usually
resonate with their ESL before ESR becomes effective.
They are appropriate for input bypassing because of their
highripplecurrentratingsandtoleranceofturn-onsurges.
DC
I
(RMS) = I
= I
1 – DC
RIPPLE
OUT
V
OUT
– V
IN
OUT
V
IN
DC = Switch Duty Cycle
Output Diode
The suggested output diode (D1) is a 1N5821 Schottky or
its Motorola equivalent MBR330. It is rated at 3A average
forward current and 30V reverse voltage. Typical forward
voltage is 0.6V at 3A. The diode conducts current only
during switch OFF time. Peak reverse voltage for boost
converters is equal to regulator output voltage. Average
forward current in normal operation is equal to output
current.
Input Capacitors
The input capacitor of a boost converter is less critical due
tothefactthattheinputcurrentwaveformistriangularand
does not contain large squarewave currents as is found in
the output capacitor. Capacitors in the range of 10µF to
100µF, with an ESR of 0.2Ωor less, work well up to full 3A
switch current. Higher ESR capacitors may be acceptable
at low switch currents. Input capacitor ripple current for a
boost converter is :
Frequency Compensation
Loop frequency compensation is performed on the output
of the error amplifier (VC pin) with a series RC network.
The main pole is formed by the series capacitor and the
output impedance (≈500kΩ) of the error amplifier. The
pole falls in the range of 2Hz to 20Hz. The series resistor
creates a “zero” at 1kHz to 5kHz, which improves loop
stability and transient response. A second capacitor, typi-
cally one-tenth the size of the main compensation capaci-
tor, is sometimes used to reduce the switching frequency
ripple on the VC pin. VC pin ripple is caused by output
voltage ripple attenuated by the output divider and multi-
plied by the error amplifier. Without the second capacitor,
VC pin ripple is:
0.3(V )(V
– V )
IN
IN OUT
I
=
RIPPLE
(f)(L)(V
)
OUT
f = 500kHz Switching Frequency
Theinputcapacitorcanseeaveryhighsurgecurrentwhen
a battery or high capacitance source is connected “live”
andsolidtantalumcapacitorscanfailunderthiscondition.
Several manufacturers have developed tantalum capaci-
tors specially tested for surge capability (AVX TPS series,
for instance) but even these units may fail if the input
voltage approaches the maximum voltage rating of the
capacitor during a high surge. AVX recommends derating
capacitor voltage by 2:1 for high surge applications.
Ceramic, OS-CON and aluminum electrolytic capacitors
may also be used and have a high tolerance to turn-on
surges.
1.245(V
)(g )(R )
m C
RIPPLE
(V
V Pin Ripple =
C
)
OUT
V
m
= Output ripple (V
)
P–P
RIPPLE
Ceramic Capacitors
g = Error amplifier transconductance
≈(1500µmho)
Higher value, lower cost ceramic capacitors are now
becomingavailableinsmallercasesizes.Thesearetempt-
ing for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor ESR
R = Series resistor on V pin
V
C
OUT
C
= DC output voltage
To prevent irregular switching, VC pin ripple should be
kept below 50mVP–P. Worst-case VC pin ripple occurs at
10
LT1371
U U
W
U
APPLICATIO S I FOR ATIO
maximum output load current and will also be increased if
poor quality (high ESR) output capacitors are used. The
addition of a 0.0047µF capacitor on the VC pin reduces
switching frequency ripple to only a few millivolts. A low
value for RC will also reduce VC pin ripple, but loop phase
margin may be inadequate.
FB GND S/S
NFB V
IN
Layout Considerations
V
C
V
SW
C
C
CONNECT
GROUND PIN
Formaximumefficiency, LT1371switchriseandfalltimes
are made as short as possible. To prevent radiation and
high frequency resonance problems, proper layout of the
components connected to the switch node is essential. B
field (magnetic) radiation is minimized by keeping output
diode, Switch pin and output bypass capacitor leads as
short as possible. Figures 3, 4 and 5 show recommended
positions for these components. E field radiation is kept
low by minimizing the length and area of all traces con-
nected to the Switch pin. A ground plane should always be
used under the switcher circuitry to prevent interplane
coupling.
AND TAB DIRECTLY
TO GROUND PLANE.
TAB MAY BE
KEEP PATH FROM
, OUTPUT DIODE,
D
SOLDERED OR
V
SW
BOLTED TO
OUTPUT CAPACITORS
AND GROUND RETURN
AS SHORT AS POSSIBLE
GROUND PLANE*
*SEE T7 PACKAGE LAYOUT CONSIDERATIONS FOR VERTICAL MOUNTING
OF THE T7 PACKAGE
LT1371 • F04
Figure 4. Layout Considerations—T7 Package
V
V
V
C
SW
Thehighspeedswitchingcurrentpathisshownschemati-
cally in Figure 6. Minimum lead length in this path is
essential to ensure clean switching and low EMI. The path
including the switch, output diode and output capacitor is
the only one containing nanosecond rise and fall times.
Keep this path as short as possible.
D
FB
NC
NFB
SW
KEEP PATH FROM
, OUTPUT DIODE,
V
SW
GND
GND
GND
GND
SHDN
SYNC
GND
GND
GND
GND
NC
OUTPUT CAPACITORS
AND GROUND RETURN
AS SHORT AS POSSIBLE
C
C
NC
V
GND
IN
LT1371 • F05
CONNECT ALL GROUND PINS TO GROUND PLANE
FB GND S/S
V
NFB
V
V
IN
C
SW
Figure 5. Layout Considerations—SW Package
C
C
CONNECT
GROUND PIN
AND TAB DIRECTLY
TO GROUND PLANE
SWITCH
L1
NODE
V
OUT
KEEP PATH FROM
SW
D
V
, OUTPUT DIODE,
OUTPUT CAPACITORS
AND GROUND RETURN
AS SHORT AS POSSIBLE
LT1371 • F03
HIGH
FREQUENCY
V
LOAD
IN
CIRCULATING
PATH
Figure 3. Layout Considerations—R Package
LT1371 • F06
Figure 6
11
LT1371
U U
W
U
APPLICATIO S I FOR ATIO
V
V
IN
T7 Package Layout Considerations
V
OUT
7
Electrical connection to the tab of a T7 package is required
for proper device operation. If the tab is tied directly to the
ground plane (Figure 4) no other considerations are nec-
essary. If the tab is not connected directly to the ground
plane, as in a vertically mounted application, a separate
electrical connection from the tab to a “floating node” is
required. Ground returns for the VIN capacitor, VC compo-
nents and output feedback resistor divider are then con-
nected to the floating node. This is shown schematically in
Figure7. Allothersystemgroundconnectionsaremadeto
Pin 4.
IN
5
2
V
SW
FB
LT1371T7
1
V
C
GND
TAB
GND
4
LT1371 • F07
FLOATING NODE
(TAB TIES INTERNALLY
TO PIN 4 GROUND)
SYSTEM GROUND
Figure 7. Tab Connections for Vertically Mounted T7 Package
The electrical connection from the T7 package tab to the
floating node must be a low resistance (<0.1Ω), low
inductance(<20nH)pathwhichcanbeaccomplishedwith
a jumper wire or an electrically conductive heat sink.
or soldered directly to the heat sink to maintain low
resistance.Heatsinksareavailableinclip-onstylesbutare
only recommended if the tab to heat sink contact resis-
tance can be maintained below 0.1Ω for the life of the
product.
Bolt the jumper wire directly to the tab using a solder tail
to maintain low resistance. The jumper wire length should
not exceed 3/4 inch of 24 AWG gauge wire or larger to
minimize the inductance.
More Help
For more detailed information on switching regulator
circuits, please see Application Note 19. Linear Technol-
ogy also offers a computer software program,
SwitcherCAD, toassistindesigningswitchingconverters.
In addition, our Applications Department is always ready
to lend a helping hand.
Vertically mounted electrically conductive heat sinks are
available from many heat sink manufacturers. These heat
sinks also have tabs that solder directly to the board
creating the required low resistance, low inductance path
from the tab to the floating node. The tab should be bolted
12
LT1371
U
TYPICAL APPLICATIONS N
Positive-to-Negative Converter with Direct Feedback
Dual Output Flyback Converter with Overvoltage Protection
V
R2
6.19k
1%
R1
68.1k
1%
IN
2.7V TO 13V
T1*
+
2
4
3
C1
D2
•
+
C4
V
IN
2.7V TO 10V
100µF
P6KE-15A
D3
MBRS360T3
T1*
100µF
× 2
V
OUT
15V
•
V
IN
1N4148
†
1
+
2, 3
7
–V
ON
OUT
C1
22µF
V
+
S/S
SW
•
OFF
P6KE-20A
C4
–5V
R2
2.49k
1%
D1
47µF
LT1371
MBRS330T3
4
10
1N4148
•
•
FB
S/S
V
IN
V
NFB
8, 9
ON
R3
2.49k
1%
+
SW
OFF
C5
47µF
V
GND
C
LT1371
C2
1
–V
OUT
–15V
NFB
C2
R4
12.1k
1%
*COILTRONICS CTX10-4
†
0.047µF
R1
2k
MBRS360T3
V
GND
C
MAX I
OUT
C3
0.0047µF
I
V
IN
OUT
R5
2.49k
1%
LT1371 • TA03
0.6A 3V
1.0A 5V
1.5A 9V
0.047µF
R3
2k
C3
0.0047µF
*DALE LPE-5047-100MB
LT1371 • TA04
Single Li-Ion Cell to 5V
2 Li-Ion Cells to 5V SEPIC Converter**
D1
V
IN
MBRS320T3
L1*
4V TO 9V
†
V
OUT
5V
L1A*
R1
18.7k
1%
V
IN
10µH
ON
MBRS330T3
V
V
S/S
SW
IN
OFF
†
•
V
OUT
5V
ON
V
V
S/S
SW
OFF
LT1371
R2
18.7k
1%
C4**
100µF
10V
SINGLE
Li-Ion
CELL
+
+
+
C2
C1**
100µF
LT1371
FB
C
4.7µF
FB
C
+
C1
GND
V
10V
•
× 2
33µF
C3
R2
6.19k
1%
GND
+
20V
100µF
10V
L1B*
10µH
C2
0.047µF
R3
2k
× 2
R3
6.19k
1%
C3
0.0047µF
R1
2k
C4
0.047µF
C5
0.0047µF
LT1371 • TA06
†
LT1371 • TA05
*COILCRAFT DO3316P-103
**
MAX I
OUT
AVX TPSD107M010R0100
I
V
IN
†
OUT
MAX I
C1 = AVX TPSD 336M020R0200
C2 = TOKIN 1E475ZY5U-C304
C3 = AVX TPSD107M010R0100
OUT
1.2A 2.7V
1.6A 3.3V
1.8A 3.6V
I
V
IN
OUT
0.85A 4V
1A 5V
1.3A 7V
1.5A 9V
*
SINGLE INDUCTOR WITH TWO WINDINGS
COILTRONICS CTX10-4
**
INPUT VOLTAGE MAY BE GREATER OR
LESS THAN OUTPUT VOLTAGE
13
LT1371
TYPICAL APPLICATIONS N
U
20W CCFL Supply
47pF
LAMP
1N4148
11
8
L1
3
1
5
4
2
0.47µF
+
22µF
Q1
Q2
INTENSITY
CONTROL
1N4148
150Ω
L2
15µH
MUR405
1N4148
22k
V
IN
V
SW
10k
9V
TO
V
FB
L1
L2
Q1, Q2
0.4µ7F
=
=
=
COILTRONICS CTX02-11128
COILCRAFT DO3316P-153
ZETEX ZTX849, ZDT1048 OR ROHM 2SC5001
WIMA 3X 0.µ1F5 TYPE MKP-20
IN
15V
+
LT1371
1µF
140Ω
2.2µF
=
V
GND
C
COILTRONICS (407) 241-7876
LT1371 • TA07
+
2.2µF
Laser Power Supply
1800pF
10kV
0.01µF
5kV
47k
5W
1800pF
10kV
8
11
HV DIODES
L1
3
1
5
4
LASER
2
0.47µF
+
2.2µF
Q1
Q2
150Ω
L2
82µH
MUR405
V
10k
10k
SW
V
IN
V
FB
IN
V
1N4002
(ALL)
190Ω
1%
12V TO 25V
+
LT1371
V
L1 =
L2 =
Q1, Q2 =
COILTRONICS CTX02-11128
GOWANDA GA40-822K
ZETEX ZTX849
0.1µF
IN
2.2µF
GND
C
0.47µF =
HV DIODES =
LASER =
WIMA 3X 0.15µF TYPE MKP-20
SEMTECH-FM-50
HUGHES 3121H-P
+
10µF
LT1371 • TA08
COILTRONICS (407) 241-7876
14
LT1371
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
R Package
7-Lead Plastic DD Pak
(LTC DWG # 05-08-1462)
0.060
(1.524)
TYP
0.390 – 0.415
(9.906 – 10.541)
0.060
(1.524)
0.165 – 0.180
(4.191 – 4.572)
0.256
(6.502)
0.045 – 0.055
(1.143 – 1.397)
15° TYP
+0.008
0.004
–0.004
0.060
(1.524)
0.059
(1.499)
TYP
0.183
(4.648)
0.330 – 0.370
(8.382 – 9.398)
+0.203
–0.102
0.102
(
)
0.095 – 0.115
(2.413 – 2.921)
0.075
(1.905)
0.040 – 0.060
(1.016 – 1.524)
0.026 – 0.036
(0.660 – 0.914)
0.050 ± 0.012
(1.270 ± 0.305)
0.300
(7.620)
0.013 – 0.023
(0.330 – 0.584)
+0.012
0.143
–0.020
+0.305
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAK SINK
3.632
(
)
–0.508
R (DD7) 0695
SW Package
20-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
0.496 – 0.512*
(12.598 – 13.005)
19 18
16 14 13 12 11
20
17
15
0.394 – 0.419
(10.007 – 10.643)
NOTE 1
0.291 – 0.299**
(7.391 – 7.595)
2
3
5
7
8
9
10
1
4
6
0.037 – 0.045
(0.940 – 1.143)
0.093 – 0.104
(2.362 – 2.642)
0.010 – 0.029
(0.254 – 0.737)
× 45°
0° – 8° TYP
0.050
(1.270)
TYP
0.004 – 0.012
0.009 – 0.013
(0.102 – 0.305)
NOTE 1
(0.229 – 0.330)
0.014 – 0.019
0.016 – 0.050
(0.406 – 1.270)
S20 (WIDE) 0695
(0.356 – 0.482)
TYP
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LT1371
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
T7 Package
7-Lead Plastic TO-220 (Standard)
(LTC DWG # 05-08-1422)
0.165 – 0.180
(4.293 – 4.572)
0.147 – 0.155
(3.734 – 3.937)
DIA
0.390 – 0.415
(9.906 – 10.541)
0.045 – 0.055
(1.143 – 1.397)
0.230 – 0.270
(5.842 – 6.858)
0.570 – 0.620
(14.478 – 15.748)
0.620
(15.75)
TYP
0.460 – 0.500
(11.684 – 12.700)
0.330 – 0.370
(8.382 – 9.398)
0.700 – 0.728
(17.780 – 18.491)
0.095 – 0.115
(2.413 – 2.921)
0.152 – 0.202
(3.860 – 5.130)
0.260 – 0.320
(6.604 – 8.128)
0.013 – 0.023
(0.330 – 0.584)
0.040 – 0.060
(1.016 – 1.524)
0.026 – 0.036
(0.660 – 0.914)
0.135 – 0.165
(3.429 – 4.191)
0.155 – 0.195
(3.937 – 4.953)
T7 (TO-220) (FORMED) 0695
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
Good for Up to V = 40V
LT1171
100kHz 2.5A Boost Switching Regulator
12V 1.2A Monolithic Buck Converter
Micropower 2A Boost Converter
IN
LTC®1265
LT1302
Converts 5V to 3.3V at 1A with 90% Efficiency
Converts 2V to 5V at 600mA in SO-8 Packages
Also Regulates Negative Flyback Outputs
LT1372
500kHz 1.5A Boost Switching Regulator
LT1373
Low Supply Current 250kHz 1.5A Boost Switching Regulator
500kHz 1.5A Buck Switching Regulator
500kHz 1.5A SEPIC Battery Charger
90% Efficient Boost Converter with Constant Frequency
Steps Down from Up to 25V Using 4.7µH Inductors
Input Voltage May Be Greater or Less Than Battery Voltage
Input Voltage May Be Greater or Less Than Battery Voltage
LT1376
LT1512
LT1513
500kHz 3A SEPIC Battery Charger
LT/GP 0996 5K REV A • PRINTED IN THE USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1995
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