LTC3035EDDB#TR [Linear]
LTC3035 - 300mA VLDO Linear Regulator with Charge Pump Bias Generator; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C;
| 型号： | LTC3035EDDB#TR |
| 厂家： | 
Linear |
| 描述： | LTC3035 - 300mA VLDO Linear Regulator with Charge Pump Bias Generator; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C 光电二极管 输出元件 调节器 |
| 文件： | 总12页 (文件大小：198K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3035
300mA VLDO Linear
Regulator with Charge Pump
Bias Generator
U
DESCRIPTIO
FEATURES
The LTC®3035 is a micropower, VLDO™ (very low drop-
out)linearregulatorwhichoperatesfrominputvoltagesas
low as 1.7V. The device is capable of supplying 300mA of
output current with a typical dropout voltage of only
45mV.ToallowoperationatlowinputvoltagestheLTC3035
includes a charge pump generator that provides the nec-
essary bias voltage for the internal LDO circuitry. Output
current comes directly from the input supply for high
efficiency regulation. The charge pump bias generator
requires only a 0.1µF flying capacitor and a 1µF bypass
capacitor for operation. The low 0.4V internal reference
voltage allows the LTC3035 to be programmed to much
lower output voltages than commonly available in LDOs.
The output voltage is programmed via two tiny SMD
resistors. The LTC3035’s low quiescent current makes it
an ideal choice for use in battery-powered systems.
■
Wide Input Voltage Range: 1.7V to 5.5V
■
Wide Adjustable Output Voltage Range:
0.4V to 3.6V
■
Built-In Charge Pump Generates High Side Bias
■
Very Low Dropout: 45mV at 300mA
■
±
2% Voltage Accuracy Over Temperature,
Supply, Load
■
■
■
■
■
■
■
■
Fast Transient Recovery
Low Operating Current: IIN = 100µA Typ
Low Shutdown Current: IIN = 1µA Typ
Stable with Ceramic Capacitor Down to 1µF
Output Current Limit
Thermal Overload Protected
Reverse Output Current Protected
Available in 8-Lead (3mm × 2mm) DFN Package
U
APPLICATIO S
Other features include high output voltage accuracy, ex-
cellent transient response, stability with ultralow ESR
ceramic capacitors as small as 1µF, short-circuit and
thermal overload protection, output current limiting and
reverse output current protection. The LTC3035 is avail-
able in a tiny, low profile (3mm × 2mm × 0.75mm) 8-lead
DFN package.
■
Li-Ion to 3.3V Low Dropout Supplies
■
2 × AA to 1.8V Low Dropout Supplies
■
Low Power Handheld Devices
■
Low Voltage Logic Supplies
■
DSP Power Supplies
Cellular Phones
■
■
Portable Electronic Equipment
Handheld Medical Instruments
, LTC and LT are registered trademarks of Linear Technology Corporation.
VLDO is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 6411531, others pending.
■
■
Post Regulator for Switching Supply Noise Rejection
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TYPICAL APPLICATIO
Dropout Voltage vs Load Current
70
3.3V Output Voltage from Li-Ion Battery
T
A
= 25°C
0.1µF
60
50
40
30
20
10
0
CM
CP
BIAS
BIAS
GENERATOR
C
1µF
BIAS
IN
Li-Ion
BATTERY
+
–
0.4V
1µF
V
3.3V
OUT 300mA
OUT
3.4V TO 4.2V
OUT
ADJ
C
1µF
294k
LTC3035
GND
SHDN
OFF ON
40.2k
0
50
100
150
(mA)
OUT
200
250
300
3035 TA01b
I
3035 TA01a
3035f
1
LTC3035
W W U W
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W
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ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Notes 1, 2)
TOP VIEW
VIN to GND.................................................. –0.3V to 6V
SHDN to GND ............................................. –0.3V to 6V
CP, CM, BIAS to GND ................................. –0.3V to 6V
ADJ to GND ................................................ –0.3V to 6V
CP
CM
1
2
3
4
8
7
6
5
BIAS
SHDN
ADJ
9
GND
IN
OUT
V
OUT to GND ............................................... –0.3V to 6V
Operating Junction Temperature
DDB PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
TJMAX = 125°C, θJA = 76°C/W
(Note 3) ........................................... –40°C to 125°C
Storage Temperature Range ................ –65°C to 125°C
Output Short Circuit Duration .......................... Indefinite
EXPOSED PAD (PIN 9) IS GND,MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LTC3035EDDB
DDB PART MARKING
LBRM
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
capacitors ceramic) unless otherwise noted.
The
●
denotes specifications which apply over the full specified temperature
range, otherwise specifications are at T = 25
°
C. V = 3.6V, V
= 3.3V, C
= 0.1
µF, C
= 1
µ
F, C = 1
µF, C
= 1µF (all
BIAS
A
IN
OUT
FLY
OUT
IN
PARAMETER
CONDITIONS
MIN
1.7
TYP
MAX
UNITS
V
V
Operating Voltage (Note 4)
●
5.5
V
IN
Output Voltage Range
2.63V < V < 5.5V
●
●
4.8
1.85 • V
5
5.3
1.95 • V
IN
V
V
BIAS
IN
1.7V < V < 2.63V
1.90 • V
IN
IN
IN
V
V
V
V
Output Voltage Range
●
●
V
3.6
200
5
V
µA
µA
V
OUT
ADJ
Operating Current
Shutdown Current
I
= 10µA
OUT
100
1
IN
V
= 0V
IN
SHDN
Regulation Voltage (Note 5)
1mA < I
V
V
< 300mA, 1.7V < V < 5.5V,
= 1.5V
= 0.4V
●
●
0.392
–50
0.4
0.408
ADJ
OUT
IN
OUT
I
ADJ Input Current
0
50
nA
mV
mV
mA
mA
µVrms
V
ADJ
ADJ
OUT Load Regulation (Referred to ADJ Pin)
Dropout Voltage (Note 6)
I
= 1mA to 300mA
–0.2
45
OUT
V
= 1.7V, V
= 0.37V, I = 300mA
OUT
●
●
100
IN
ADJ
I
I
Continuous Output Current
Short Circuit Output Current
Output Noise Voltage
300
1.1
OUT
OUT
V
= V
= 0
OUT
760
150
ADJ
V
V
V
F = 10Hz to 100kHz, I
= 150mA
OUT
OUT
SHDN Input High Voltage
SHDN Input Low Voltage
SHDN Input High Current
●
●
IH
0.3
1
V
IL
I
I
SHDN = V
–1
–1
µA
µA
IH
IL
IN
SHDN Input Low Current
SHDN = 0V
1
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: The LTC3035 regulator is tested and specified under pulse load
conditions such that T ≈ T . The LTC3035 is 100% production tested at
J A
25°C. Performance at –40°C and 125°C is assured by design,
characterization and correlation with statistical process control.
Note 4: Min Operating Input Voltage required for regulation is:
V
> V
+ V
and V > 1.7V
DROPOUT IN
IN
OUT
3035f
2
LTC3035
ELECTRICAL CHARACTERISTICS
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must
be limited.
Note 6: Dropout voltage is minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to V – V
.
IN
DROPOUT
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Dropout Voltage vs Load Current
V
Shutdown Current
V No Load Operating Current
IN
IN
115
110
105
100
95
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
70
60
50
40
30
20
10
0
V
= 3.3V
OUT
T
= 125°C
= 85°C
= 25°C
A
T
A
A
T
= 125°C
A
T
= 25°C
T
A
T
A
= 85°C
90
T
A
= 25°C
T
= –40°C
A
T
= –40°C
A
85
T
A
= –40°C
80
0
1
3
4
5
6
3
3.5
4
4.5
5
5.5
6
2
200
300
0
50
100
150
(mA)
250
V
IN
(V)
V
(V)
I
IN
OUT
LT1108 • TPC12
3035 G03
3035 G01
ADJ Voltage vs Temperature
ADJ Voltage vs Input Voltage
V
IN
No Load Operating Current
120
110
100
90
404
403
402
401
400
399
398
397
396
404
403
402
401
400
399
398
397
396
V
= 1.5V
V
= 3.3V
OUT
V
= 1.5V
OUT
OUT
T
= 125°C
A
T
= 85°C
A
T
= 25°C
A
T
= –40°C
80
A
70
60
0
2
3
4
5
6
1
–45 –25 –5 15 35 55 75 95 115
0
1
2
3
6
4
5
V
(V)
TEMPERATURE (°C)
IN
V
(V)
IN
3035 G04
3035 G05
3035 G06
3035f
3
LTC3035
U W
TYPICAL PERFOR A CE CHARACTERISTICS
SHDN Threshold (Rising)
vs Temperature
SHDN Threshold (Falling)
vs Temperature
BIAS Voltage vs Input Voltage
1000
900
800
700
600
500
400
6
5
4
3
2
1
0
1000
900
800
700
600
500
400
V
= 5.5V
IN
V
= 5.5V
IN
V
= 3.6V
IN
V
= 3.6V
IN
V
= 1.7V
IN
V
= 1.7V
IN
0
0.5
2
2.5
V
3
3.5
4 4.5 5 5.5 6
1
1.5
–45
5
30
55
80
–20
105 130
–45
5
30
55
80 105 130
–20
(V)
TEMPERATURE (°C)
IN
TEMPERATURE (°C)
3035 G07
3035 G09
3035 G08
V
IN
Ripple Rejection vs Frequency
Current Limit vs Input Voltage
70
900
800
700
600
500
400
300
200
100
0
V
OUT
= 0V
60
C
= 10µF
50
40
30
20
10
0
OUT
C
= 1µF
OUT
V
= 3.6V
IN
V
= 3.3V
OUT
OUT
I
= 100mA
3
3.5
(V)
1k
10k
100k
10M
1.5
2
2.5
4
4.5
5
5.5
100
1M
V
FREQUENCY (Hz)
IN
3035 G10
3035 G13
Transient Response
BIAS Output Ripple
V
V
OUT
BIAS
20mV/DIV
AC
50mV/DIV
AC
V
OUT
300mA
5mV/DIV
AC
I
OUT
10mA
3035 G11
3035 G12
V
V
C
= 3.6V
200µs/DIV
V
V
C
C
C
= 3.6V
500µs/DIV
IN
IN
= 3.3V
= 3.3V
= 1µF
= 0.1µF
= 1µF
OUT
OUT
OUT
BST
FLY
= 1µF
OUT
OUT
I
= 1mA
3035f
4
LTC3035
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PI FU CTIO S
CP (Pin 1): Flying Capacitor Positive Terminal.
CM (Pin 2): Flying Capacitor Negative Terminal.
GND (Pin 3): Ground. Connect to a ground plane.
ADJ (Pin 6): Adjust Input Pin. This is the input to the error
amplifier.TheADJpinreferencevoltageis0.4Vreferenced
to ground. The output voltage range is 0.4V to 3.6V and is
set by connecting ADJ to a resistor divider from OUT to
GND.
IN (Pin 4): Input Supply Voltage. The output load current
is supplied directly from IN. The IN pin should be locally
bypassed to ground if the LTC3035 is more than a few
inches away from another source of bulk capacitance. In
general, the output impedance of a battery rises with
frequency, so it is usually adviseable to include an input
bypass capacitor when supplying IN from a battery. A
capacitor of 1µF is usually sufficient.
SHDN (Pin 7): Shutdown Input, Active Low. This pin is
used to put the LTC3035 into shutdown. The SHDN pin
current is typically less than 10nA. The SHDN pin cannot
be left floating and must be tied to a valid logic level if
not used.
BIAS (Pin 8): BIAS Output Voltage Pin. BIAS is the output
of the charge pump and provides the high side supply for
the LTC3035 LDO circuitry. This pin should be locally
bypassed to ground by a 1µF or greater capacitor as close
as possible to the pin. Nothing else should be connected
to this pin.
OUT (Pin 5): Regulated Output Voltage. The OUT pin
supplies power to the load. A minimum ceramic output
capacitor of at least 1µF is required to ensure stability.
Larger output capacitors may be required for applications
with large transient loads to limit peak voltage transients.
See the Applications Information section for more infor-
mation on output capacitance.
Exposed Pad (Pin 9): Ground and Heat Sink. Must be
soldered to PCB ground plane or large pad for optimal
thermal performance.
W
BLOCK DIAGRA
BIAS
8
–
800kHz
OSCILLATOR
EN
+
5V
V
MIN
1.9 • V
IN
CHARGE
CP
PUMP
1
V
IN
4
CM
2
SOFT-START
BIAS
REFERENCE
+
–
SHDN
SHDN
0.400V
7
OUT
ADJ
5
6
2.5k
BIAS
UVLO
GND
PINS 3, 9
3035 BD
3035f
5
LTC3035
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(Refer to Block Diagram)
APPLICATIO S I FOR ATIO
TheLTC3035isaVLDO(verylowdropout)linearregulator
which operates from input voltages between 1.7V and
5.5V. The LDO uses an internal NMOS transistor as the
pass device in a source-follower configuration. The inter-
nal charge pump generator provides the high supply
necessary for the LDO circuitry while the output current
comes directly from the IN input for high efficiency
regulation.
5
1.9 • V
IN
3.23
3035 F01
1.7
2.63
5.5
V
(V)
IN
Figure 1. LTC3035 BIAS Voltage vs V Voltage
Charge Pump Operation
IN
The LTC3035 contains a charge pump to produce the
necessary bias voltage supply for the LDO. The charge
pump utilizes Burst Mode operation to achieve high
efficiency for the relatively low current levels needed for
the LDO circuitry. The charge pump requires only a small
0.1µF flying capacitor between the CP and CM pins and a
1µF bypass capacitor at BIAS.
before the LDO disables. When the LDO is disabled, OUT
is pulled to GND through the external divider and an
internal 2.5k resistor.
The LDO provides a high accuracy output capable of
supplying 300mA of output current with a typical dropout
voltage of only 45mV. A single ceramic capacitor as small
as 1µF is all that is required for output bypassing. The low
reference voltage allows the LTC3035 output to be
programmed from 0.4V to 3.6V.
An internal oscillator centered at 800kHz controls the
two-phaseswitchingcycleofthechargepump. Duringthe
first phase a current source charges the flying capacitor
between VIN and GND. During the second phase, the
capacitor’s positive terminal connects to BIAS and the
current source drives the capacitor’s minus terminal,
delivering charge to the BIAS bypass capacitor and in-
creasing its voltage.
As shown in the Block Diagram, the charge pump output
atBIASsuppliestheLDOcircuitrywhiletheoutputcurrent
comes directly from the IN input for high efficiency
regulation. The low quiescent supply current, IIN = 100µA,
dropstoIIN =1µAtypicalinshutdownmakingtheLTC3035
an ideal choice for use in battery-powered systems.
A burst comparator with hysteresis monitors the voltage
on the BIAS pin. When BIAS is above the upper threshold
ofthecomparator,theoscillatorisdisabledandnoswitch-
ingoccurs. WhenBIASfallsbelowthecomparator’slower
threshold, the oscillator is enabled and the BIAS pin gets
charged. The thresholds of the burst comparator are
dynamically adjusted to maintain a DC level shown by
Figure 1. BIAS regulates to 1.9 • VIN or 5V, whichever
voltage is lower. The voltage ripple at BIAS is controlled to
approximately 1% of its DC value.
The device also includes current limit, thermal overload
protection, andreverseoutputcurrentprotection. Thefast
transientresponseofthefolloweroutputstageovercomes
the traditional tradeoff between dropout voltage, quies-
cent current and load transient response inherent in most
LDO regulator architectures. The LTC3035 also includes
overshootdetectioncircuitrywhichbringstheoutputback
into regulation when going from heavy to light output
loads (see Figure 2).
The LTC3035 also includes a soft-start feature to prevent
excessive current flow during start-up. After the BIAS
voltage reaches regulation, the soft-start circuitry gradu-
ally increases the LDO reference voltage from 0V to 0.4V
over a period of about 600µs. There is a short 700µs delay
from the time BIAS reaches regulation until the LDO
output starts to rise (see Figure 3).
LDO Operation
An undervoltage lockout comparator (UVLO) senses the
BIAS voltage to ensure that the BIAS supply for the LDO is
greater than 90% of its regulation value before
enabling the LDO. Once the LDO gets enabled, the UVLO
thresholdswitchesto50%ofitsregulationvalue.Thusthe
BIAS voltage must fall below 50% of its regulation voltage
3035f
6
LTC3035
W U U
APPLICATIO S I FOR ATIO
U
R2
R1
V
1 +
V
= 0.4V
OUT
OUT
(
)
R2
R1
V
OUT
ADJ
C
OUT
20mV/DIV
AC
GND
3035 F04
300mA
I
Figure 4. Programming the LTC3035
OUT
0mA
3035 F02
current change of 1mA to 300mA produces a –0.2mV
drop at the ADJ input. To calculate the change refered to
the output simply multiply by the gain of the feedback
network (i.e., 1 + R2/R1). For example, to program the
output for 3.3V choose R2/R1 = 7.25. In this example an
output current change of 1mA to 300mA produces
–0.2mV • (1 + 7.25) = 1.65mV drop at the output.
V
V
C
= 3.6V
200µs/DIV
IN
= 3.3V
OUT
OUT
= 1µF
Figure 2. Output Step Response
ON
SHDN
V
OFF
Output Capacitance and Transient Response
BIAS
2V/DIV
The LTC3035 is designed to be stable with a wide range of
ceramic output capacitors. The ESR of the output capaci-
toraffectsstability,mostnotablywithsmallcapacitors.An
output capacitor of 1µF or greater with an ESR of 0.05Ω or
less is recommended to ensure stability. The LTC3035 is
amicropowerdeviceandoutputtransientresponsewillbe
a function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide
improved transient response for larger load current
changes. Note that bypass capacitors used to decouple
individual components powered by the LTC3035 will
increase the effective output capacitor value. High ESR
tantalum and electrolytic capacitors may be used, but a
low ESR ceramic capacitor must be in parallel at the
output. There is no minimum ESR or maximum capacitor
size requirements.
0V
V
OUT
2V/DIV
0V
3035 F03
V
V
C
C
= 3.6V
500µs/DIV
IN
= 3.3V
= 1µF
= 1µF
OUT
OUT
BIAS
Figure 3. Bias and Output Start-Up Waveforms
Adjustable Output Voltage
The output voltage is set by the ratio of two external
resistors as shown in Figure 4. The device servos the
output to maintain the ADJ pin voltage at 0.4V (referenced
to ground). Thus the current in R1 is equal to 0.4V/R1. For
good transient response, stability and accuracy the
current in R1 should be at least 8µA, thus the value of R1
should be no greater than 50k. The current in R2 is the
current in R1 plus the ADJ pin bias current. Since the ADJ
pin bias current is typically <10nA it can be ignored in the
output voltage calculation. The output voltage can be
calculated using the formula in Figure 4. Note that in
shutdown the output is turned off and the divider current
will be zero once COUT is discharged.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common di-
electrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit strong voltage and tem-
perature coefficients as shown in Figures 5 and 6. When
used with a 3.3V regulator, a 1µF Y5V capacitor can lose
asmuchas80%ofitsratedcapacitanceovertheoperating
3035f
The LTC3035 operates at a relatively high gain of
–0.7µV/mA referred to the ADJ input. Thus a load
7
LTC3035
W U U
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APPLICATIO S I FOR ATIO
20
available current, a 0.1µF or greater ceramic capacitor
should be used. Warning: A polarized capacitor such as
tantalum or aluminum should never be used for the flying
capacitorsinceitsvoltagecanreverseuponstart-upofthe
LTC3035. Low ESR ceramic capacitors should always be
used for the flying capacitor.
BOTH CAPACITORS ARE 1µF,
6.3V, 0402 CASE SIZE
0
–20
Y5V
X5R
–40
–60
A 1µF or greater low ESR (<0.1Ω) ceramic capacitor is
recommended to bypass the BIAS pin. Larger values of
capacitance will not reduce the size of the BIAS ripple
much, but will decrease the ripple frequency proportion-
ally. The BIAS pin should maintain 0.4µF of capacitance at
all times to ensure correct operation. High ESR tantalum
and electrolytic capacitors may be used, but a low ESR
ceramic must be used in parallel for correct operation. It
is also recommended that IN be bypassed to ground with
a 1µF or greater ceramic capacitor.
–80
–100
0
4
5
1
2
3
6
DC BIAS VOLTAGE (V)
3035 F05
Figure 5. Ceramic Capacitor DC Bias Characteristics
20
0
X5R
–20
Thermal Considerations
Y5V
–40
–60
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be the output current
multiplied by the input/output voltage differential:
–80
BOTH CAPACITORS ARE 1µF,
6.3V, 0402 CASE SIZE
(IOUT)(VIN – VOUT
)
–100
–50
0
25
50
75
–25
TEMPERATURE (°C)
The LTC3035 has internal thermal limiting designed to
protectthedeviceduringmomentaryoverloadconditions.
For continuous normal conditions, the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
3035 F06
Figure 6. Ceramic Capacitor Temperature Characteristics
temperature range. The X5R only loses about 40% of its
rated capacitance over the operating temperature range.
The X5R and X7R dielectrics result in more stable charac-
teristics and are more suitable for use as the output
capacitor. The X7R type has better stability across tem-
perature and bias voltage, while the X5R is less expensive
and is available in higher values. In all cases, the output
capacitance should never drop below 0.4µF, or instability
or degraded performance may occur.
For surface mount devices, heat sinking is accomplished
by using the heat-spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through holes can also be used to spread the heat
generated by power devices.
A junction to ambient thermal coefficient of 76°C/W is
achieved by connecting the Exposed Pad of the DFN
package directly to a ground plane of about 2500mm2.
Charge Pump Component Selection
The flying capacitor controls the strength of the charge
pump.Inorderforthechargepumptodeliveritsmaximum
3035f
8
LTC3035
U
OPERATIO
Calculating Junction Temperature
overstress condition is removed. Long term overstress
(TJ>125°C) should be avoided as it can degrade the
performance or shorten the life of the part.
Example: Given an output voltage of 1.5V, an input voltage
of 1.8V to 3V, an output current range of 0mA to 100mA
and a maximum ambient temperature of 50°C, what will
the maximum junction temperature be?
Layout Considerations
ConnectionfromtheBIASandOUTpinstotheirrespective
ceramic bypass capacitor should be kept as short as
possible. The ground side of the bypass capacitors should
be connected directly to the ground plane for best results
or through short traces back to the GND pin of the part.
Long traces will increase the effective series ESR and
inductance of the capacitor which can degrade
performance.
The power dissipated by the device will be approximately:
IOUT(MAX)(VIN(MAX) – VOUT
)
where:
IOUT(MAX) = 100mA
VIN(MAX) = 3V
so:
The CP and CM pins of the charge pump are switching
nodes. The transition edge rates of these pins can be quite
fast (~10ns). Thus care must be taken to make sure these
nodes do not couple capacitively to other nodes (espe-
cially the ADJ pin). Place the flying capacitor as close as
possible to the CP and CM pins for optimum charge pump
performance.
P = 100mA(3V – 1.5V) = 0.15W
Even under worst-case conditions LTC3035’s BIAS pin
power dissipation is only about 1mW, thus can be
ignored.Thejunctiontoambientthermalresistancewillbe
on the order of 76°C/W. The junction temperature rise
above ambient will be approximately equal to:
Because the ADJ pin is relatively high impedance
(depending on the resistor divider used), stray capaci-
tance at this pin should be minimized (<10pF) to prevent
phase shift in the error amplifier loop. Additional special
attention should be given to any stray capacitances that
can couple external signals onto the ADJ pin producing
undesirable output ripple. For optimum performance
connect the ADJ pin to R1 and R2 with a short PCB trace
and minimize all other stray capacitance to the ADJ pin.
Figure 7 shows an example layout for the LTC3035.
0.15W(76°C/W) = 11.4°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T = 50°C + 11.4°C = 61.4°C
Short-Circuit/Thermal Protection
The LTC3035 has built-in output short-circuit current
limiting as well as over temperature protection. During
short-circuit conditions, internal circuitry automatically
limits the output current to approximately 760mA. At
higher temperatures, or in cases where internal power
dissipation causes excessive self heating on chip, the
thermal shutdown circuitry will shut down the charge
pump and LDO when the junction temperature exceeds
approximately 155°C. It will reenable the converter and
LDOoncethejunctiontemperaturedropsbacktoapproxi-
mately 140°C. The LTC3035 will cycle in and out of
thermal shutdown without latch-up or damage until the
C
BIAS
BIAS
SHDN
ADJ
1
2
3
4
CP
8
7
6
5
CF
CM
GND
IN
R1
R2
OUT
C
C
OUT
IN
3035 F07
VIA CONNECTION
TO GND PLANE
Figure 7. Suggested Layout
3035f
9
LTC3035
U
TYPICAL APPLICATIO
Low Noise Li-Ion to 3.3V Supply
0.1µF
C
BIAS
L1
1µF
3.4V
CM
CP
10µH
600mA
S
S
S
BIAS
IN
C
IN
1µF
LTC3035
3
7
8
2
1
4
SW2
SW1
V
= 3.3V
≤ 300mA
OUT
OUT
S
S
S
OUT
ADJ
SHDN
GND
LTC3440
I
V
IN
= 2.7V TO 4.2V
C
6
OUT
R1
294k
S
V
V
OUT
FB
IN
1µF
357k
9
S
S
SHDN/SS
40.2k
C5 1.5nF
+
10
5
C1
10µF
C2
22µF
Li-Ion
V
C
MODE/SYNC
*
R3
15k
GND
R
T
R
R2
200k
T
*1 = Burst Mode OPERATION
0 = FIXED FREQUENCY
60.4k
S
S
S
S
S
C1: TAIYO YUDEN JMK212BJ106MG
C2: TAIYO YUDEN JMK325BJ226MM
C
, C
, C : TDK C1005X5R0J105K
IN BIAS OUT
S
OFF ON
L1: SUMIDA CDRH6D38-100
3035 TA02
Efficiency vs Output Current
Ripple Rejection
100
90
80
70
60
50
40
30
20
10
0
V
= 2.7V
LTC3440
OUTPUT
AC
IN
®
Burst Mode
OPERATION
20mV/DIV
V
= 4.2V
IN
V
= 3.6V
IN
LTC3035
OUTPUT
AC
20mV/DIV
3035 TA02c
I
= 25mA
20µs/DIV
OUT
0.1
1
10
100
1000
OUTPUT CURRENT (mA)
3035 TA02b
Burst Mode IS A REGISTERED TRADEMARK OF
LINEAR TECHNOLOGY CORPORATION
3035f
10
LTC3035
U
PACKAGE DESCRIPTIO
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702 Rev B)
0.61 ±0.05
(2 SIDES)
0.70 ±0.05
2.55 ±0.05
1.15 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
2.20 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.40 ± 0.10
3.00 ±0.10
(2 SIDES)
TYP
5
R = 0.05
8
TYP
2.00 ±0.10
PIN 1 BAR
TOP MARK
PIN 1
(2 SIDES)
R = 0.20 OR
(SEE NOTE 6)
0.25 × 45°
0.56 ± 0.05
(2 SIDES)
CHAMFER
4
1
(DDB8) DFN 0905 REV B
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.15 ±0.05
(2 SIDES)
0 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
3035f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC3035
U
TYPICAL APPLICATIO S
Dual LDO Output (1.8V, 1.5V) from 2.5V Supply Rail
V
IN
2.5V
0.1µF
1µF
1µF
0.1µF
0.1µF
CP
IN
LTC3035
CM
BIAS
IN
BIAS
LTC3025
SHDN OUT
V
= 1.8V
< 300mA
V
= 1.5V
< 300mA
OUT
OUT
OUT
OUT
SHDN OUT
I
I
140k
110k
GND
ADJ
1µF
GND
ADJ
1µF
40.2k
40.2k
3035 TA03
OFF ON
Dual LDO Output (1.5V, 1.2V) from 1.8V Supply Rail
V
IN
1.8V
0.1µF
1µF
1µF
0.1µF
0.1µF
CP
IN
LTC3035
CM
BIAS
IN
BIAS
LTC3025
SHDN OUT
V
= 1.5V
< 300mA
V
= 1.2V
< 300mA
OUT
OUT
OUT
OUT
SHDN OUT
I
I
110k
80k
GND
ADJ
1µF
GND
ADJ
1µF
40.2k
40.2k
3035 TA04
OFF ON
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
V : 1.8V to 20V, V
LT®1761
100mA, Low Noise Micropower, LDO
= 1.22V, V = 0.30V, I = 20µA, I < 1µA, V
= Adj,
IN
OUT(MIN)
DO
Q
SD
OUT
1.5V, 1.8V, 2V, 2.5V, 2.8V, 3V, 3.3V, 5V, ThinSOTTM Package.
Low Noise < 20µV
, Stable with 1µF Ceramic Capacitors
RMSP-P
LT1762
LT1763
LTC1844
150mA, Low Noise Micropower LDO
500mA, Low Noise Micropower LDO
150mA, Very Low Dropout LDO
V : 1.8V to 20V, V
2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20µV
= 1.22V, V = 0.30V, I = 25µA, I < 1µA, V
= Adj,
= 1.5,
= Adj,
IN
OUT(MIN)
DO
Q
SD
OUT
OUT
RMSP-P
V : 1.8V to 20V, V
= 1.22V, V = 0.30V, I = 30µA, I < 1µA, V
IN
OUT(MIN)
DO Q
SD
RMSP-P
1.8V, 2.5V, 3V, 3.3V, 5V, S8 Package. Low Noise < 20µV
V : 1.6V to 6.5V, V = 1.25V, V = 0.08V, I = 40µA, I < 1µA, V
OUT
IN
OUT(MIN)
DO
Q
SD
1.5V, 1.8V, 2.5V, 2.8V, 3.3V, ThinSOT Package. Low Noise < 30µV
1µF Ceramic Capacitors
, Stable with
RMSP-P
LT1962
LT3020
LTC3025
LTC3026
300mA, Low Noise Micropower LDO
100mA, Low Voltage, VLDO
V : 1.8V to 20V, V
1.8V, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20µV
= 1.22V, V = 0.27V, I = 30µA, I < 1µA, V
= 1.5,
OUT
IN
OUT(MIN)
DO
Q
SD
RMSP-P
V : 0.9V to 10V, V
= 0.20V, V = 0.15V, I = 120µA, I < 3µA, V
= Adj,
OUT
IN
OUT(MIN)
DO
Q
SD
DFN, MS8 Package
300mA, Micropower VLDO Linear Regulator
V : 0.9V to 5.5V, V
: 2.5V to 5.5V, V = 0.4V, V = 0.05V, I = 54µA,
OUT(MIN) DO Q
IN
BIAS
I
< 1µA, V
= Adj, DFN Package. Stable with 1µF Ceramic Capacitors
SD
OUT
1.5A, Low Input Voltage VLDO Linear Regulator V : 1.14V to 3.5V (Boost Enabled), 1.14V to 5.5V (External 5V Boost),
IN
V
= 0.4V, V = 0.15V, I = 400µA, I < 1µA, V
= Adj,
OUT
OUT(MIN)
DO
Q
SD
DFN, MSOP Packages. Stable with 10µF Ceramic Capacitors
ThinSOT is a trademark of Linear Technology Corporation.
3035f
LT 1105 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
© LINEAR TECHNOLOGY CORPORATION 2005
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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