1391 [Linear]

8-Channel Analog Multiplexer with Cascadable Serial Interface; 8通道模拟多路复用器级联的串行接口


型号：	1391
厂家：	Linear
描述：	8-Channel Analog Multiplexer with Cascadable Serial Interface 8通道模拟多路复用器级联的串行接口复用器
文件：	总12页 (文件大小：176K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC1391

8-Channel

Analog Multiplexer with

Cascadable Serial Interface

FEATURES

DESCRIPTIO

■

Low R_ON: 45Ω

TheLTC ^®1391isahighperformanceCMOS8-to-1analog

multiplexer. It features a serial digital interface that allows

several LTC1391s to be daisy-chained together, increas-

ing the number of MUX channels available using a single

digital port.

■

Single 2.7V to ±5V Supply Operation

■

Low Charge Injection

Serial Digital Interface

Analog Inputs May Extend to Supply Rails

■

Low Leakage: ±5nA Max

Guaranteed Break-Before-Make

The LTC1391 features a typical R_ONof 45Ω, a typical

switch leakage of 50pA and guaranteed break-before-

make operation. Charge injection is ±10pC maximum. All

digital inputs are TTL and CMOS compatible when oper-

ated from single or dual supplies. The inputs can with-

stand 100mA fault current.

■

TTL/CMOS Compatible for All Digital Inputs

■

Cascadable to Allow Additional Channels

■

Can Be Used as a Demultiplexer

APPLICATIO S

The LTC1391 is available in 16-pin PDIP, SSOP and

narrow SO packages. For applications requiring 2-way

serial data transmission, see the LTC1390 data sheet.

■

Data Acquisition Systems

■

Communication Systems

■

Signal Multiplexing/Demultiplexing

, LTC and LT are registered trademarks of Linear Technology Corporation.

TYPICAL APPLICATIO

On-Resistance vs

Analog Input Voltage

3V, 8-Channel 12-Bit ADC

300

OPTIONAL A/D

INPUT FILTER

1µF

0.1µF

= 25°C

REF

250

200

150

100

–

= 2.7V

= 0V

+IN

–IN

GND

CLK

–

LTC1285

OUT

ANALOG

INPUTS

CS/SHDN

OUT

LTC1391

–

CLK

= 5V

= –5V

GND

DATA IN

CLK

–5 –4 –3 –2 –1

SERIAL INTERFACE

TO MUX AND ADC

ANALOG INPUT VOLTAGE (V)

1391 TA02

DATA OUT

1391 TA01

sn1391 1391fas

LTC1391

W W U W

U W

ABSOLUTE AXI U RATI GS

PACKAGE/ORDER I FOR ATIO

(Note 1)

Total Supply Voltage (V⁺to V^–) .............................. 15V

Input Voltage

TOP VIEW

ORDER PART

NUMBER

Analog Inputs/Outputs ..... (V^–– 0.3V) to (V⁺+ 0.3V)

Digital Inputs .........................................–0.3V to 15V

Digital Outputs ..........................–0.3V to (V⁺+ 0.3V)

Power Dissipation.............................................. 500mW

Operating Temperature Range

–

LTC1391CGN

LTC1391CN

LTC1391CS

LTC1391IGN

LTC1391IN

LTC1391IS

OUT

CLK

GND

LTC1391C ............................................... 0°C to 70°C

LTC1391I........................................... –40°C to 85°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

GN PACKAGE

N PACKAGE

GN PART MARKING

16-LEAD PLASTIC SSOP 16-LEAD PDIP

S PACKAGE

16-LEAD PLASTIC SO

1391

1391I

T_JMAX= 125°C, θ_JA= 110°C/ W (GN)

_JMAX= 125°C, θ_JA= 70°C/ W (N)

T_JMAX= 125°C, θ_JA= 100°C/ W (S)

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V⁺= 5V, V^–= –5V, GND = 0V, unless otherwise specified.

SYMBOL PARAMETER

Switch

CONDITIONS

MIN

TYP

MAX

UNITS

Analog Signal Range

On-Resistance

(Note 2)

●

–5

ANALOG

V = ±3.5V, I = 1mA

= 0°C (LTC1391C)

= –40°C (LTC1391I)

Ω

MIN

25°C

Ω

= 70°C (LTC1391C)

= 85°C (LTC1391I)

120

MAX

∆R vs V

0.5

∆R vs Temperature

%/°C

Off Input Leakage

Off Output Leakage

On Channel Leakage

V = 4V, V = –4V, V = –4V, V = 4V

Channel Off

±0.05

±5

±20

S(OFF)

D(OFF)

D(ON)

●

V = 4V, V = –4V, V = –4V, V = 4V

±0.05

±5

±20

Channel Off

V = V = ±4V

±5

±20

Channel On

Digital

High Level Input Voltage

Low Level Input Voltage

Input Current

V = 5.25V

●

2.4

INH

INL

V = 4.75V

0.8

, I

= 5V, 0V

±5

µA

INL INH

High Level Output Voltage

V = 4.75V, I = –10µA

4.74

4.50

V = 4.75V, I = –360µA

●

Low Level Output Voltage

V = 4.75V, I = 1.6mA

0.5

0.8

sn1391 1391fas

LTC1391

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V⁺= 5V, V^–= –5V, GND = 0V, unless otherwise specified.

SYMBOL PARAMETER

Dynamic

CONDITIONS

MIN

TYP

MAX

UNITS

Clock Frequency

(Note 2)

MHz

CLK

Enable Turn-On Time

Enable Turn-Off Time

Break-Before-Make Interval

Off Isolation

V = 2.5V, R = 1k, C = 35pF

260

100

155

400

200

V = 2.5V, R = 1k, C = 35pF

OFF

OPEN

OIRR

V = 2V , R = 1k, f = 100kHz

P–P

Charge Injection

R = 0, C = 1000pF, V = 1V (Note 2)

±2

±10

INJ

Input Off Capacitance

Output Off Capacitance

S(OFF)

D(0FF)

Supply

Positive Supply Current

Negative Supply Current

All Logic Inputs Tied Together, V = 0V or 5V

●

µA

–

All Logic Inputs Tied Together, V = 0V or 5V

–15

–40

The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T_A= 25°C.

V⁺= 2.7V, V^–= GND = 0V, unless otherwise specified.

SYMBOL PARAMETER

Switch

CONDITIONS

MIN

TYP

MAX

UNITS

Analog Signal Range

On-Resistance

(Note 2)

●

2.7

ANALOG

V = 1.2V, I = 1mA

= 0°C (LTC1391C)

= –40°C (LTC1391I)

300

Ω

MIN

25°C

250

300

350

Ω

= 70°C (LTC1391C)

= 85°C (LTC1391I)

MAX

∆R vs V

0.5

∆R vs Temperature

%/°C

Off Input Leakage

Off Output Leakage

On Channel Leakage

V = 2.5V, V = 0.5V; V = 0.5V, V = 2.5V (Note 3)

Channel Off

±0.05

±5

±20

S(OFF)

D(OFF)

D(ON)

●

V = 2.5V, V = 0.5V; V = 0.5V, V = 2.5V (Note 3)

±0.05

±5

±20

Channel Off

V = V = 0.5V, 2.5V (Note 3)

±5

±20

Channel On

Digital

High Level Input Voltage

Low Level Input Voltage

Input Current

V = 3.0V

●

2.0

INH

INL

V = 2.4V

0.8

, I

= 2.7V, 0V

±5

µA

INL INH

High Level Output Voltage

V = 2.7V, I = –20µA

2.68

2.30

V = 2.7V, I = –400µA

●

Low Level Output Voltage

V = 2.7V, I = 20µA

0.01

0.20

V = 2.7V, I = 400µA

0.8

sn1391 1391fas

LTC1391

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V⁺= 2.7V, V^–= GND = 0V, unless otherwise specified.

SYMBOL PARAMETER

Dynamic

CONDITIONS

MIN

TYP

MAX

UNITS

Clock Frequency

(Note 2)

MHz

CLK

Enable Turn-On Time

Enable Turn-Off Time

Break-Before-Make Interval

Off Isolation

V = 1.5V, R = 1k, C = 35pF (Note 4)

490

190

290

800

400

V = 1.5V, R = 1k, C = 35pF (Note 4)

OFF

(Note 4)

125

OPEN

QIRR

V = 2V , R = 1k, f = 100kHz

P–P

Charge Injection

R = 0, C = 1000pF, V = 1V (Note 2)

±1

±5

INJ

Input Off Capacitance

Output Off Capacitance

S(OFF)

D(OFF)

Supply

Positive Supply Current

All Logic Inputs Tied Together, V = 0V or 2.7V

●

0.2

µA

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 3: Leakage current with a single 2.7V supply is guaranteed by

correlation with the ±5V leakage current specifications.

Note 2: Guaranteed by Design.

Note 4: Timing specifications with a single 2.7V supply are guaranteed by

correlation with the ±5V timing specifications.

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Driver Output Low Voltage

vs Output Current

Driver Output Low Voltage

vs Temperature

On-Resistance vs Temperature

0.65

0.60

0.55

0.50

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

300

250

200

150

100

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

= 25°C

= 2.7V

–

= 0V

= 5V

= 2.7V

= 1.2V

= –5V

–

= 0V

= 1.8mA

–

= 2.7V

= 5V

= –5V

= 0V

–

= 0V

= 5V

= –5V

= 400µA

–40 –20

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

OUTPUT CURRENT (mA)

TEMPERATURE (°C)

1391 G01

1391 G03

1391 G02

sn1391 1391fas

LTC1391

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Driver Output High Voltage

vs Temperature

Driver Output High Voltage

vs Output Current

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

–3.5

–4.0

–

= 5V

–

= 2.7V

= 0V

= –5V

= 1.6mA

= 5V

–

= –5V

= 2.7V

–

= 0V

= 400µA

=25°C

4.5

–40 –20

TEMPERATURE (°C)

2.0

2.5

3.0

3.5

4.0

5.0

OUTPUT VOLTAGE (V)

1391 G05

1391 G04

PIN FUNCTIONS

S0, S1, S2, S3, S4, S5, S6, S7 (Pins 1, 2, 3, 4, 5, 6, 7,

8): Analog Multiplexer Inputs.

D_IN(Pin 12): Digital Input (TTL/CMOS Compatible). Input

for the channel selection bits.

GND (Pin 9): Digital Ground. Connect to system ground.

D_OUT(Pin 13): Digital Output (TTL/CMOS Compatible).

Output from the internal shift register.

CLK(Pin10):SystemClock(TTL/CMOSCompatible). The

clock synchronizes the channel selection bits and the

V^–(Pin 14): Negative Supply. For ±5V dual supply appli-

cations, |V^–| should not exceed |V⁺|by more than 20% for

proper channel selection.

serial data transfer from D_INto D_OUT

CS (Pin 11): Channel Select Input (TTL/CMOS Compat-

ible). A logic high on this input enables the LTC1391 to

read in the channel selection bits and allows digital data

transfer from D_INto D_OUT. A logic low on this input puts

D_OUTinto three-state and enables the selected channel for

analog signal transmission.

D (Pin 15): Analog Multiplexer Output.

V⁺(Pin 16): Positive Supply.

sn1391 1391fas

LTC1391

W U U

APPLICATIONS INFORMATION

Multiplexer Operation

selection of next channel. If the “EN” bit is logic low, as

illustrated in the second data sequence, it disables all

channels and there will be no analog signal transmission.

Table 1 shows the various bit combinations for channel

selection.

Figure 1 shows the block diagram of the components

within the LTC1391 required for MUX operation. The

LTC1391usesD_INtoselecttheactivechannelandthechip

select input, CS, to switch on the selected channel as

shown in Figure 2.

Table 1. Logic Table for Channel Selection

ACTIVE CHANNEL

When CS is high, the input data on the D_INpin is latched

into the 4-bit shift register on the rising clock edge. The

input data consists of the “EN” bit and a string of three bits

for channel selection. If “EN” bit is logic high as illustrated

in the first input data sequence, it enables the selected

channel. After the clocking in of the last channel selection

bit B0, the CS pin must be pulled low before the next rising

clock edge to ensure correct operation. Once CS is pulled

low, the previously selected channel is switched off to

ensure a break-before-make interval. After a delay of t_ON,

the selected channel is switched on allowing signal trans-

mission. The selected channel remains on until the next

falling edge of CS. After a delay of t_OFF, the LTC1391

terminates the analog signal transmission and allows the

All Off

Digital Data Transfer Operation

The block diagram of Figure 3 shows the components

within theLTC1391 required forserialdatatransfer. When

CS is held high, data is fed into the 4-bit shift register and

then shifted to D_OUT. Data appears at D_OUTafter the fourth

rising edge of the clock as shown in Figure 4. The last four

CLK

CONTROL

LOGIC

4-BIT SHIFT

CLK

CONTROL

LOGIC

4-BIT SHIFT

OUT

ANALOG

OUTPUT (D)

MUX

BLOCK

ANALOG INPUTS

(S0 TO S7)

1391 F03

1391 • F01

Figure 3. Simplified Block Diagram of the

Digital Data Transfer Operation

Figure 1. Simplified Block Diagram of the MUX Operation

CLK

HIGH

EN LO

ANY ANALOG

INPUT

OFF

1391 • F02

Figure 2. Multiplexer Operation

sn1391 1391fas

LTC1391

W U U

APPLICATIONS INFORMATION

To ensure that only one channel is switched on at any one

time, two sets of channel selection bits are needed for

DATAasshowninFigure6. Thefirstdatasequenceisused

to switch off one MUX and the second data sequence is

used to select one channel from the other MUX or

vice versa. In other words, if bit “ENA” is high and bit

“ENB” is low, one channel of MUX A is switched on and all

channels of MUX B are switched off. If bit “ENA” is low and

bit “ENB” is high, all channels at MUX A are switched off

and one channel of MUX B is switched on. Care should be

taken to ensure that only one LTC1391 is enabled at any

one time to prevent two channels from being enabled

simultaneously.

bits clocked into the LTC1391 shift register before CS is

taken low select the MUX channel that is turned on. This

allows a series of devices, with the D_OUTof one device

connected to the D_INof the next device, to be programmed

with a single data stream.

CLK

OUT

1391 • F04

Figure 4. Digital Data Transfer Operation

CLK

Multiplexer Expansion

Several LTC1391s can be daisy-chained to expand the

number of multiplexer inputs. No additional interface

ports are required for the expansion. Figure 5 shows two

LTC1391s connected at their analog outputs to form a

16-to-1multiplexerattheinputtoanLTC1400A/Dconverter.

ENA

ENB

1391 • F06

Figure 6. Data Sequence for MUX Expansion

–5V

0.1µF

10µF

OPTIONAL A/D

INPUT FILTER

–5V

0.1µF

10µF

–

CONV

LTC1400

CLK

REF

0.1µF

DATA

OUT

10µF

ANALOG

INPUTS

OUT

GND

OUT

LTC1391

CLK

GND

–

OUT

ANALOG

INPUTS

LTC1391

DATA IN

CLK

GND

CLK

1391 • F05

Figure 5. Daisy-Chaining Two LTC1391s for Expansion

sn1391 1391fas

LTC1391

TYPICAL APPLICATIONS

Daisy-Chaining Five LTC1391s

0.1µF BYPASS CAPACITORS FROM

TO GND FOR EACH LTC1391

0.1µF

REF

–

+IN

–IN

GND

CLK

LTC1286

DATA

OUT

LTC1391

ANALOG

INPUTS

OUT

CLK

GND

–

LTC1391

ANALOG

INPUTS

OUT

CLK

GND

–

LTC1391

ANALOG

INPUTS

OUT

CLK

GND

–

LTC1391

ANALOG

INPUTS

OUT

CLK

GND

–

LTC1391

ANALOG

INPUTS

OUT

DATA IN

CLK

GND

CLK

1391 TA04

sn1391 1391fas

LTC1391

PACKAGE DESCRIPTIO

GN Package

16-Lead Plastic SSOP (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1641)

0.189 – 0.196*

(4.801 – 4.978)

0.009

(0.229)

REF

16 15 14 13 12 11 10 9

0.229 – 0.244

(5.817 – 6.198)

0.150 – 0.157**

(3.810 – 3.988)

0.015 ± 0.004

(0.38 ± 0.10)

× 45°

0.053 – 0.068

(1.351 – 1.727)

0.004 – 0.0098

(0.102 – 0.249)

0.007 – 0.0098

(0.178 – 0.249)

0° – 8° TYP

0.016 – 0.050

(0.406 – 1.270)

0.0250

(0.635)

BSC

0.008 – 0.012

(0.203 – 0.305)

* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

GN16 (SSOP) 1098

sn1391 1391fas

LTC1391

PACKAGE DESCRIPTIO

N Package

16-Lead PDIP (Narrow .300 Inch)

(Reference LTC DWG # 05-08-1510)

0.770*

(19.558)

MAX

0.255 ± 0.015*

(6.477 ± 0.381)

0.300 – 0.325

0.130 ± 0.005

0.045 – 0.065

(7.620 – 8.255)

(3.302 ± 0.127)

(1.143 – 1.651)

0.020

(0.508)

MIN

0.065

(1.651)

TYP

0.009 – 0.015

(0.229 – 0.381)

+0.035

–0.015

0.325

0.125

(3.175)

MIN

0.018 ± 0.003

(0.457 ± 0.076)

0.100

(2.54)

BSC

+0.889

8.255

(

)

–0.381

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

N16 1098

sn1391 1391fas

LTC1391

PACKAGE DESCRIPTIO

S Package

16-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

0.386 – 0.394*

(9.804 – 10.008)

0.150 – 0.157**

(3.810 – 3.988)

0.228 – 0.244

(5.791 – 6.197)

0.010 – 0.020

(0.254 – 0.508)

× 45°

0.053 – 0.069

(1.346 – 1.752)

0.004 – 0.010

(0.101 – 0.254)

0.008 – 0.010

(0.203 – 0.254)

0° – 8° TYP

0.050

(1.270)

BSC

0.014 – 0.019

(0.355 – 0.483)

TYP

0.016 – 0.050

(0.406 – 1.270)

S16 1098

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

sn1391 1391fas

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

LTC1391

TYPICAL APPLICATIO

Interfacing LTC1391 with LTC1257 for Demultiplex Operation

5V ≤ V ≤ 12V

–

0.1µF

47k

ANALOG

OUT

LTC1391

OUTPUTS

OPTIONAL D/A

OUTPUT FILTER

CLK

GND

0.1µF

OUT

LTC1257

LOAD

REF

DATA

CLK

GND

OUT

TTL COMPATIBLE

1391 TA03

AT V = 5V

RELATED PARTS

PART NUMBER

LTC1285

DESCRIPTION

3V 12-Bit ADC

5V 12-Bit ADC

COMMENTS

Micropower, Auto Shutdown, SO-8 Package, SPI, QSPI + MICROWIRE^TMCompatible

Micropower, Auto Shutdown, SO-8 Package, SPI, QSPI + MICROWIRECompatible

LTC1286

LTC1380/LTC1393 SMBus-Controlled Analog Multiplexer

Low R and Low Charge Injection

LTC1390

LTC1401

LTC1402

LTC1404

LTC1417

LTC1451

LTC1452

LTC1453

LT1460-2.5

LT1461-2.5

Serial-Controlled 8-to-1 Analog Multiplexer Low R , Bidirectional Serial Interface, Low Power, 16-Pin SO

3V, 12-Bit, 200ksps Serial ADC

12-Bit, 2.2Msps Serial ADC

15mW, Internal Reference, SO-8 Package

90mW with Nap and Sleep Modes, 5V or ±5V, Internal Reference

5V or ±5V, Internal Reference and Shutdown

20mW, Single 5V or ±5V Supply

12-Bit, 600ksps Serial ADC

14-Bit, 400ksps Serial ADC

5V 12-Bit Voltage Output DAC

5V and 3V 12-Bit Voltage Output DAC

3V 12-Bit Voltage Output DAC

Micropower, Precision Bandgap Reference

Micropower, Low Dropout Reference

Complete V

DAC, SO-8 Package, Daisy-Chainable, Low Power

OUT

Multiplying V

DAC, SO-8 Package, Rail-to-Rail Output, Low Power

OUT

Complete V

DAC, SO-8 Package, Daisy-Chainable, Low Power

OUT

130µA Supply Current, 10ppm/°C, Available in SOT-23

50µA Supply Current, 300mV Dropout, 3ppm/°C Drift

SO-8 Package, Micropower, Serial I/O

LTC1655/LTC1655L 16-Bit, Voltage Output DAC, 5V/3V

LTC1658 14-Bit, Voltage Output DAC

Micropower, Multiplying V , Swings from GND to V

OUT

REF

MICROWIRE is a trademark of National Semiconductor.

sn1391 1391fas

LT/TP 0701 1.5K REV A • PRINTED IN USA

12 ^{LinearTechnology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com

LINEAR TECHNOLOGY CORPORATION 1995

1391 [Linear]

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