LT1016CN8#PBF [Linear]
LT1016 - Ultra Fast Precision 10ns Comparator; Package: PDIP; Pins: 8; Temperature Range: 0°C to 70°C;
| 型号： | LT1016CN8#PBF |
| 厂家： | 
Linear |
| 描述： | LT1016 - Ultra Fast Precision 10ns Comparator; Package: PDIP; Pins: 8; Temperature Range: 0°C to 70°C 放大器 光电二极管 |
| 文件： | 总22页 (文件大小：1049K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1016
UltraFast Precision
10ns Comparator
FEATURES
DESCRIPTION
TheLT®1016isanUltraFast10nscomparatorthatinterfaces
directly to TTL/CMOS logic while operating off either 5V
or single 5V supplies. Tight offset voltage specifications
and high gain allow the LT1016 to be used in precision
applications. Matched complementary outputs further
extend the versatility of this comparator.
n
UltraFast™ (10ns typ)
n
Operates Off Single 5V Supply or 5V
n
Complementary Output to TTL
Low Offset Voltage
No Minimum Input Slew Rate Requirement
No Power Supply Current Spiking
Output Latch Capability
n
n
n
n
A unique output stage provides active drive in both direc-
tions for maximum speed into TTL/CMOS logic or passive
loads, yet does not exhibit the large current spikes found
in conventional output stages. This allows the LT1016 to
remain stable with the outputs in the active region which,
greatly reduces the problem of output “glitching” when
the input signal is slow moving or is low level.
APPLICATIONS
n
High Speed A/D Converters
■
High Speed Sampling Circuits
■
Line Receivers
■
Extended Range V-to-F Converters
The LT1016 has a LATCH pin which will retain input data
at the outputs, when held high. Quiescent negative power
supplycurrentisonly3mA.Thisallowsthenegativesupply
pin to be driven from virtually any supply voltage with a
simpleresistivedivider.Deviceperformanceisnotaffected
by variations in negative supply voltage.
■
Fast Pulse Height/Width Discriminators
■
Zero-Crossing Detectors
■
Current Sense for Switching Regulators
■
High Speed Triggers
Crystal Oscillators
■
All registered trademarks and trademarks are the property of their respective owners.
Analog Devices offers a wide range of comparators in
addition to the LT1016 that address different applica-
tions. See the Related Parts section on the back page of
the data sheet.
TYPICAL APPLICATION
Response Time
10MHz to 25MHz Crystal Oscillator
5V
ꢀꢎRꢃꢏꢎꢐꢑD
ꢀꢎRꢃꢏꢎꢐꢑD
ꢒ
ꢁꢓ
10MHz TO 25MHz
2k
ꢉꢈꢈꢔꢒ ꢏꢀꢃꢕ
(AT CUT)
ꢖꢔꢒ ꢐꢒꢃRDRꢁꢒꢃ
22Ω
820pF
5V
+
V
+
–
Q
LT1016
2k
OUTPUT
ꢒ
ꢐꢗꢀ
ꢉꢒꢘDꢁꢒ
Q
GND
LATCH
–
V
2k
ꢈ
ꢈ
ꢌꢈ
ꢀꢁꢂꢃ ꢄꢅꢆꢇ
ꢌꢈ
200pF
1016 TA1a
ꢉꢈꢉꢊ ꢀꢋꢌꢍ
Rev D
1
Document Feedback
For more information www.analog.com
LT1016
ABSOLUTE MAXIMUM RATINGS (Note 1)
Positive Supply Voltage (Note 5) ................................7V
Negative Supply Voltage .............................................7V
Differential Input Voltage (Note 7) ........................... 5V
+IN, –IN and LATCH ENABLE Current (Note 7).... 10mA
Output Current (Continuous) (Note 7)................. 20mA
Operating Temperature Range
LT1016I................................................–40°C to 85°C
LT1016C................................................... 0°C to 70°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
PIN CONFIGURATION
ꢈꢉꢊ ꢋꢌꢍꢎ
ꢏ
ꢀꢁꢂ ꢃꢄꢅꢆ
ꢐ
ꢋ
ꢀ
ꢁ
ꢂ
ꢃ
Q ꢉꢒꢈ
ꢓ ꢉꢒꢈ
ꢔꢐD
ꢃ
ꢚ
ꢞ
ꢠ
ꢡ
ꢓ
ꢢ
ꢣ
ꢤ
Q ꢁꢇꢀ
ꢈ ꢁꢇꢀ
ꢉꢊD
ꢄ
ꢅ
ꢆ
ꢇ
ꢏ
ꢑ
ꢐ
ꢑ
ꢏꢌꢐ
ꢑꢌꢐ
ꢐꢄꢊ
ꢑꢄꢊ
ꢑ
ꢑ
ꢋ
ꢕꢖꢈꢗꢘ
ꢍꢐꢖꢙꢕꢍ
ꢃ
ꢋꢌꢀꢍꢎ
ꢅꢊꢌꢏꢋꢅ
ꢐꢄ ꢊꢖꢗꢚꢖꢔꢍ
ꢄꢛꢕꢍꢖD ꢊDꢌꢊ
ꢒꢓ ꢂꢌꢍꢔꢌꢉꢅ
ꢓꢕꢋꢅꢌD ꢂꢋꢌꢒꢀꢄꢍ ꢒꢁ
ꢈ
ꢟ ꢀꢠꢠꢡꢗꢢ θ ꢟ ꢀꢂꢠꢡꢗꢣꢎ ꢤꢐꢄꢥ
ꢀ
ꢙ ꢚꢚꢛꢜꢍꢝ θ ꢙ ꢚꢞꢛꢜꢍꢟꢆ
ꢖꢗꢌꢘ ꢖꢌ
ꢜꢝꢖꢞ
ꢜꢖ
ORDER INFORMATION
http://www.linear.com/product/LT1016#orderinfo
LEAD FREE FINISH
LT1016CN8#PBF
LT1016IN8#PBF
LT1016CS8#PBF
LT1016IS8#PBF
TAPE AND REEL
PART MARKING
LT1016CN8
LT1016IN8
1016
PACKAGE DESCRIPTION
8-Lead PDIP
TEMPERATURE RANGE
0°C to 70°C
LT1016CN#TRPBF
LT1016IN#TRPBF
LT1016CS8#TRPBF
LT1016IS8#TRPBF
8-Lead PDIP
–40°C to 85°C
0°C to 70°C
8-Lead Plastic SO
8-Lead Plastic SO
1016I
–40°C to 85°C
Consult ADI Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
Rev D
2
For more information www.analog.com
LT1016
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 5V, V– = 5V, VOUT (Q) = 1.4V, VLATCH = 0V, unless otherwise noted.
LT1016C/I
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Input Offset Voltage
R ≤ 100Ω (Note 2)
1.0
3
mV
mV
OS
S
●
●
3.5
∆V /∆T
Input Offset Voltage Drift
Input Offset Current
4
µV/°C
OS
I
OS
(Note 2)
(Note 3)
0.3
0.3
1.0
1.3
µA
µA
●
●
I
B
Input Bias Current
5
10
13
µA
µA
Input Voltage Range
(Note 6)
Single 5V Supply
●
●
–3.75
1.25
3.5
3.5
V
V
CMRR
PSRR
Common Mode Rejection
Supply Voltage Rejection
–3.75V ≤ V ≤ 3.5V
●
●
80
60
96
75
dB
dB
CM
+
Positive Supply 4.6V ≤ V ≤ 5.4V
LT1016C
+
Positive Supply 4.6V ≤ V ≤ 5.4V
●
●
54
75
dB
LT1016I
–
Negative Supply 2V ≤ V ≤ 7V
80
100
dB
A
V
Small-Signal Voltage Gain
Output High Voltage
1V ≤ V
≤ 2V
1400
3000
V/V
V
OUT
+
V ≥ 4.6V
I
I
=1mA
= 10mA
●
●
2.7
2.4
3.4
3.0
V
V
OH
OUT
OUT
V
Output Low Voltage
I
I
= 4mA
= 10mA
●
0.3
0.4
0.5
V
V
OL
SINK
SINK
+
I
I
Positive Supply Current
Negative Supply Current
LATCH Pin Hi Input Voltage
LATCH Pin Lo Input Voltage
LATCH Pin Current
●
●
●
●
●
25
3
35
5
mA
mA
V
–
V
V
2.0
IH
0.8
V
IL
I
t
V
= 0V
500
µA
IL
PD
LATCH
Propagation Delay (Note 4)
∆V = 100mV, OD = 5mV
10
9
14
16
ns
ns
IN
●
●
∆V = 100mV, OD = 20mV
12
15
ns
ns
IN
∆t
Differential Propagation Delay
Latch Setup Time
(Note 4) ∆V = 100mV,
3
ns
PD
IN
OD = 5mV
2
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
limits shown can be guaranteed with this test if additional DC tests are
performed to guarantee that all internal bias conditions are correct. For low
overdrive conditions V is added to overdrive. Differential propogation
OS
delay is defined as: ∆t = t
– t
PD
PDLH
PDHL
Note 2: Input offset voltage is defined as the average of the two voltages
measured by forcing first one output, then the other to 1.4V. Input offset
current is defined in the same way.
Note 5: Electrical specifications apply only up to 5.4V.
Note 6: Input voltage range is guaranteed in part by CMRR testing and
in part by design and characterization. See text for discussion of input
voltage range for supplies other than 5V or 5V.
Note 3: Input bias current (I ) is defined as the average of the two input
B
currents.
Note 7: This parameter is guaranteed to meet specified performance
Note 4: t and ∆t cannot be measured in automatic handling equipment
through design and characterization. It has not been tested.
PD
PD
with low values of overdrive. The LT1016 is sample tested with a 1V step
and 500mV overdrive. Correlation tests have shown that t and ∆t
PD
PD
Rev D
3
For more information www.analog.com
LT1016
TYPICAL PERFORMANCE CHARACTERISTICS
Propagation Delay vs Input
Overdrive
Propagation Delay vs Load
Capacitance
Gain Characteristics
ꢌꢍ
ꢌꢇ
ꢎꢍ
ꢎꢇ
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ꢒꢎ
ꢔꢓ
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ꢓ
ꢏꢐꢑ
ꢒꢐꢏ
ꢒꢐꢑ
ꢓꢐꢏ
ꢓꢐꢑ
ꢔꢐꢏ
ꢔꢐꢑ
ꢕꢐꢏ
ꢕꢐꢑ
ꢑꢐꢏ
ꢑ
ꢁ ꢔ
ꢕ
ꢍꢁ
ꢈ ꢔ ꢌꢍꢖꢗ
ꢙ
ꢛ
ꢓꢙ
ꢉ
ꢊꢈꢄ
ꢙ
ꢏꢉ
ꢙ ꢑ
ꢓ
ꢚ
ꢜ
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ꢜ
ꢀ
ꢄ ꢙ ꢕꢔꢏꢚꢛ
ꢘ
ꢁ
ꢓꢈꢂꢘ
ꢗ
ꢙꢀꢚD
ꢔ ꢎꢇꢇꢅꢁ
ꢔ ꢎꢇꢛꢜ
ꢇ
ꢛ ꢎ
ꢀꢁꢂ
ꢙ
ꢛ ꢔꢎꢎꢞꢙ
ꢚꢂꢉꢃ
ꢀꢙꢉRDRꢇꢙꢉ ꢛ ꢓꢞꢙ
ꢄ ꢙ ꢔꢏꢚꢛ
ꢘ
ꢟ
ꢃDꢠꢄ
ꢟ
ꢃDꢄꢠ
ꢄ ꢙ ꢗꢏꢏꢚꢛ
ꢘ
ꢇ
ꢎ
ꢇ
ꢎꢇ
ꢌꢇ
ꢒꢇ
ꢏꢇ
ꢍꢇ
ꢗꢑꢐꢏ
ꢎ
ꢔꢎ
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ꢘꢎ
ꢕꢎ
ꢓꢎ
ꢗꢔꢐꢏ
ꢗꢕꢐꢏ
ꢑꢐꢏ
ꢕꢐꢏ
ꢔꢐꢏ
ꢀꢁꢂRDRꢃꢁꢂ ꢄꢅꢁꢆ
ꢀꢁꢂꢃꢁꢂ ꢄꢀꢅD ꢆꢅꢃꢅꢆꢇꢂꢅꢈꢆꢉ ꢊꢋꢌꢍ
DꢀꢁꢁꢂRꢂꢃꢄꢀꢅꢆ ꢀꢃꢇꢈꢄ ꢉꢊꢆꢄꢅꢋꢂ ꢌꢍꢉꢎ
ꢎꢇꢎꢐ ꢑꢇꢌ
ꢔꢎꢔꢖ ꢗꢎꢘ
ꢕꢑꢕꢖ ꢋꢑꢕ
Propagation Delay vs Source
Resistance
Propagation Delay vs Supply
Voltage
Propagation Delay vs
Temperature
ꢓꢔ
ꢓꢕ
ꢖꢔ
ꢖꢕ
ꢔ
ꢓꢐ
ꢔꢏ
ꢔꢐ
ꢕꢏ
ꢕꢐ
ꢏ
80
70
60
50
40
30
20
10
0
ꢝ
V
= 5V
ꢅ
ꢞ ꢝꢔꢅ
S
ꢞ
ꢟ ꢏꢞ
ꢝ
T = 25°C
J
ꢄ ꢞ ꢓꢔꢠꢡ
ꢟ
ꢆꢞꢇRDRꢅꢞꢇ ꢟ ꢏꢠꢞ
ꢝꢄꢇꢉ ꢝꢅꢡꢇ ꢟ ꢕꢐꢐꢠꢞ
OVERDRIVE = 20mV
EQUIVALENT INPUT
CAPACITANCE IS ≈ 3.5pF
ꢅ
ꢞ ꢖꢕꢕꢢꢅ
ꢂꢄꢆꢀ
ꢁꢅꢆRDRꢃꢅꢆ ꢞ ꢔꢢꢅ
ꢞ ꢖꢕꢣꢙ
ꢃ
ꢟ ꢕꢐꢢꢙ
ꢚꢆꢊD
ꢡ
ꢈꢁꢊD
C
= 10pF
LOAD
STEP SIZE = 800mV
400mV
ꢙꢊꢈꢈꢃꢚꢋ ꢆDꢋꢆ ꢛ
200mV
100mV
ꢀDꢜꢈ
ꢙꢊꢚꢚꢅꢂꢘ ꢆꢁꢄꢉꢁꢄ ꢛ
ꢉDꢜꢚ
Rꢃꢂꢃꢚꢋ ꢆDꢋꢆ ꢛ
ꢀDꢈꢜ
Rꢅꢝꢅꢂꢘ ꢆꢁꢄꢉꢁꢄ ꢛ
ꢉDꢚꢜ
ꢕ
ꢐ
ꢏꢐ
ꢕꢐꢐ ꢕꢔꢏ
ꢎꢏꢎ
ꢎꢏꢘ
ꢔꢏꢕ
ꢔꢏꢓ
ꢔꢏꢎ
ꢔꢏꢗ
ꢎꢏꢐ ꢎꢔꢏ
ꢐ
ꢔꢏ
ꢖꢏ
2.5k
ꢎꢏꢗ
0
500
1k
1.5k
2k
3k
ꢀꢁꢂꢃꢄꢃꢅꢆ ꢂꢇꢀꢀꢈꢉ ꢅꢁꢈꢄꢊꢋꢆ ꢌꢅꢍ
SOURCE RESISTANCE (Ω)
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇRꢊꢄꢁRꢇ ꢋꢌꢃꢍ
ꢖꢕꢖꢗ ꢋꢕꢔ
ꢕꢐꢕꢗ ꢘꢐꢗ
1016 G04
Latch Set-Up Time vs
Temperature
Output Low Voltage (VOL) vs
Output Sink Current
Output High Voltage (VOH) vs
Output Source Current
ꢓ
ꢔ
ꢎꢒꢓ
ꢎꢒꢔ
ꢎꢒꢕ
ꢎꢒꢖ
ꢎꢒꢗ
ꢎꢒꢘ
ꢎꢒꢙ
ꢎꢒꢚ
ꢎ
ꢐꢑꢌ
ꢒꢑꢐ
ꢒꢑꢌ
ꢓꢑꢐ
ꢓꢑꢌ
ꢔꢑꢐ
ꢔꢑꢌ
ꢕꢑꢐ
ꢕꢑꢌ
ꢙ
ꢅ
ꢛ
ꢆꢁꢄ
ꢏꢙ
ꢛ ꢐꢙ
ꢍ
ꢍ
ꢚ
ꢝꢇ
ꢐꢍ
ꢏ
ꢏ
ꢜ
ꢅꢆ
ꢖꢏ
ꢚ
ꢄ
ꢄ
ꢚ ꢜꢓꢌꢉꢍ
ꢜ ꢘꢎꢋꢏ
ꢂ
ꢚ ꢕꢔꢐꢛꢅ
ꢙ
ꢕ
ꢂ
ꢜ ꢞꢖꢖꢝꢈ
ꢛ
ꢂ
ꢚ ꢔꢐꢛꢅ
ꢙ
ꢐ
ꢂ
ꢜ ꢙꢖꢝꢈ
ꢛ
ꢂ
ꢚ ꢜꢐꢐꢛꢅ
ꢙ
ꢎꢕ
ꢎꢔ
ꢎꢓ
ꢂ
ꢗ
ꢜ ꢚꢙꢖꢝꢈ
ꢛ
ꢏꢐ
ꢗꢐꢐ ꢗꢕꢏ
ꢎꢏꢐ ꢎꢕꢏ
ꢐ
ꢕꢏ
ꢖꢏ
ꢎ
ꢙ
ꢕ
ꢓ
ꢚꢎ ꢚꢙ ꢚꢗ ꢚꢕ ꢚꢓ ꢙꢎ
ꢌ
ꢔ
ꢒ
ꢖ
ꢘ
ꢕꢌ ꢕꢔ ꢕꢒ ꢕꢖ ꢕꢘ ꢔꢌ
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇRꢊꢄꢁRꢇ ꢋꢌꢃꢍ
ꢀꢁꢂꢃꢁꢂ ꢄꢅꢆꢇ ꢈꢁRRꢉꢆꢂ ꢊꢋꢌꢍ
ꢀꢁꢂꢃꢁꢂ ꢄꢀꢁRꢅꢆ ꢅꢁRRꢆꢇꢂ ꢈꢉꢊꢋ
ꢗꢐꢗꢓ ꢘꢐꢖ
ꢚꢎꢚꢕ ꢑꢎꢓ
ꢕꢌꢕꢖ ꢏꢌꢗ
Rev D
4
For more information www.analog.com
LT1016
TYPICAL PERFORMANCE CHARACTERISTICS
Negative Supply Current vs
Temperature
Positive Supply Current vs
Positive Supply Voltage
Positive Supply Current vs
Switching Frequency
ꢒ
ꢏ
ꢓ
ꢔ
ꢕ
ꢖ
ꢐ
ꢑꢍ
ꢒꢑ
ꢒꢍ
ꢓꢑ
ꢓꢍ
ꢔꢑ
ꢔꢍ
ꢕꢑ
ꢕꢍ
ꢑ
ꢔꢕ
ꢖꢗ
ꢖꢕ
ꢘꢗ
ꢘꢕ
ꢑꢗ
ꢑꢕ
ꢗ
ꢅꢜ ꢚ ꢍꢅ
ꢃ ꢛ ꢑꢘꢗꢝꢄ
ꢙ
ꢅ
ꢛ
ꢆꢁꢄ
ꢏꢙ
ꢛ ꢐ
ꢚ
ꢚ
ꢅ
ꢆꢁꢇ
ꢚ ꢖꢍꢐꢅ
ꢝꢏ
ꢃ ꢛ ꢘꢗꢝꢄ
ꢚ
ꢝ
ꢚ ꢍ
ꢃ ꢛ ꢜꢗꢗꢝꢄ
ꢚ
ꢇ ꢚ ꢔꢑꢛꢎ
ꢙ
ꢇ ꢚ ꢕꢔꢑꢛꢎ
ꢙ
ꢞ
ꢞ
ꢟꢋꢃ
ꢛ ꢗꢞ
ꢀ
ꢛ ꢗꢕꢒꢞ
ꢂꢆ
ꢇ ꢚ ꢜꢑꢑꢛꢎ
ꢙ
ꢂ
ꢛ ꢕ
ꢍ
ꢕ
ꢏꢐ
ꢖꢐꢐ ꢖꢕꢏ
ꢎꢏꢐ ꢎꢕꢏ
ꢐ
ꢕꢏ
ꢗꢏ
ꢑ
ꢑꢕ
ꢀꢁꢂꢃꢄꢅꢂꢆꢇ ꢈRꢉꢊꢋꢉꢆꢄꢌ ꢍꢎꢅꢏꢐ
ꢑꢕꢕ
ꢍ
ꢒ
ꢖ
ꢗ
ꢕ
ꢔ
ꢓ
ꢑ
ꢘ
ꢀꢁꢂꢃꢄꢅꢆꢂ ꢄꢇꢈꢉꢇRꢊꢄꢁRꢇ ꢋꢌꢃꢍ
ꢀꢁꢂꢂꢃꢄ ꢅꢆꢃꢇꢈꢉꢊ ꢋꢅꢌ
ꢑꢕꢑꢙ ꢇꢑꢘ
ꢖꢐꢖꢒ ꢘꢖꢐ
ꢕꢍꢕꢖ ꢉꢕꢕ
Common Mode Rejection vs
Frequency
Positive Common Mode Limit vs
Temperature
Negative Common Mode Limit vs
Temperature
ꢋꢕꢌ
ꢋꢋꢌ
ꢋꢌꢌ
ꢖꢌ
ꢔ
ꢏ
ꢕ
ꢖ
ꢗ
ꢘ
ꢐ
ꢔ
ꢕ
ꢟ
ꢟ
ꢎ
ꢡ
ꢐꢄ
ꢏ ꢡ ꢕꢚꢤꢅ
ꢚꢟ
ꢢꢣꢢ
ꢑ ꢛ ꢏꢑꢜ
ꢚ
ꢠ
ꢑ
ꢛ ꢚꢅꢂꢓꢒꢇ ꢏꢑ ꢚꢁꢉꢉꢒꢝ
ꢚ
ꢡ ꢕꢟ
ꢐ
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ꢘꢐꢘꢔ ꢓꢘꢕ
ꢕꢐꢕꢙ ꢓꢕꢏ
LATCH Pin Threshold vs
Temperature
LATCH Pin Current* vs
Temperature
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ꢗꢐꢗꢖ ꢓꢗꢖ
ꢓꢐꢓꢕ ꢖꢓꢔ
Rev D
5
For more information www.analog.com
LT1016
APPLICATIONS INFORMATION
Common Mode Considerations
Input capacitance is typically 3.5pF. This is measured by
inserting a 1k resistor in series with the input and measur-
ing the resultant change in propagation delay.
The LT1016 is specified for a common mode range of
–3.75V to 3.5V with supply voltages of 5V. A more
general consideration is that the common mode range
is 1.25V above the negative supply and 1.5V below the
positive supply, independent of the actual supply voltage.
The criteria for common mode limit is that the output still
responds correctly to a small differential input signal.
Either input may be outside the common mode limit (up
to the supply voltage) as long as the remaining input is
within the specified limit, and the output will still respond
correctly. There is one consideration, however, for inputs
that exceed the positive common mode limit. Propagation
delay will be increased by up to 10ns if the signal input
is more positive than the upper common mode limit and
then switches back to within the common mode range.
This effect is not seen for signals more negative than the
lower common mode limit.
LATCH Pin Dynamics
The LATCH pin is intended to retain input data (output
latched) when the LATCH pin goes high. This pin will
float to a high state when disconnected, so a flowthrough
condition requires that the LATCH pin be grounded. To
guarantee data retention, the input signal must be valid at
least 5ns before the latch goes high (setup time) and must
remain valid at least 3ns after the latch goes high (hold
time). When the latch goes low, new data will appear at
the output in approximately 8ns to 10ns. The LATCH pin
is designed to be driven with TTL or CMOS gates. It has
no built-in hysteresis.
Measuring Response Time
The LT1016 is able to respond quickly to fast low level
signals because it has a very high gain-bandwidth prod-
uct (≈50GHz), even at very high frequencies. To properly
measure the response of the LT1016 requires an input
signal source with very fast rise times and exceptionally
cleansettlingcharacteristics.Thislastrequirementcomes
about because the standard comparator test calls for an
input step size that is large compared to the overdrive
amplitude. Typical test conditions are 100mV step size
with only 5mV overdrive. This requires an input signal
that settles to within 1% (1mV) of final value in only a few
nanoseconds with no ringing or “long tailing.” Ordinary
high speed pulse generators are not capable of generating
such a signal, and in any case, no ordinary oscilloscope
is capable of displaying the waveform to check its fidelity.
Some means must be used to inherently generate a fast,
clean edge with known final value.
Input Impedance and Bias Current
Input bias current is measured with the output held at
1.4V. As with any simple NPN differential input stage, the
LT1016 bias current will go to zero on an input that is low
and double on an input that is high. If both inputs are less
–
than 0.8V above V , both input bias currents will go to
zero. If either input exceeds the positive common mode
limit, input bias current will increase rapidly, approaching
+
several milliamperes at V = V .
IN
Differential input resistance at zero differential input
voltage is about 10kΩ, rapidly increasing as larger DC
differential input signals are applied. Common mode
input resistance is about 4MΩ with zero differential input
voltage. Withlargedifferentialinputsignals, thehighinput
will have an input resistance of about 2MΩ and the low
input greater than 20MΩ.
Rev D
6
For more information www.analog.com
LT1016
APPLICATIONS INFORMATION
The circuit shown in Figure 1 is the best electronic means
ofgeneratingaknownfast,cleansteptotestcomparators.
It uses a very fast transistor in a common base configura-
tion. The transistor is switched “off” with a fast edge from
thegeneratorandthecollectorvoltagesettlestoexactly0V
in just a few nanoseconds. The most important feature of
this circuit is the lack of feedthrough from the generator
to the comparator input. This prevents overshoot on the
comparator input that would give a false fast reading on
comparator response time.
initslinearregion, afeaturenootherhighspeedcompara-
tor has. Additionally, output stage switching does not ap-
preciablychangepowersupplycurrent, furtherenhancing
stability.Thesefeaturesmaketheapplicationofthe50GHz
gain-bandwidth LT1016 considerably easier than other
fast comparators. Unfortunately, laws of physics dictate
that the circuit environment the LT1016 works in must be
properly prepared. The performance limits of high speed
circuitry are often determined by parasitics such as stray
capacitance,groundimpedanceandlayout.Someofthese
considerationsarepresentindigitalsystemswheredesign-
ers are comfortable describing bit patterns and memory
access times in terms of nanoseconds. The LT1016 can
be used in such fast digital systems and Figure 2 shows
just how fast the device is. The simple test circuit allows
us to see that the LT1016’s (Trace B) response to the pulse
generator (Trace A) is as fast as a TTL inverter (Trace C)
even when the LT1016 has only millivolts of input signal!
Linearcircuitsoperatingwiththiskindofspeedmakemany
engineers justifiably wary. Nanosecond domain linear
circuits are widely associated with oscillations, mysteri-
ous shifts in circuit characteristics, unintended modes of
operation and outright failure to function.
To adjust this circuit for exactly 5mV overdrive, V1 is
adjusted so that the LT1016 output under test settles to
1.4V (in the linear region). Then V1 is changed –5V to set
overdrive at 5mV.
The test circuit shown measures low to high transition
on the “+” input. For opposite polarity transitions on the
output, simply reverse the inputs of the LT1016.
High Speed Design Techniques
AsubstantialamountofdesignefforthasmadetheLT1016
relatively easy to use. It is much less prone to oscillation
and other vagaries than some slower comparators, even
with slow input signals. In particular, the LT1016 is stable
5V 0.01µF**
0V
–100mV
25Ω
Q
Q
10X SCOPE PROBE
IN
+
–
(C ≈ 10pF)
LT1016
L
130Ω
0.1µF
50Ω
25Ω
10k
V1†
10X SCOPE PROBE
(C ≈ 10pF)
2N3866
750Ω
IN
PULSE
IN
10Ω
–5V
0V
–3V
0.01µF
400Ω
–5V
* SEE TEXT FOR CIRCUIT EXPLANATION
** TOTAL LEAD LENGTH INCLUDING DEVICE PIN.
SOCKET AND CAPACITOR LEADS SHOULD BE
LESS THAN 0.5 IN. USE GROUND PLANE
1016 F01
†
(V + OVERDRIVE) • 1000
OS
Figure 1. Response Time Test Circuit
Rev D
7
For more information www.analog.com
LT1016
APPLICATIONS INFORMATION
Other common problems include different measurement
results using various pieces of test equipment, inability
to make measurement connections to the circuit without
inducing spurious responses and dissimilar operation
between two “identical” circuits. If the components used
in the circuit are good and the design is sound, all of the
above problems can usually be traced to failure to pro-
vide a proper circuit “environment.” To learn how to do
this requires studying the causes of the aforementioned
difficulties.
several devices connected to an unbypassed supply can
“communicate” through the finite supply impedances,
causingerraticmodes.Bypasscapacitorsfurnishasimple
way to eliminate this problem by providing a local reser-
voir of energy at the device. The bypass capacitor acts
like an electrical flywheel to keep supply impedance low
at high frequencies. The choice of what type of capaci-
tors to use for bypassing is a critical issue and should be
approached carefully. An unbypassed LT1016 is shown
responding to a pulse input in Figure 3. The power supply
the LT1016 sees at its terminals has high impedance at
high frequency. This impedance forms a voltage divider
with the LT1016, allowing the supply to move as internal
conditions in the comparator change. This causes local
feedback and oscillation occurs. Although the LT1016
responds to the input pulse, its output is a blur of 100MHz
oscillation. Always use bypass capacitors.
By far the most common error involves power supply
bypassing. Bypassing is necessary to maintain low sup-
ply impedance. DC resistance and inductance in supply
wires and PC traces can quickly build up to unacceptable
levels. This allows the supply line to move as internal
current levels of the devices connected to it change. This
will almost always cause unruly operation. In addition,
TEST CIRCUIT
7404
TRACE A
5V/DIV
PULSE
GENERATOR
1k
OUTPUTS
10Ω
+
TRACE B
5V/DIV
LT1016
–
TRACE C
5V/DIV
V
REF
10ns/DIV
1016 F02
Figure 2. LT1016 vs a TTL Gate
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ꢄꢅꢅꢆꢇꢂDꢃꢁ
ꢄꢅꢄꢈ ꢉꢅꢊ
Figure 3. Unbypassed LT1016 Response
Rev D
8
For more information www.analog.com
LT1016
APPLICATIONS INFORMATION
In Figure 4 the LT1016’s supplies are bypassed, but it still
oscillates. In this case, the bypass units are either too far
fromthedeviceorarelossycapacitors.Usecapacitorswith
good high frequency characteristics and mount them as
close as possible to the LT1016. An inch of wire between
the capacitor and the LT1016 can cause problems. If op-
eration in the linear region is desired, the LT1016 must
be over a ground plate with good RF bypass capacitors
(≥0.01µF) having lead lengths less than 0.2 inches. Do
not use sockets.
in high speed circuits and can be quite confusing. It is
not due to suspension of natural law, but is traceable to
a grossly miscompensated or improperly selected oscil-
loscopeprobe. Useprobesthatmatchyouroscilloscope’s
input characteristics and compensate them properly.
Figure 6 shows another probe-induced problem. Here,
the amplitude seems correct but the 10ns response time
LT1016 appears to have 50ns edges! In this case, the
probe used is too heavily compensated or slow for the
oscilloscope. Never use 1× or “straight” probes. Their
bandwidth is 20MHz or less and capacitive loading is
high. Check probe bandwidth to ensure it is adequate for
the measurement. Similarly, use an oscilloscope with
adequate bandwidth.
In Figure 5 the device is properly bypassed but a new
problem pops up. This photo shows both outputs of the
comparator. TraceAappearsnormal, butTraceBshowsan
excursion of almost 8V—quite a trick for a device running
from a 5V supply. This is a commonly reported problem
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ꢄꢅꢄꢈ ꢉꢅꢊ
ꢄꢅꢅꢆꢇꢂDꢃꢁ
Figure 4. LT1016 Response with Poor Bypassing
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ꢀꢁꢂDꢃꢁ
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ꢄꢅꢆDꢇꢅ
ꢀꢅꢀꢈ ꢉꢅꢈ
ꢉꢊꢉꢍ ꢎꢊꢏ
ꢄꢅꢆꢇꢂDꢃꢁ
ꢉꢊꢋꢌꢆDꢇꢅ
Figure 5. Improper Probe Compensation Causes
Seemingly Unexplainable Amplitude Error
Figure 6. Overcompensated or Slow Probes
Make Edges Look Too Slow
Rev D
9
For more information www.analog.com
LT1016
APPLICATIONS INFORMATION
In Figure 7 the probes are properly selected and applied
but the LT1016’s output rings and distorts badly. In this
case, the probe ground lead is too long. For general pur-
pose work most probes come with ground leads about six
inches long. At low frequencies this is fine. At high speed,
the long ground lead looks inductive, causing the ringing
shown.Highqualityprobesarealwayssuppliedwithsome
shortgroundstrapstodealwiththisproblem. Somecome
with very short spring clips which fix directly to the probe
tip to facilitate a low impedance ground connection. For
fast work, the ground connection to the probe should not
exceed one inch in length. Keep the probe ground con-
nection as short as possible.
supplies. The inductance created by a long device ground
leadpermitsmixingofgroundcurrents,causingundesired
effects in the device. The solution here is simple. Keep the
LT1016’s ground pin connection as short (typically 1/4
inch) as possible and run it directly to a low impedance
ground. Do not use sockets.
Figure 9 addresses the issue of the “low impedance
ground,” referred to previously. In this example, the
output is clean except for chattering around the edges.
This photograph was generated by running the LT1016
without a “ground plane.” A ground plane is formed by
using a continuous conductive plane over the surface of
the circuit board. The only breaks in this plane are for the
circuit’snecessarycurrentpaths.Thegroundplaneserves
two functions. Because it is flat (AC currents travel along
the surface of a conductor) and covers the entire area of
the board, it provides a way to access a low inductance
ground from anywhere on the board. Also, it minimizes
the effects of stray capacitance in the circuit by referring
them to ground. This breaks up potential unintended and
harmfulfeedbackpaths.Alwaysuseagroundplanewiththe
LT1016 when input signal levels are low or slow moving.
Figure 8 shows the LT1016’s output (Trace B) oscillating
near 40MHz as it responds to an input (Trace A). Note that
the input signal shows artifacts of the oscillation. This
example is caused by improper grounding of the com-
parator. In this case, the LT1016’s GND pin connection is
one inch long. The ground lead of the LT1016 must be as
shortaspossibleandconnecteddirectlytoalowimpedance
ground point. Any substantial impedance in the LT1016’s
ground path will generate effects like this. The reason for
this is related to the necessity of bypassing the power
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ꢀꢅꢀꢈ ꢉꢅꢊ
ꢄꢅꢆꢇꢂDꢃꢁ
Figure 7. Typical Results Due to Poor Probe Grounding
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ꢄꢅꢆDꢇꢅ
ꢀRꢁꢂꢃ ꢈ
ꢉꢅꢆDꢇꢅ
ꢀꢁꢂDꢃꢁ
ꢄꢅꢄꢈ ꢉꢅꢊ
ꢄꢅꢅꢆꢇꢂDꢃꢁ
ꢄꢊꢄꢍ ꢎꢊꢏ
ꢄꢊꢊꢋꢌꢆDꢇꢅ
Figure 8. Excessive LT1016 Ground Path
Resistance Causes Oscillation
Figure 9. Transition Instabilities Due to No Ground Plane
Rev D
10
For more information www.analog.com
LT1016
APPLICATIONS INFORMATION
“Fuzz” on the edges is the difficulty in Figure 10. This
condition appears similar to Figure 10, but the oscillation
is more stubborn and persists well after the output has
gone low. This condition is due to stray capacitive feed-
back from the outputs to the inputs. A 3kΩ input source
impedance and 3pF of stray feedback allowed this oscil-
lation. The solution for this condition is not too difficult.
Keep source impedances as low as possible, preferably
1k or less. Route output and input pins and components
away from each other.
of 2k source resistance and 10pF to ground gives a 20ns
time constant—significantly longer than the LT1016’s
responsetime.Keepsourceimpedanceslowandminimize
stray input capacitance to ground.
Figure 12 shows another capacitance related problem.
Here the output does not oscillate, but the transitions
are discontinuous and relatively slow. The villain of this
situation is a large output load capacitance. This could
be caused by cable driving, excessive output lead
length or the input characteristics of the circuit being
driven. In most situations this is undesirable and may be
eliminated by buffering heavy capacitive loads. In a few
circumstances it may not affect overall circuit operation
and is tolerable. Consider the comparator’s output load
characteristics and their potential effect on the circuit. If
necessary, buffer the load.
The opposite of stray-caused oscillations appears in
Figure 11. Here, the output response (Trace B) badly lags
the input (Trace A). This is due to some combination of
high source impedance and stray capacitance to ground
at the input. The resulting RC forces a lagged response
at the input and output delay occurs. An RC combination
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ꢈꢅꢈꢉ ꢊꢈꢅ
ꢄꢅꢆꢇꢂDꢃꢁ
Figure 10. 3pF Stray Capacitive Feedback
with 3kΩ Source Can Cause Oscillation
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ꢄꢅꢆDꢇꢅ
ꢀꢁꢂDꢃꢁ
ꢀRꢁꢂꢃ ꢈ
ꢄꢅꢆDꢇꢅ
ꢉꢊꢉꢍ ꢎꢉꢉ
ꢄꢅꢄꢈ ꢉꢄꢀ
ꢉꢊꢋꢌꢆDꢇꢅ
ꢄꢅꢅꢆꢇꢂDꢃꢁ
Figure 11. Stray 5pF Capacitance from
Input to Ground Causes Delay
Figure 12. Excessive Load Capacitance Forces Edge Distortion
Rev D
11
For more information www.analog.com
LT1016
APPLICATIONS INFORMATION
Another output-caused fault is shown in Figure 13. The
output transitions are initially correct but end in a ringing
condition. The key to the solution here is the ringing. What
is happening is caused by an output lead that is too long.
The output lead looks like an unterminated transmission
line at high frequencies and reflections occur. This ac-
counts for the abrupt reversal of direction on the leading
edge and the ringing. If the comparator is driving TTL this
may be acceptable, but other loads may not tolerate it. In
this instance, the direction reversal on the leading edge
might cause trouble in a fast TTL load. Keep output lead
lengths short. If they get much longer than a few inches,
terminate with a resistor (typically 250Ω to 400Ω).
200ns-0.01% Sample-and-Hold Circuit
Figure 14’s circuit uses the LT1016’s high speed to
improve upon a standard circuit function. The 200ns
acquisition time is well beyond monolithic sample-and-
hold capabilities. Other specifications exceed the best
commercial unit’s performance. This circuit also gets
around many of the problems associated with standard
sample-and-holdapproaches,includingFETswitcherrors
and amplifier settling time. To achieve this, the LT1016’s
high speed is used in a circuit which completely abandons
traditional sample-and-hold methods.
Important specifications for this circuit include:
Acquisition Time
Common Mode Input Range
Droop
<200ns
3V
1µV/µs
2mV
Hold Step
Hold Settling Time
Feedthrough Rejection
15ns
ꢀꢁꢂDꢃꢁ
>>100dB
When the sample-and-hold line goes low, a linear ramp
starts just below the input level and ramps upward. When
therampvoltagereachestheinputvoltage,A1shutsoffthe
ramp, latches itself off and sends out a signal indicating
sampling is complete.
ꢀꢅꢀꢈ ꢉꢀꢊ
ꢄꢅꢆꢇꢂDꢃꢁ
Figure 13. Lengthy, Unterminated Output Lines
Ring from Reflections
5V
390Ω
5.1k
470Ω 100Ω
1N4148
1k
1N4148
100Ω
1k
DELAY
COMP
Q2
2N2907A
Q1
2N5160
8pF
–
Q7
5.1k
1.5k
0.1µF
A1
2N5486
LT1016
NOW
1000pF
+
(POLYSTYRENE)
Q3
SN7402
SN7402
2N2369
LATCH
Q6
2N2222
220Ω
INPUT
3V
Q5
2N2222
390Ω
820Ω
1N4148
1.5k
1.5k
SN7402
LT1009
2.5V
100Ω
300Ω
Q4
2N2907A
SAMPLE-HOLD
COMMAND (TTL)
–5V
1016 F14
–15V
OUTPUT
Figure 14. 200ns Sample-and-Hold
Rev D
12
For more information www.analog.com
LT1016
APPLICATIONS INFORMATION
1.8µs, 12-Bit A/D Converter
The LT1016’s high speed is used to implement a very fast
12-bit A/D converter in Figure 15. The circuit is a modified
form of the standard successive approximation approach
andisfasterthanmostcommercialSAR12-bitunits.Inthis
arrangement the 2504 successive approximation register
(SAR), A1 and C1 test each bit, beginning with the MSB,
To get faster conversion time, the clock is controlled
by the window comparator monitoring the DAC input
summing junction. Additionally, the DMOS FET clamps
the DAC output to ground at the beginning of each clock
cycle, shortening DAC settling time. After the fifth bit is
converted, the clock runs at maximum speed.
and produce a digital word representing V ’s value.
IN
5V
2.5k
0.01µF
5V
–5V
–5V
150Ω 620Ω*
620Ω*
V
IN
0V TO 10V
2.5k**
1k
–
+
1k
C1
LT1016
1000pF
10V
LT1021
10V
5V
NC
Q3
10k** 10k
15V
20
–15V
17
14
15
–
13
GND
19
1k
+
+
–
V
V
R
I
V
V
R
O
0.01µF
16
18
I
O
Q1 Q2
–15V
COMP
AM6012
SD210
5V
150k
15k
PARALLEL
DIGITAL
DATA
5V
9
LSB
MSB
24
27k
–15V
OUTPUT
Q6
+
5V
V
6
11
AM2504
D
74121
Q
7
13
Q4
CLK
GND
12
E
S
CC
3
IN B
5
4
150k
1
14
3
Q5
1/4 74S00
STATUS
5V
5V
1k
–
NC
C3
LT1016
0.1µF
10Ω
+
1/4 74S00
1/4 74S08
1/4 74S08
D
Q
–5V
5V
1/2 74S74
CLK
–5V
1k
PRS
PRS
+
Q1 TO Q5 RCA CA3127 ARRAY
1N4148
C2
LT1016
1/2 74S74
RST
NC
–
HP5082-2810
1/6 74S04 1/6 74S04
CLOCK
*1% FILM RESISTOR
**PRECISION 0.01%; VISHAY S-102
0.1µF
10Ω
–5V
CONVERT
COMMAND
1016 F15
7.4MHz
Figure 15. 12-Bit 1.8µs SAR A-to-D
Rev D
13
For more information www.analog.com
LT1016
TYPICAL APPLICATIONS
Voltage Controlled Pulse Width Generator
5V
FULL-SCALE
CALIBRATION
500Ω
LM385
1.23V
2N3906
1k
25Ω
2N3906
100pF
2k
1000pF
5V
2.7k
+
LT1016
–5V
START
V
= 0V TO 2.5V
–
5V
IN
C
B
EXT
Q
74121
A1
1k
Q
1N914
2N3906
0µs TO 2.5µs
(MINIMUM
WIDTH ≈ 0.05µs)
470pF
8.2k
1016 AI01
–5V
Single Supply Precision RC 1MHz Oscillator
ꢏꢙꢚꢔꢛ
ꢊꢉ
ꢍꢎꢎꢋꢌ
Q
ꢀ
ꢁ
ꢄꢆꢍꢎꢍꢏ
ꢘ
ꢂꢃD
ꢄꢅꢆꢇꢈ
ꢀ
ꢉ
ꢍꢎꢔ
ꢍꢕ
ꢊꢋꢌ
ꢊꢉ
ꢖꢗꢈꢇꢎꢗ
ꢍꢎꢔ
ꢍꢕ
ꢍꢎꢔ
ꢍꢕ
ꢐꢑꢆꢒꢑꢆꢓ
ꢛ ꢓꢝꢄꢝꢇꢆ ꢐR ꢆRꢜꢞ ꢌꢐR ꢟ ꢠ ꢍꢙꢎꢎꢞꢈꢡ
ꢍꢎꢍꢏ ꢅꢜꢎꢚ
Rev D
14
For more information www.analog.com
LT1016
TYPICAL APPLICATIONS
50MHz Fiber Optic Receiver with Adaptive Trigger
5V
3k
10k
–
–
0.005µF
22M
+
LT1097
LT1220
500pF
+
+
LT1223
330Ω
–
1k
22M
0.005µF
0.1µF
+
–
50Ω
OUTPUT
LT1016
= HP 5082-4204
NPN = 2N3904
PNP = 2N3906
3k
–5V
1016 AI03
1MHz to 10MHz Crystal Oscillator
ꢘꢒ
ꢄꢓꢑꢔ ꢃꢕ ꢄꢅꢓꢑꢔ
ꢋꢌ
ꢐRꢖꢗꢃꢏꢂ
ꢘꢒ
ꢁ
ꢒ
ꢙ
ꢁ
ꢂꢃꢄꢅꢄꢆ
ꢋꢌ
ꢕꢜꢃꢝꢜꢃ
ꢀ
Q
ꢍꢎD
ꢂꢏꢃꢐꢑ
ꢀ
ꢒ
ꢋꢌ
ꢅꢇꢅꢆꢈꢉꢊ
ꢄꢅꢄꢆ ꢏꢚꢅꢛ
Rev D
15
For more information www.analog.com
LT1016
TYPICAL APPLICATIONS
18ns Fuse with Voltage Programmable Trip Point
Q1
2N3866
28V
1k*
9k*
330Ω
2.4k
+
Q2
2N2369
–5V
10Ω
CARBON
A1
LT1193
9k*
1k*
–
900Ω
FB
200Ω
300Ω
33pF
CALIBRATE
+
A2
LT1016
1k
TRIP SET
0mA TO 250mA = 0V TO 2.5V
–
L
* = 1% FILM RESISTOR
A1 AND A2 USE 5V SUPPLIES
RESET (NORMALLY OPEN)
LOAD
1016 AI05
APPENDIX A
About Level Shifts
The TTL output of the LT1016 will interface with many
circuitsdirectly.Manyapplications,however,requiresome
form of level shifting of the output swing. With LT1016
based circuits this is not trivial because it is desirable to
maintain very low delay in the level shifting stage. When
designinglevelshifters,keepinmindthattheTTL outputof
theLT1016isasink-sourcepair(FigureA1)withgoodabil-
ity to drive capacitance (such as feedforward capacitors).
transistor’s supplies. This 3ns delay stage is ideal for
driving FET switch gates. Q1, a gated current source,
switches the Baker-clamped output transistor, Q2. The
heavy feedforward capacitor from the LT1016 is the key
to low delay, providing Q2’s base with nearly ideal drive.
This capacitor loads the LT1016’s output transition (Trace
A, Figure A4), but Q2’s switching is clean (Trace B, Figure
A4) with 3ns delay on the rise and fall of the pulse.
Figure A2 shows a noninverting voltage gain stage with a
15V output. When the LT1016 switches, the base-emitter
voltages at the 2N2369 reverse, causing it to switch very
quickly. The 2N3866 emitter-follower gives a low imped-
ance output and the Schottky diode aids current sink
capability.
FigureA5issimilartoFigureA2exceptthatasinktransistor
hasreplacedtheSchottkydiode.Thetwoemitter-followers
drive a power MOSFET which switches 1A at 15V. Most of
the 7ns to 9ns delay in this stage occurs in the MOSFET
and the 2N2369.
Whendesigninglevelshifters,remembertousetransistors
Figure A3 is a very versatile stage. It features a bipolar
swing that may be programmed by varying the output
with fast switching times and high f s. To get the kind of
T
results shown, switching times in the ns range and f s
T
approaching 1GHz are required.
Rev D
16
For more information www.analog.com
LT1016
APPENDIX A
ꢄꢓꢘ
ꢄꢏ
ꢐꢉ
ꢇꢈꢇꢉꢆꢊ
ꢇꢈꢉꢋꢆꢆ
ꢁ
ꢀ
ꢑꢒꢓꢅꢋꢇꢔꢇꢋꢄꢅ
ꢅꢆꢁꢇꢆꢁ ꢈ ꢃꢉ ꢁꢅ
ꢁꢊꢇꢋꢌꢍꢀꢀꢊ ꢎꢉ ꢁꢅ ꢏꢉ
ꢂꢃꢄꢅꢄꢆ
ꢕꢖꢃꢒꢖꢃ
ꢄꢏ
ꢄꢏ
ꢈꢕꢈꢗꢈꢘꢙRꢃꢗꢈꢚ
ꢘꢕꢂꢃꢎꢚꢙ ꢚꢎꢗꢈ
ꢄꢇꢐꢍ
ꢂꢃꢂꢄ ꢑꢍꢃꢂ
ꢀꢁꢂꢃꢂꢄ ꢅꢆꢁꢇꢆꢁ
ꢛ
ꢛ
ꢝ ꢞꢟꢠ
ꢝ ꢓꢟꢠ
Rꢗꢜꢙ
ꢍꢎꢂꢂ
ꢄꢅꢄꢆ ꢌꢍꢎꢅꢇ
Figure A1
Figure A2
5V
+
–
INPUT
LT1016
4.7k
430Ω
1N4148
5V
(TYP)
Q1
2N2907
HP5082-2810
1000pF
330Ω
OUTPUT TRANSISTOR SUPPLIES
(SHOWN IN HEAVY LINES)
CAN BE REFERENCED ANYWHERE
BETWEEN 15V AND –15V
5V
OUTPUT
–10V
0.1µF
820Ω
Q2
2N2369
820Ω
INVERTING VOLTAGE GAIN—BIPOLAR SWING
–10V
(TYP)
t
t
= 3ns
= 3ns
RISE
FALL
1016 FA03
Figure A3
ꢄꢎꢓ
ꢄꢏ
R
ꢂ
ꢇꢈꢇꢉꢆꢊ
ꢀRꢁꢂꢃ ꢁ
ꢄꢅꢆDꢇꢅ
ꢇꢈꢉꢋꢆꢆ
ꢁ
ꢜꢑꢝꢔR ꢌꢔꢃ
ꢂꢃꢄꢅꢄꢆ
ꢀRꢁꢂꢃ ꢈ
ꢉꢊꢅꢆDꢇꢅ
ꢋꢇꢌꢅꢃRꢀꢃDꢍ
ꢄꢏ
ꢇꢈꢎꢄꢆꢅ
ꢀ
ꢄꢏ
ꢄꢇꢐꢌ
ꢈꢑꢈꢒꢈꢓꢔRꢃꢒꢈꢕ
ꢓꢑꢂꢃꢍꢕꢔ ꢕꢍꢒꢈ
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ꢖ
ꢘ ꢙꢚꢛ
ꢘ ꢊꢚꢛ
Rꢒꢗꢔ
ꢌꢍꢂꢂ
ꢄꢅꢄꢆ ꢌꢍꢅꢎ
ꢉꢊꢉꢑ ꢒꢁꢊꢓ
ꢎꢏꢐꢆDꢇꢅ
Figure A4. Figure A3’s Waveforms
Figure A5
Rev D
17
For more information www.analog.com
LT1016
SIMPLIFIED SCHEMATIC
+
Rev D
18
For more information www.analog.com
LT1016
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT1016#packaging for the most recent package drawings.
N Package
8-Lead PDIP (Narrow .300 Inch)
ꢋReꢤeꢥeꢦꢧe ꢟꢍꢝ Dꢨꢩ ꢪ ꢅꢊꢫꢅꢁꢫꢇꢊꢇꢅ Rev ꢄꢌ
ꢈꢐꢅꢅꢗ
ꢋꢇꢅꢈꢇꢉꢅꢌ
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ꢁ
ꢆ
ꢉ
ꢊ
ꢐ
ꢈꢓꢊꢊ ±ꢈꢅꢇꢊꢗ
ꢋꢉꢈꢐꢆꢆ ±ꢅꢈꢒꢁꢇꢌ
ꢇ
ꢓ
ꢒ
ꢈꢇꢒꢅ ±ꢈꢅꢅꢊ
ꢈꢒꢅꢅ ꢑ ꢈꢒꢓꢊ
ꢈꢅꢐꢊ ꢑ ꢈꢅꢉꢊ
ꢋꢒꢈꢒꢅꢓ ±ꢅꢈꢇꢓꢆꢌ
ꢋꢇꢈꢇꢐꢒ ꢑ ꢇꢈꢉꢊꢇꢌ
ꢋꢆꢈꢉꢓꢅ ꢑ ꢁꢈꢓꢊꢊꢌ
ꢈꢅꢉꢊ
ꢋꢇꢈꢉꢊꢇꢌ
ꢍꢎꢏ
ꢈꢅꢅꢁ ꢑ ꢈꢅꢇꢊ
ꢋꢅꢈꢓꢅꢒ ꢑ ꢅꢈꢒꢁꢇꢌ
ꢈꢇꢓꢅ
ꢈꢅꢓꢅ
ꢋꢅꢈꢊꢅꢁꢌ
ꢔꢄꢀ
ꢋꢒꢈꢅꢐꢁꢌ
ꢔꢄꢀ
ꢕꢈꢅꢒꢊ
ꢈꢒꢓꢊ
ꢑꢈꢅꢇꢊ
ꢈꢅꢇꢁ ±ꢈꢅꢅꢒ
ꢋꢅꢈꢐꢊꢆ ±ꢅꢈꢅꢆꢉꢌ
ꢈꢇꢅꢅ
ꢋꢓꢈꢊꢐꢌ
ꢣꢜꢝ
ꢕꢅꢈꢁꢁꢖ
ꢁꢈꢓꢊꢊ
ꢀꢁ Rꢂꢃ ꢄ ꢅꢆꢇꢇ
(
)
ꢑꢅꢈꢒꢁꢇ
ꢀꢚꢍꢂꢛ
ꢄꢀꢝꢞꢂꢜ
ꢇꢈ Dꢄꢔꢂꢀꢜꢄꢚꢀꢜ ꢘRꢂ
ꢔꢄꢟꢟꢄꢔꢂꢍꢂRꢜ
ꢗꢍꢞꢂꢜꢂ Dꢄꢔꢂꢀꢜꢄꢚꢀꢜ Dꢚ ꢀꢚꢍ ꢄꢀꢝꢟꢠDꢂ ꢔꢚꢟD ꢡꢟꢘꢜꢞ ꢚR ꢏRꢚꢍRꢠꢜꢄꢚꢀꢜꢈ
ꢔꢚꢟD ꢡꢟꢘꢜꢞ ꢚR ꢏRꢚꢍRꢠꢜꢄꢚꢀꢜ ꢜꢞꢘꢟꢟ ꢀꢚꢍ ꢂꢙꢝꢂꢂD ꢈꢅꢇꢅ ꢄꢀꢝꢞ ꢋꢅꢈꢓꢊꢐꢢꢢꢌ
Rev D
19
For more information www.analog.com
LT1016
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LT1016#packaging for the most recent package drawings.
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
ꢆReꢥeꢦeꢧꢨe ꢛꢌꢗ Dꢠꢔ ꢩ ꢁꢅꢪꢁꢋꢪꢂꢃꢂꢁ Rev ꢔꢊ
ꢀꢂꢋꢕ ꢄ ꢀꢂꢕꢉ
ꢆꢇꢀꢋꢁꢂ ꢄ ꢅꢀꢁꢁꢇꢊ
ꢀꢁꢇꢅ ±ꢀꢁꢁꢅ
ꢘꢑꢌꢒ ꢏ
ꢀꢁꢅꢁ ꢖꢐꢗ
ꢉ
ꢅ
ꢋ
ꢃ
ꢀꢈꢇꢅ
ꢙꢚꢘ
ꢀꢂꢃꢁ ±ꢀꢁꢁꢅ
ꢀꢂꢅꢁ ꢄ ꢀꢂꢅꢉ
ꢆꢏꢀꢋꢂꢁ ꢄ ꢏꢀꢕꢋꢋꢊ
ꢘꢑꢌꢒ ꢏ
ꢀꢈꢈꢋ ꢄ ꢀꢈꢇꢇ
ꢆꢅꢀꢉꢕꢂ ꢄ ꢃꢀꢂꢕꢉꢊ
ꢀꢁꢏꢁ ±ꢀꢁꢁꢅ
ꢌꢍꢎ
ꢂ
ꢏ
ꢇ
ꢈ
RꢒꢗꢑꢙꢙꢒꢘDꢒD ꢐꢑꢛDꢒR ꢎꢜD ꢛꢜꢍꢑꢝꢌ
ꢀꢁꢂꢁ ꢄ ꢀꢁꢈꢁ
ꢆꢁꢀꢈꢅꢇ ꢄ ꢁꢀꢅꢁꢋꢊ
× ꢇꢅ°
ꢀꢁꢅꢏ ꢄ ꢀꢁꢃꢕ
ꢆꢂꢀꢏꢇꢃ ꢄ ꢂꢀꢉꢅꢈꢊ
ꢀꢁꢁꢇ ꢄ ꢀꢁꢂꢁ
ꢆꢁꢀꢂꢁꢂ ꢄ ꢁꢀꢈꢅꢇꢊ
ꢀꢁꢁꢋ ꢄ ꢀꢁꢂꢁ
ꢆꢁꢀꢈꢁꢏ ꢄ ꢁꢀꢈꢅꢇꢊ
ꢁ°ꢄ ꢋ° ꢌꢍꢎ
ꢀꢁꢂꢃ ꢄ ꢀꢁꢅꢁ
ꢆꢁꢀꢇꢁꢃ ꢄ ꢂꢀꢈꢉꢁꢊ
ꢀꢁꢅꢁ
ꢆꢂꢀꢈꢉꢁꢊ
ꢖꢐꢗ
ꢀꢁꢂꢇ ꢄ ꢀꢁꢂꢕ
ꢆꢁꢀꢏꢅꢅ ꢄ ꢁꢀꢇꢋꢏꢊ
ꢌꢍꢎ
ꢘꢑꢌꢒꢟ
ꢚꢘꢗꢞꢒꢐ
ꢂꢀ Dꢚꢙꢒꢘꢐꢚꢑꢘꢐ ꢚꢘ
ꢆꢙꢚꢛꢛꢚꢙꢒꢌꢒRꢐꢊ
ꢈꢀ DRꢜꢠꢚꢘꢔ ꢘꢑꢌ ꢌꢑ ꢐꢗꢜꢛꢒ
ꢏꢀ ꢌꢞꢒꢐꢒ Dꢚꢙꢒꢘꢐꢚꢑꢘꢐ Dꢑ ꢘꢑꢌ ꢚꢘꢗꢛꢝDꢒ ꢙꢑꢛD ꢡꢛꢜꢐꢞ ꢑR ꢎRꢑꢌRꢝꢐꢚꢑꢘꢐꢀ
ꢙꢑꢛD ꢡꢛꢜꢐꢞ ꢑR ꢎRꢑꢌRꢝꢐꢚꢑꢘꢐ ꢐꢞꢜꢛꢛ ꢘꢑꢌ ꢒꢢꢗꢒꢒD ꢀꢁꢁꢃꢣ ꢆꢁꢀꢂꢅꢤꢤꢊ
ꢇꢀ ꢎꢚꢘ ꢂ ꢗꢜꢘ ꢖꢒ ꢖꢒꢓꢒꢛ ꢒDꢔꢒ ꢑR ꢜ Dꢚꢙꢎꢛꢒ
ꢐꢑꢋ Rꢒꢓ ꢔ ꢁꢈꢂꢈ
Rev D
20
For more information www.analog.com
LT1016
REVISION HISTORY (Revision history begins at Rev D)
REV
DATE
DESCRIPTION
PAGE NUMBER
D
04/18 Updated simplified schematic.
17
Rev D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
21
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
LT1016
APPLICATIONS INFORMATION
1Hz to 10MHz V-to-F Converter
the circuit’s outputpulse generator, closing feedback loop
aroundtheintegratingamplifier.To maintainthesumming
node at zero, the pulse generator runs at a frequency
that permits enough charge pumping to offset the input
signal. Thus, the output frequency is linearly related to
the input voltage.
The LT1016 and the LT1122 FET input amplifier combine
to form a high speed V-to-F converter in Figure 16. A
variety of techniques is used to achieve a 1Hz to 10MHz
output. Overrange to 12MHz (V = 12V) is provided. This
IN
circuit’sdynamicrangeis140dB,orsevendecades,which
is wider than any commercially available unit. The 10MHz
full-scale frequency is 10 times faster than monolithic
V-to-F’s now available. The theory of operation is based
on the identity Q = CV.
To trimthiscircuit, apply6.000Vattheinputandadjustthe
2kΩ pot for 6.000MHz output. Next, excite the circuit with
a 10.000V input and trim the 20k resistor for 10.000MHz
output. Repeat these adjustments until both points are
fixed. Linearity of the circuit is 0.03%, with full-scale drift
of 50ppm/°C. The LTC1050 chopper op amp servos the
integrator’s noninverting input and eliminates the need
for a zero trim. Residual zero point error is 0.05Hz/°C.
Each time the circuit produces an output pulse, it feeds
back a fixed quantity of charge, Q, to a summing node,
Σ. The circuit’s input furnishes a comparison current at
the summing node. This difference current is integrated
in A1’s 68pF feedback capacitor. The amplifier controls
OUTPUT
1Hz TO 10MHz
INPUT
0V TO 10V
5V REF
15V
15V
15pF
(POLYSTYRENE)
Q1
–15V
+
–
A4
LT1010
A3
LT1006
4.7µF
470Ω
Q2
15V
0.1µF
2k
5V
6.8Ω
6MHz
TRIM
68pF
1.2k
10k*
Σ
LM134
100k*
5V
–5V
–
+
8
100k*
A1
+
–
LT1122
A2
LT1016
LT1034-1.2V
LT1034-2.5V
100Ω
10k
–5V
150pF
2.2M*
Q3
5pF
1k
5V
Q4
0.02µF
36k
–
1k
10F
10M
= 2N2369
= 74HC14
LTC1050
+
+
20k
10MHz
TRIM
* = 1% METAL FILM/10ppm/°C
BYPASS ALL ICs WITH 2.2µF
ON EACH SUPPLY DIRECTLY AT PINS
–5V
1016 F16
Figure 16. 1Hz to 10MHz V-to-F Converter. Linearity is Better Than 0.03% with 50ppm/°C Drift
RELATED PARTS
PART NUMBER
LT1116
DESCRIPTION
COMMENTS
12ns Single Supply Ground-Sensing Comparator
7ns, UltraFast, Single Supply Comparator
60ns, Low Power, Single Supply Comparator
Single Supply Version of LT1016, LT1016 Pinout and Functionality
6mA, 100MHz Data Rate, LT1016 Pinout and Functionality
LT1394
LT1671
450µA, Single Supply Comparator, LT1016 Pinout and Functionality
LT1711/LT1712
LT1713/LT1714
LT1715
Single/Dual 4.5ns 3V/5V/ 5V Rail-to-Rail Comparators Rail-to-Rail Inputs and Outputs
Single/Dual 7ns 3V/5V/ 5V Rail-to-Rail Comparators 5mA per Comparator, Rail-to-Rail Inputs and Outputs
Dual 150MHz 4ns 3V/5V Comparator
150MHz Toggle Rate, Independent Input/Output Supplies
LT1719/LT1720/LT1721 Single/Dual/Quad 4.5ns 3V/5V Comparators
4mA per Comparator, Ground-Sensing Rail-to-Rail Inputs and Outputs
Rev D
D16854-0-4/18(D)
www.analog.com
22
ANALOG DEVICES, INC. 1991-2018
相关型号：
LT1016CS8
COMPARATOR, 3500uV OFFSET-MAX, 16ns RESPONSE TIME, PDSO8, 0.150 INCH, SLIM, PLASTIC, SOP-8
ROCHESTER
LT1016CS8#PBF
LT1016 - Ultra Fast Precision 10ns Comparator; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LT1016IS8#PBF
LT1016 - Ultra Fast Precision 10ns Comparator; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LT1016IS8#TR
LT1016 - Ultra Fast Precision 10ns Comparator; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LT1016IS8#TRPBF
LT1016 - Ultra Fast Precision 10ns Comparator; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
Linear
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