LT1167AIS8-1#TRPBF [Linear]
Single Resistor Gain Programmable, Precision Instrumentation Amplifier;型号: | LT1167AIS8-1#TRPBF |
厂家: | Linear |
描述: | Single Resistor Gain Programmable, Precision Instrumentation Amplifier 放大器 光电二极管 |
文件: | 总22页 (文件大小:352K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1167
Single Resistor Gain
Programmable, Precision
Instrumentation Amplifier
DESCRIPTION
The LT®1167 is a low power, precision instrumentation
amplifier that requires only one external resistor to set
gains of 1 to 10,000. The low voltage noise of 7.5nV/√Hz
(at 1kHz) is not compromised by low power dissipation
(0.9mA typical for 2.3V to 15V supplies).
The part’s high accuracy (10ppm maximum nonlinearity,
0.08% max gain error (G = 10)) is not degraded even for
loadresistorsaslowas2k.TheLT1167islasertrimmedfor
very low input offset voltage (40μV max), drift (0.3μV/°C),
high CMRR (90dB, G = 1) and PSRR (105dB, G = 1).
Low input bias currents of 350pA max are achieved with
the use of superbeta processing. The output can handle
capacitive loads up to 1000pF in any gain configuration
while the inputs are ESD protected up to 13kV (human
body). The LT1167 with two external 5k resistors passes
the IEC 1000-4-2 level 4 specification.
FEATURES
n
Single Gain Set Resistor: G = 1 to 10,000
n
Gain Error: G = 10, 0.08% Max
n
Input Offset Voltage Drift: 0.3μV/°C Max
n
Meets IEC 1000-4-2 Level 4 ESD Tests with
Two External 5k Resistors
n
Gain Nonlinearity: G = 10, 10ppm Max
n
Input Offset Voltage: G = 10, 60μV Max
n
Input Bias Current: 350pA Max
n
PSRR at G = 1: 105dB Min
n
CMRR at G = 1: 90dB Min
n
Supply Current: 1.3mA Max
n
Wide Supply Range: 2.3V to 18V
n
1kHz Voltage Noise: 7.5nV/√Hz
n
0.1Hz to 10Hz Noise: 0.28μV
P-P
n
Available in 8-Pin PDIP and SO Packages
APPLICATIONS
The LT1167, offered in 8-pin PDIP and SO packages, re-
quires significantly less PC board area than discrete multi
op amp and resistor designs.
n
Bridge Amplifiers
■
Strain Gauge Amplifiers
■
Thermocouple Amplifiers
TheLT1167-1offersthesameperformanceastheLT1167,
but its input current characteristic at high common mode
voltagebettersupportsapplicationswithhighinputimped-
ance (see the Applications Information section).
■
Differential to Single-Ended Converters
■
Medical Instrumentation
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Single Supply Barometer
V
S
Gain Nonlinearity
R5
LUCAS NOVA SENOR
NPC-1220-015-A-3L
V
S
392k
3
2
8
+
–
1
3
–
+
2
1
–
1
7
1/2
LT1490
4
1
2
5k
5k
LT1634CCZ-1.25
R1
4
6
825Ω
LT1167
G = 60
R6
1k
R2
12Ω
5k
2
6
5k
5
8
3
TO
4-DIGIT
DVM
+
R
SET
4
OFFSET R4
ADJUST 50k
5
6
5
+
–
1167 TA02
R3
50k
OUTPUT VOLTAGE (2V/DIV)
7
1/2
LT1490
G = 1000
R
= 1k
L
V
= 10V
R7
50k
OUT
R8
100k
VOLTS INCHES Hg
0.2% ACCURACY AT 25°C
1.2% ACCURACY AT 0°C TO 60°C
= 8V TO 30V
2.800
3.000
3.200
28.00
30.00
32.00
V
S
1167 TA01
1167fc
1
LT1167
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
Supply Voltage ...................................................... ±20V
Differential Input Voltage (Within the
R
1
2
3
4
R
G
8
7
6
5
G
–
+
–IN
+IN
+V
S
Supply Voltage) ......................................................±±0V
Input Voltage (Equal to Supply Voltage)................. ±20V
Input Current (Note 3)..........................................±20mA
Output Short-Circuit Duration ......................... Indefinite
Operating Temperature Range ................. –±0°C to 85°C
Specified Temperature Range
OUTPUT
REF
–V
S
N8 PACKAGE
S8 PACKAGE
8-LEAD PDIP 8-LEAD PLASTIC SO
T
= 150°C, θ = 130°C/W (N8)
JA
= 150°C, θ = 190°C/W (S8)
JA
JMAX
T
JMAX
LT1167AC/LT1167C/
LT1167AC-1/LT1167C-1 (Note ±) ............ 0°C to 70°C
LT1167AI/LT1167I/
LT1167AI-1/LT1167I-1 ........................ –±0°C to 85°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
ORDER INFORMATION
LEAD FREE FINISH
LT1167ACN8#PBF
LT1167ACS8#PBF
LT1167AIN8#PBF
LT1167AIS8#PBF
LT1167CN8#PBF
LT1167CS8#PBF
LT1167IN8#PBF
LT1167IS8#PBF
LT1167CS8-1#PBF
LT1167IS8-1#PBF
LT1167ACS8-1#PBF
LT1167AIS8-1#PBF
LEAD BASED FINISH
LT1167ACN8
TAPE AND REEL
PART MARKING
LT1167AC
1167A
PACKAGE DESCRIPTION
8-Lead PDIP
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
LT1167ACN8#TRPBF
LT1167ACS8#TRPBF
LT1167AIN8#TRPBF
LT1167AIS8#TRPBF
LT1167CN8#TRPBF
LT1167CS8#TRPBF
LT1167IN8#TRPBF
LT1167IS8#TRPBF
LT1167CS8-1#TRPBF
LT1167IS8-1#TRPBF
LT1167ACS8-1#TRPBF
LT1167AIS8-1#TRPBF
TAPE AND REEL
8-Lead Plastic SO
8-Lead PDIP
0°C to 70°C
LT1167AI
1167AI
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
8-Lead Plastic SO
8-Lead PDIP
LT1167C
1167
8-Lead Plastic SO
8-Lead PDIP
0°C to 70°C
LT1167I
1167I
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
8-Lead Plastic SO
8-Lead Plastic SO
8-Lead Plastic SO
8-Lead Plastic SO
8-Lead Plastic SO
PACKAGE DESCRIPTION
8-Lead PDIP
11671
11671
–40°C to 85°C
0°C to 70°C
11671
11671
–40°C to 85°C
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
PART MARKING
LT1167AC
1167A
LT1167ACN8#TR
LT1167ACS8#TR
LT1167AIN8#TR
LT1167ACS8
8-Lead Plastic SO
8-Lead PDIP
0°C to 70°C
LT1167AIN8
LT1167AI
1167AI
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
LT1167AIS8
LT1167AIS8#TR
8-Lead Plastic SO
8-Lead PDIP
LT1167CN8
LT1167CN8#TR
LT1167C
1167
LT1167CS8
LT1167CS8#TR
8-Lead Plastic SO
8-Lead PDIP
0°C to 70°C
LT1167IN8
LT1167IN8#TR
LT1167I
1167I
–40°C to 85°C
–40°C to 85°C
LT1167IS8
LT1167IS8#TR
8-Lead Plastic SO
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
1167fc
2
LT1167
ELECTRICAL CHARACTERISTICS VS = 15V, VCM = 0V, TA = 25°C, RL = 2k, unless otherwise noted.
LT1167AC/LTC1167AI
LT1167C/LTC1167I
LT1167AC-1/LTC1167AI-1
LT1167C-1/LTC1167I-1
SYMBOL PARAMETER
CONDITIONS (NOTE 7)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
G
Gain Range
Gain Error
G = 1 + (49.4k/R )
1
10k
1
10k
G
G = 1
0.008
0.010
0.025
0.049
0.02
0.08
0.08
0.10
0.015
0.020
0.030
0.040
0.03
0.10
0.10
0.10
%
%
%
%
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
Gain Nonlinearity (Note 5)
V = 10V, G = 1
1
2
15
6
10
40
1.5
3
20
10
15
60
ppm
ppm
ppm
O
V = 10V, G = 10 and 100
O
V = 10V, G = 1000
O
V = 10V, G = 1, R = 600
5
6
12
15
6
7
15
20
ppm
ppm
O
L
V = 10V, G = 10 and 100,
O
R = 600
L
V = 10V, G = 1000, R = 600
20
65
25
80
ppm
O
L
V
V
V
Total Input Referred Offset Voltage
Input Offset Voltage
V
= V + V /G
OST OSI OSO
OST
G = 1000, V = 5V to 15V
15
40
90
50
40
20
50
60
μV
μV
pA
pA
OSI
S
Output Offset Voltage
G = 1, V = 5V to 15V
200
320
350
300
450
500
OSO
S
I
I
Input Offset Current
100
80
OS
Input Bias Current
B
e
n
Input Noise Voltage (Note 8)
0.1Hz to 10Hz, G = 1
0.1Hz to 10Hz, G = 10
0.1Hz to 10Hz, G = 100
and 1000
2.00
0.50
0.28
2.00
0.50
0.28
μV
P-P
μV
P-P
μV
P-P
2
2
Total RTI Noise = √e + (e /G) (Note 8)
ni
no
e
Input Noise Voltage Density
(Note 8)
f = 1kHz
7.5
67
12
90
7.5
67
12
90
nV/√Hz
nV/√Hz
ni
O
e
Output Noise Voltage Density
(Note 8)
f = 1kHz (Note 3)
O
no
i
Input Noise Current
f = 0.1Hz to 10Hz
10
124
1000
1.6
10
124
1000
1.6
pA
P-P
n
O
Input Noise Current Densty
Input Resistance
f = 10Hz
O
fA/√Hz
GΩ
pF
R
V
IN
=
10V
200
200
IN
C
C
V
Differential Input Capacitance
f = 100kHz
O
IN(DIFF)
IN(CM)
CM
Common Mode Input Capacitance f = 100kHz
1.6
1.6
pF
O
Input Voltage Range
G = 1, Other Input Grounded
V = 2.3V to 5V
–V +1.9
+V –1.2 –V +1.9
+V –1.2
S
V
V
S
S
S
S
S
S
V = 5V to 18V
–V +1.9
+V –1.4 –V +1.9
+V –1.4
S
S
S
CMRR
Common Mode Rejection Ratio
1k Source Imbalance,
CM
G = 1
V
= 0V to 10V
90
95
85
95
dB
dB
dB
dB
G = 10
G = 100
G = 1000
106
120
126
115
125
140
100
110
120
115
125
140
PSRR
Power Supply Rejection Ratio
V = 2.3V to 18V
S
G = 1
105
125
131
135
120
135
140
150
100
120
126
130
120
135
140
150
dB
dB
dB
dB
G = 10
G = 100
G = 1000
I
S
Supply Current
V = 2.3V to 18V
S
0.9
1.3
0.9
1.3
mA
V
OUT
Output Voltage Swing
R = 10k
L
V = 2.3V to 5V
–V +1.1
S
+V –1.2 –V +1.1
+V –1.2
V
V
S
S
S
S
S
V = 5V to 18V
–V +1.2
+V –1.3 –V +1.2
+V –1.3
S
S
S
S
1167fc
3
LT1167
ELECTRICAL CHARACTERISTICS VS = 15V, VCM = 0V, TA = 25°C, RL = 2k, unless otherwise noted.
LT1167AC/LTC1167AI
LT1167C/LTC1167I
LT1167AC-1/LTC1167AI-1
LT1167C-1/LTC1167I-1
SYMBOL PARAMETER
CONDITIONS (NOTE 7)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
I
Output Current
Bandwidth
20
27
20
27
mA
OUT
BW
G = 1
1000
800
120
12
1000
800
120
12
kHz
kHz
kHz
kHz
G = 10
G = 100
G = 1000
SR
Slew Rate
G = 1, V
=
10V
0.75
1.2
0.75
1.2
V/μs
OUT
Settling Time to 0.01%
10V Step
G = 1 to 100
G = 1000
14
130
14
130
μs
μs
R
Reference Input Resistance
Reference Input Current
Reference Voltage Range
Reference Gain to Output
20
50
20
50
kΩ
μA
V
REFIN
I
V
REF
= 0V
REFIN
V
A
–V +1.6
S
+V –1.6 –V +1.6
+V –1.6
S
REF
S
S
1
0.0001
1
0.0001
VREF
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, RL = 2k, unless otherwise noted.
LT1167AC/LT1167AC-1
LT1167C/LT1167C-1
SYMBOL PARAMETER
CONDITIONS (NOTE 7)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
l
l
l
l
Gain Error
G = 1
0.01
0.08
0.09
0.14
0.03
0.30
0.30
0.33
0.012
0.100
0.120
0.140
0.04
0.33
0.33
0.35
%
%
%
%
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
l
l
l
Gain Nonlinearity
V
OUT
V
OUT
V
OUT
=
=
=
10V, G = 1
10V, G = 10 and 100
10V, G = 1000
1.5
3
20
10
15
60
3
4
25
15
20
80
ppm
ppm
ppm
l
G/T
Gain vs Temperature
G < 1000 (Note 2)
V = V + V /G
OST
20
50
20
50
ppm/°C
V
Total Input Referred
Offset Voltage
OST
OSI
OSO
l
l
V
V
V
V
V
V
Input Offset Voltage
V = 5V to 15V
18
3.0
60
60
23
3.0
70
80
μV
μV
OSI
S
Input Offset Voltage Hysteresis (Notes 3, 6)
Output Offset Voltage V = 5V to 15V
Output Offset Voltage Hysteresis (Notes 3, 6)
OSIH
OSO
OSOH
380
500
μV
S
30
30
μV
l
l
l
l
l
l
/T
OSI
Input Offset Drift (Note 8)
Output Offset Drift
(Note 3)
(Note 3)
0.05
0.7
100
0.3
75
0.3
3
0.06
0.8
120
0.4
105
0.4
0.4
4
μV/°C
μV/°C
pA
/T
OSO
I
I
I
Input Offset Current
Input Offset Current Drift
Input Bias Current
400
550
OS
/T
pA/°C
pA
OS
B
450
600
I /T
B
Input Bias Current Drift
Input Voltage Range
0.4
pA/°C
V
G = 1, Other Input Grounded
CM
l
l
V = 2.3V to 5V
–V +2.1
S
+V –1.3 –V +2.1
+V –1.3
V
V
S
S
S
S
S
S
V = 5V to 18V
–V +2.1
+V –1.4 –V +2.1
+V –1.4
S
S
S
CMRR
Common Mode Rejection Ratio 1k Source Imbalance,
V
= 0V to 10V
CM
G = 1
l
l
l
l
88
92
83
97
113
114
92
dB
dB
dB
dB
G = 10
G = 100
G = 1000
100
115
117
110
120
135
110
120
135
1167fc
4
LT1167
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, RL = 2k, unless otherwise noted.
LT1167AC/LT1167AC-1
LT1167C/LT1167C-1
SYMBOL PARAMETER
PSRR Power Supply Rejection Ratio
CONDITIONS (NOTE 7)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
V = 2.3V to 18V
S
l
l
l
l
G = 1
103
123
127
129
115
130
135
145
98
115
130
135
145
dB
dB
dB
dB
G = 10
G = 100
G = 1000
118
124
126
l
I
Supply Current
V = 2.3V to 18V
1.0
1.5
1.0
1.5
+V –1.3
mA
S
S
V
Output Voltage Swing
R = 10k
L
OUT
l
l
V = 2.3V to 5V
–V +1.4
S
+V –1.3 –V +1.4
V
V
S
S
S
S
S
S
V = 5V to 18V
–V +1.6
+V –1.5 –V +1.6
+V –1.5
S
S
S
l
l
l
I
Output Current
Slew Rate
16
21
16
21
mA
V/μs
V
OUT
SR
G = 1, V
=
10V
0.65
1.1
0.65
1.1
OUT
V
REF Voltage Range
(Note 3)
–V +1.6
S
+V –1.6 –V +1.6
+V –1.6
S
REF
S
S
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = 15V, VCM = 0V, –40°C ≤ TA ≤ 85°C, RL = 2k, unless otherwise noted.
LT1167AI/LT1167AI-1
LT1167I/LT1167I-1
SYMBOL PARAMETER
CONDITIONS (NOTE 7)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
l
l
l
l
Gain Error
G = 1
0.014
0.130
0.140
0.160
0.04
0.40
0.40
0.40
0.015
0.140
0.150
0.180
0.05
0.42
0.42
0.45
%
%
%
%
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
l
l
l
G
Gain Nonlinearity (Notes 2, 4)
Gain vs Temperature
V = 10V, G = 1
2
5
15
20
70
3
6
20
30
ppm
ppm
ppm
N
O
V = 10V, G = 10 and 100
O
V = 10V, G = 1000
26
30
100
O
l
G/T
G < 1000 (Note 2)
20
50
20
50
ppm/°C
V
Total Input Referred
Offset Voltage
V
= V + V /G
OST OSI OSO
OST
l
l
V
V
V
V
V
V
Input Offset Voltage
20
3.0
180
30
75
25
3.0
200
30
100
600
μV
μV
OSI
Input Offset Voltage Hysteresis (Notes 3, 6)
Output Offset Voltage
OSIH
OSO
OSOH
500
μV
Output Offset Voltage Hysteresis (Notes 3, 6)
μV
l
l
l
l
l
l
/T
OSI
Input Offset Drift (Note 8)
Output Offset Drift
(Note 3)
(Note 3)
0.05
0.8
110
0.3
180
0.5
0.3
5
0.06
1
0.4
6
μV/°C
μV/°C
pA
/T
OSO
I
I
I
Input Offset Current
Input Offset Current Drift
Input Bias Current
550
120
0.3
220
0.6
700
OS
/T
pA/°C
pA
OS
B
600
800
I /T
B
Input Bias Current Drift
Input Voltage Range
pA/°C
l
l
V
V = 2.3V to 5V
–V +2.1
S
+V –1.3 –V +2.1
+V –1.3
V
V
CM
S
S
S
S
S
S
V = 5V to 18V
–V +2.1
+V –1.4 –V +2.1
+V –1.4
S
S
S
CMRR
Common Mode Rejection Ratio 1k Source Imbalance,
V
= 0V to 10V
CM
G = 1
l
l
l
l
86
98
114
116
90
81
95
112
112
90
dB
dB
dB
dB
G = 10
G = 100
G = 1000
105
118
133
105
118
133
1167fc
5
LT1167
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, RL = 2k, unless otherwise noted.
LT1167AI/LT1167AI-1
LT1167I/LT1167I-1
SYMBOL PARAMETER
PSRR Power Supply Rejection Ratio
CONDITIONS (NOTE 7)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
V = 2.3V to 18V
S
l
l
l
l
G = 1
100
120
125
128
112
125
132
140
95
112
125
132
140
dB
dB
dB
dB
G = 10
G = 100
G = 1000
115
120
125
l
I
Supply Current
1.1
1.6
+V –1.3 –V +1.4
1.1
1.6
+V –1.3
mA
S
l
l
V
Output Voltage Swing
V = 2.3V to 5V
S
–V +1.4
S
V
V
OUT
S
S
S
S
S
V = 5V to 18V
–V +1.6
+V –1.5 –V +1.6
+V –1.5
S
S
S
l
l
l
I
Output Current
Slew Rate
15
20
15
20
mA
V/μs
V
OUT
SR
G = 1, V
=
10V
0.55
0.95
0.55
0.95
OUT
V
REF Voltage Range
(Note 3)
–V +1.6
S
+V –1.6 –V +1.6
+V –1.6
S
REF
S
S
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Does not include the effect of the external gain resistor RG.
Note 3: This parameter is not 100% tested.
Note 4: The LT1167AC/LT1167C/LT1167AC-1/LT1167C-1 are designed,
characterized and expected to meet the industrial temperature limits, but
are not tested at –40°C and 85°C. I-grade parts are guaranteed.
Note 6: Hysteresis in offset voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Offset voltage hysteresis is always measured at 25°C, but
the IC is cycled to 85°C I-grade (or 70°C C-grade) or –40°C I-grade
(0°C C-grade) before successive measurement. 60% of the parts will
pass the typical limit on the data sheet.
Note 7: Typical parameters are defined as the 60% of the yield parameter
distribution.
Note 8: Referred to input.
Note 5: This parameter is measured in a high speed automatic tester that
does not measure the thermal effects with longer time constants. The
magnitude of these thermal effects are dependent on the package used,
heat sinking and air flow conditions.
1167fc
6
LT1167
TYPICAL PERFORMANCE CHARACTERISTICS
Gain Nonlinearity, G = 1
Gain Nonlinearity, G = 10
Gain Nonlinearity, G = 100
1167 G01
1167 G03
1167 G02
G = 1
OUTPUT VOLTAGE (2V/DIV)
G = 100 OUTPUT VOLTAGE (2V/DIV)
G = 10 OUTPUT VOLTAGE (2V/DIV)
R
V
= 2k
R
V
= 2k
=
R
V
= 2k
=
L
OUT
L
OUT
L
OUT
=
10V
10V
10V
Gain Nonlinearity, G = 1000
Gain Nonlinearity vs Temperature
Gain Error vs Temperature
80
0.20
0.15
V
V
=
OUT
= 2k
15V
S
= –10V TO 10V
70
60
R
L
0.10
50
40
30
20
10
0.05
G = 1
0
–0.05
–0.10
–0.15
–0.20
V
V
=
OUT
= 2k
15V
10V
S
G = 10*
G = 1000
=
R
L
G = 100*
G = 1000*
1167 G04
*DOES NOT INCLUDE
G = 1000 OUTPUT VOLTAGE (2V/DIV)
G = 1, 10
TEMPERATURE EFFECTS
OF R
R = 2k
L
G = 100
25
G
V
= 10V
OUT
0
–25
0
50
75 100 150
–50
–50
–25
0
25
100
50
75
TEMPERATURE (°C)
TEMPERATURE (°C)
1167 G05
1167 G06
Distribution of Input
Offset Voltage, TA = –40°C
Distribution of Input
Offset Voltage, TA = 25°C
Distribution of Input
Offset Voltage, TA = 85°C
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
30
25
V
=
15V
V
=
15V
137 N8 (2 LOTS)
V
=
15V
137 N8 (2 LOTS)
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
S
S
S
G = 1000
G = 1000
165 S8 (3 LOTS)
G = 1000
165 S8 (3 LOTS)
302 TOTAL PARTS
302 TOTAL PARTS
20
15
10
5
0
0
0
0
0
–80 –60 –40 –20
20
40
60
–80 –60 –40 –20
20
40
60
–60 –40 –20
0
20
40
60
INPUT OFFSET VOLTAGE (μV)
INPUT OFFSET VOLTAGE (μV)
INPUT OFFSET VOLTAGE (μV)
1167 G40
1167 G42
1167 G41
1167fc
7
LT1167
TYPICAL PERFORMANCE CHARACTERISTICS
Distribution of Output
Offset Voltage, TA = –40°C
Distribution of Output
Offset Voltage, TA = 25°C
Distribution of Output
Offset Voltage, TA = 85°C
30
25
20
15
10
5
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
V
=
15V
V = 15V
S
G = 1
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
V
= 15V
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
S
S
G = 1
G = 1
0
0
0
–200 –150 –100 –50
0
50 100 150 200
–400 –300 –200 –100
0
100 200 300 400
–400 –300 –200 –100
0
100 200 300 400
OUTPUT OFFSET VOLTAGE (μV)
OUTPUT OFFSET VOLTAGE (μV)
OUTPUT OFFSET VOLTAGE (μV)
1167 G44
1167 G45
1167 G43
Distribution of Input Offset
Voltage Drift
Distribution of Output Offset
Voltage Drift
Warm-Up Drift
30
25
20
15
10
5
40
35
30
25
20
15
10
5
14
12
V
T
=
15V
137 N8 (2 LOTS)
V
T
=
15V
137 N8 (2 LOTS)
S
V
T
=
15V
S
S
= –40°C TO 85°C
165 S8 (3 LOTS)
= –40°C TO 85°C
165 S8 (3 LOTS)
A
= 25°C
A
A
G = 1000
302 TOTAL PARTS
G = 1
302 TOTAL PARTS
G = 1
S8
N8
10
8
6
4
2
0
0
0
–0.4
–0.2 –0.1
0
0.1 0.2 0.3
–5 –4 –3 –2 –1
0
1
2
3
4
5
–0.3
1
2
5
0
3
4
INPUT OFFSET VOLTAGE DRIFT (μV/°C)
OUTPUT OFFSET VOLTAGE DRIFT (μV/°C)
TIME AFTER POWER ON (MINUTES)
1167 G46
1167 G47
1167 G09
Input Bias and Offset Current
vs Temperature
Input Bias Current
Input Offset Current
50
40
30
20
10
0
50
40
30
20
10
0
500
400
V
=
15V
270 S8
V
=
15V
270 S8
S
A
S
A
V
V
=
CM
15V
= 0V
S
T
= 25°C
122 N8
T
= 25°C
122 N8
392 TOTAL PARTS
392 TOTAL PARTS
300
200
I
OS
100
0
I
B
–100
–200
–300
–400
–500
–100
–60
–20
20
60
100
–100
–60
–20
20
60
100
–75 –50
50
TEMPERATURE (°C)
100 125
1167 G12
–25
0
25
75
INPUT BIAS CURRENT (pA)
INPUT OFFSET CURRENT (pA)
1167 G10
1167 G11
1167fc
8
LT1167
TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current
vs Common Mode Input Voltage
Common Mode Rejection Ratio
vs Frequency
Negative Power Supply Rejection
Ratio vs Frequency
500
400
160
140
120
100
160
140
120
100
+
V
T
=
15V
V
T
= 15V
S
A
G = 1000
G = 100
G = 10
= 25°C
= 25°C
G = 100
G = 10
G = 1
A
1k SOURCE
IMBALANCE
300
200
G = 1000
G = 1
100
70°C
85°C
0
80
60
80
60
–100
–200
–300
–400
–500
0°C
25°C
40
20
0
40
20
0
–40°C
1
10
1k
0.1
1
10
1k
10k 100k
–15 –12 –9 –6 –3
0
3
6
9
12 15
0.1
10k 100k
100
100
COMMON MODE INPUT VOLTAGE (V)
FREQUENCY (Hz)
FREQUENCY (Hz)
1167 G13
1167 G14
1167 G15
Positive Power Supply Rejection
Ratio vs Frequency
Gain vs Frequency
Supply Current vs Supply Voltage
160
140
120
100
60
50
1.50
1.25
1.00
0.75
0.50
–
G = 1000
V
= –15V
= 25°C
T
A
G = 1000
G = 10
G = 1
G = 100
G = 10
G = 1
40
G = 100
85°C
25°C
30
80
60
20
–40°C
10
40
20
0
0
V
= 15V
= 25°C
–10
–20
S
A
T
1
10
1k
0.1
10k 100k
100
0.01
0.1
1
10
100
1000
0
10
15
20
5
FREQUENCY (kHz)
FREQUENCY (Hz)
SUPPLY VOLTAGE (V)
1167 G17
1167 G16
1167 G18
Voltage Noise Density
vs Frequency
0.1Hz to 10Hz Noise Voltage,
G = 1
0.1Hz to 10Hz Noise Voltage,
Referred to Input, G = 1000
1000
100
V
T
=
15V
V
T
= 15V
= 25°C
V
T
=
15V
S
S
S
A
= 25°C
= 25°C
A
A
1/f
= 10Hz
CORNER
GAIN = 1
1/f
1/f
= 9Hz
= 7Hz
CORNER
GAIN = 10
CORNER
GAIN = 100, 1000
10
0
BW LIMIT
GAIN = 1000
1
10
100
1k
10k
100k
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (Hz)
TIME (SEC)
TIME (SEC)
1167 G19
1167 G20
1167 G21
1167fc
9
LT1167
TYPICAL PERFORMANCE CHARACTERISTICS
Current Noise Density
vs Frequency
0.1Hz to 10Hz Current Noise
Short-Circuit Current vs Time
1000
100
10
50
40
V
S
= 15V
V
T
=
15V
V
T
=
15V
S
A
S
A
= 25°C
= 25°C
T
= –40°C
A
30
T
= 25°C
= 85°C
A
A
20
T
T
10
0
–10
–20
–30
–40
–50
R
S
= 85°C
A
T
= –40°C
T
= 25°C
3
A
A
1
10
100
1000
0
1
2
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (Hz)
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
TIME (SEC)
1167 G22
1167 G24
1167 G23
Overshoot vs Capacitive Load
Large-Signal Transient Response
Small-Signal Transient Response
100
90
V
V
=
15V
50mV
S
=
OUT
= ∞
R
L
80
70
60
50
A
= 1
V
40
30
20
10
0
A
= 10
V
1167 G28
1167 G29
G = 1
10μs/DIV
G = 1
10μs/DIV
V
= 15V
V
= 15V
S
S
A
≥ 100
V
R = 2k
L
R = 2k
L
C = 60pF
L
C = 60pF
L
10
100
1000
10000
CAPACITIVE LOAD (pF)
1167 G25
Output Impedance vs Frequency
Large-Signal Transient Response
Small-Signal Transient Response
1000
100
V
=
15V
S
A
T
= 25°C
G = 1 TO 1000
10
1
1167 G31
1167 G32
G = 1
10μs/DIV
G = 10
10μs/DIV
V
= 15V
V
= 15V
S
S
R = 2k
L
R = 2k
L
0.1
C = 60pF
L
C = 60pF
L
1
10
100
1000
FREQUENCY (kHz)
1167 G26
1167fc
10
LT1167
TYPICAL PERFORMANCE CHARACTERISTICS
Undistorted Output Swing
vs Frequency
Large-Signal Transient Response
Small-Signal Transient Response
35
30
25
20
15
10
5
V
=
15V
S
A
T
= 25°C
G = 10, 100, 1000
G = 1
1167 G34
1167 G35
G = 100
10μs/DIV
G = 100
10μs/DIV
V
= 15V
V
= 15V
S
S
R = 2k
L
R = 2k
L
0
C = 60pF
L
C = 60pF
L
1
10
100
1000
FREQUENCY (kHz)
1167 G27
Settling Time vs Gain
Large-Signal Transient Response
Small-Signal Transient Response
1000
100
10
V
=
15V
= 25°C
= 10V
S
A
T
ΔV
OUT
1mV = 0.01%
1167 G37
1167 G38
G = 1000
50μs/DIV
G = 1000
50μs/DIV
V
= 15V
V
= 15V
S
S
R = 2k
L
R = 2k
L
1
C = 60pF
L
C = 60pF
L
1
10
100
1000
GAIN (dB)
1167 G30
Output Voltage Swing
vs Load Current
Settling Time vs Step Size
Slew Rate vs Temperature
1.8
1.6
1.4
1.2
1.0
0.8
10
8
+V
S
V
V
=
15V
10V
V
= 15
S
85°C
V
= 15V
TO 0.1%
S
S
=
G = 1
OUT
G = 1
25°C
+V – 0.5
S
T
= 25°C
= 30pF
= 1k
–40°C
A
6
C
+V – 1.0
S
L
L
TO 0.01%
R
4
+V – 1.5
S
SOURCE
SINK
V
OUT
2
0V
+V – 2.0
S
+SLEW
0
–V + 2.0
S
0V
–2
–4
–6
–8
–10
V
OUT
–V + 1.5
S
–SLEW
TO 0.01%
–V + 1.0
S
–V + 0.5
S
TO 0.1%
–V
S
–50 –25
0
25
50
75 100 125
2
3
4
5
6
7
8
9
10 11 12
0.01
0.1
1
10
100
TEMPERATURE (°C)
SETTLING TIME (μs)
OUTPUT CURRENT (mA)
1167 G39
1167 G33
1167 G36
1167fc
11
LT1167
BLOCK DIAGRAM
+
VB
V
R5
10k
R6
10k
+
–
OUTPUT
6
A1
R3
C1
400Ω
–IN
2
Q1
R1
24.7k
–
+
–
V
A3
1
8
R
R
G
–
–
V
V
VB
G
+
V
R7
10k
R8
10k
+
–
REF
A2
5
R4
400Ω
C2
+IN
3
Q2
R2
24.7k
+
V
7
4
–
V
–
V
1167 F01
PREAMP STAGE
DIFFERENCE AMPLIFIER STAGE
Figure 1. Block Diagram
THEORY OF OPERATION
The LT1167 is a modified version of the three op amp
instrumentation amplifier. Laser trimming and mono-
lithic construction allow tight matching and tracking of
circuit parameters over the specified temperature range.
Refer to the block diagram (Figure 1) to understand the
following circuit description. The collector currents in
Q1 and Q2 are trimmed to minimize offset voltage drift,
thus assuring a high level of performance. R1 and R2 are
trimmed to an absolute value of 24.7k to assure that the
gain can be set accurately (0.05% at G = 100) with only
one external resistor RG. The value of RG determines the
transconductance of the preamp stage. As RG is reduced
for larger programmed gains, the transconductance of
the input preamp stage increases to that of the input
transistors Q1 and Q2. This increases the open-loop gain
when the programmed gain is increased, reducing the
input referred gain related errors and noise. The input
voltage noise at gains greater than 50 is determined only
by Q1 and Q2. At lower gains the noise of the difference
amplifier and preamp gain setting resistors increase the
noise. The gain bandwidth product is determined by C1,
C2 and the preamp transconductance which increases
with programmed gain. Therefore, the bandwidth does
not drop proportionally to gain.
The input transistors Q1 and Q2 offer excellent matching,
which is inherent in NPN bipolar transistors, as well as
picoampere input bias current due to superbeta process-
ing. The collector currents in Q1 and Q2 are held constant
due to the feedback through the Q1-A1-R1 loop and
Q2-A2-R2 loop which in turn impresses the differential
inputvoltageacrosstheexternalgainsetresistorR .Since
G
the current that flows through R also flows through R
1
G
and R2, theratios provide agained-up differential voltage,
G = (R1 + R2)/R , to the unity-gain difference amplifier A3.
G
The common mode voltage is removed by A3, resulting
in a single-ended output voltage referenced to the voltage
on the REF pin. The resulting gain equation is:
+
–
V
– V = G(V – V
)
OUT
REF
IN
IN
where:
G = (49.4kΩ/R ) + 1
G
solving for the gain set resistor gives:
R = 49.4kΩ/(G – 1)
G
1167fc
12
LT1167
THEORY OF OPERATION
Input and Output Offset Voltage
Output Offset Trimming
The offset voltage of the LT1167 has two components:
the output offset and the input offset. The total offset
voltage referred to the input (RTI) is found by dividing the
output offset by the programmed gain (G) and adding it
to the input offset. At high gains the input offset voltage
dominates, whereas at low gains the output offset voltage
dominates. The total offset voltage is:
The LT1167 is laser trimmed for low offset voltage so that
no external offset trimming is required for most applica-
tions. In the event that the offset needs to be adjusted, the
circuitinFigure2isanexampleofanoptionaloffsetadjust
circuit. The op amp buffer provides a low impedance to
the REF pin where resistance must be kept to minimum
for best CMRR and lowest gain error.
Total input offset voltage (RTI)
= input offset + (output offset/G)
–
2
–IN
1
Total output offset voltage (RTO)
= (input offset • G) + output offset
6
R
LT1167
REF
OUTPUT
+
G
V
8
3
5
+
Reference Terminal
+IN
–
2
10mV
100Ω
1
1/2
LT1112
The reference terminal is one end of one of the four 10k
resistors around the difference amplifier. The output volt-
age of the LT1167 (Pin 6) is referenced to the voltage on
the reference terminal (Pin 5). Resistance in series with
the REF pin must be minimized for best common mode
rejection. For example, a 2Ω resistance from the REF pin
to ground will not only increase the gain error by 0.02%
but will lower the CMRR to 80dB.
3
+
10mV
ADJUSTMENT RANGE
10k
100Ω
–10mV
–
V
1167 F02
Figure 2. Optional Trimming of Output Offset Voltage
Single Supply Operation
Input Bias Current Return Path
For single supply operation, the REF pin can be at the
same potential as the negative supply (Pin 4) provided the
output of the instrumentation amplifier remains inside the
specified operating range and that one of the inputs is at
least 2.5V above ground. The barometer application on
the front page of this data sheet is an example that satis-
The low input bias current of the LT1167 (350pA) and
the high input impedance (200GΩ) allow the use of high
impedance sources without introducing additional offset
voltage errors, even when the full common mode range is
required. However, a path must be provided for the input
bias currents of both inputs when a purely differential
signal is being amplified. Without this path the inputs
will float to either rail and exceed the input common
mode range of the LT1167, resulting in a saturated input
stage. Figure 3 shows three examples of an input bias
current path. The first example is of a purely differential
signal source with a 10kΩ input current path to ground.
Since the impedance of the signal source is low, only one
resistor is needed. Two matching resistors are needed for
higher impedance signal sources as shown in the second
example. Balancing the input impedance improves both
common mode rejection and DC offset. The need for input
resistors is eliminated if a center tap is present as shown
fies these conditions. The resistance R from the bridge
b
transducer to ground sets the operating current for the
bridge and also has the effect of raising the input common
mode voltage. The output of the LT1167 is always inside
the specified range since the barometric pressure rarely
goes low enough to cause the output to rail (30.00 inches
ofHgcorrespondsto3.000V).Forapplicationsthatrequire
the output to swing at or below the REF potential, the
voltage on the REF pin can be level shifted. An op amp is
used to buffer the voltage on the REF pin since a parasitic
series resistance will degrade the CMRR. The application
in the back of this data sheet, Four Digit Pressure Sensor,
is an example.
in the third example.
1167fc
13
LT1167
THEORY OF OPERATION
–
–
+
–
+
MICROPHONE,
HYDROPHONE,
ETC
R
G
R
R
G
LT1167
THERMOCOUPLE
LT1167
LT1167
G
+
200k
200k
10k
CENTER-TAP PROVIDES
BIAS CURRENT RETURN
1167 F03
Figure 3. Providing an Input Common Mode Current Path
APPLICATIONS INFORMATION
The LT1167 is a low power precision instrumentation
amplifier that requires only one external resistor to accu-
rately set the gain anywhere from 1 to 1000. The output
can handle capacitive loads up to 1000pF in any gain
configuration and the inputs are protected against ESD
strikes up to 13kV (human body).
resistorsareneeded,aclampdiodefromthepositivesupply
to each input will maintain the IEC 1000-4-2 specification
to level 4 for both air and contact discharge. A 2N4393
drain/source to gate is a good low leakage diode for use
with 1k resistors, see Figure 4. The input resistors should
be carbon and not metal film or carbon film.
V
V
CC
CC
Input Current at High Common Mode Voltage
OPTIONAL FOR HIGHEST
ESD PROTECTION
J1
2N4393
J2
2N4393
When operating within the specified input common mode
range, both the LT1167 and LT1167-1 operate as shown
in the Input Bias Current vs Common Mode Input Voltage
graph shown in the Typical Performance Characteristics.
If however the inputs are within approximately 0.8V of
the positive supply, the LT1167 input current will increase
to approximately –1μA to –3μA. If the impedance of the
circuit driving the LT1167 inputs is sufficiently high (e.g.,
V
CC
R
R
IN
IN
+
–
OUT
R
LT1167
G
REF
1167 F04
V
EE
10MΩ when +V = 15V), this increased input current can
S
Figure 4. Input Protection
pull the input voltage sufficiently high to keep the elevated
input current flowing. The LT1167-1 has been modified so
that the input current is typically two orders of magnitude
lower under similar conditions. The LT1167-1 is recom-
mended for new designs where input impedance is high.
RFI Reduction
In many industrial and data acquisition applications,
instrumentation amplifiers are used to accurately amplify
small signals in the presence of large common mode volt-
ages or high levels of noise. Typically, the sources of these
verysmallsignals(ontheorderofmicrovoltsormillivolts)
are sensors that can be a significant distance from the
signalconditioningcircuit.Althoughthesesensorsmaybe
connected to signal conditioning circuitry, using shielded
or unshielded twisted-pair cabling, the cabling may act
as antennae, conveying very high frequency interference
Input Protection
The LT1167 can safely handle up to 20mA of input cur-
rent in an overload condition. Adding an external 5k input
resistor in series with each input allows DC input fault
voltages up to 100V and improves the ESD immunity
to 8kV (contact) and 15kV (air discharge), which is the
IEC 1000-4-2 level 4 specification. If lower value input
directly into the input stage of the LT1167.
1167fc
14
LT1167
APPLICATIONS INFORMATION
The amplitude and frequency of the interference can have
an adverse effect on an instrumentation amplifier’s input
stage by causing an unwanted DC shift in the amplifier’s
input offset voltage. This well known effect is called RFI
rectificationandisproducedwhenout-of-bandinterference
is coupled (inductively, capacitively or via radiation) and
rectified by the instrumentation amplifier’s input transis-
tors. These transistors act as high frequency signal detec-
tors, in the same way diodes were used as RF envelope
detectors in early radio designs. Regardless of the type
of interference or the method by which it is coupled into
the circuit, an out-of-band error signal appears in series
with the instrumentation amplifier’s inputs.
imbalance. The differential mode and common mode time
constants associated with the capacitors are:
t
t
= (2)(R )(C )
DM(LPF)
CM(LPF)
S
XD
= (R
)(C
)
XCM1, 2
S1, 2
Setting the time constants requires a knowledge of the
frequency, or frequencies of the interference. Once this
frequencyisknown,thecommonmodetimeconstantscan
be set followed by the differential mode time constant. To
avoid any possibility of inadvertently affecting the signal
to be processed, set the common mode time constant an
order of magnitude (or more) larger than the differential
modetimeconstant.Setthecommonmodetimeconstants
such that they do not degrade the LT1167’s inherent AC
CMR. Then the differential mode time constant can be set
for the bandwidth required for the application. Setting the
differential mode time constant close to the sensor’s BW
also minimizes any noise pickup along the leads. To avoid
anypossibilityofcommonmodetodifferentialmodesignal
conversion, match the common mode time constants to
1% or better. If the sensor is an RTD or a resistive strain
To significantly reduce the effect of these out-of-band
signals on the input offset voltage of instrumentation am-
plifiers, simple lowpass filters can be used at the inputs.
These filters should be located very close to the input pins
of the circuit. An effective filter configuration is illustrated
in Figure 5, where three capacitors have been added to the
inputs of the LT1167. Capacitors C
and C
form
S1, 2
XCM1
XCM2
lowpass filters with the external series resistors R
gauge,thentheseriesresistorsR
canbeomitted,ifthe
to any out-of-band signal appearing on each of the input
S1,2
sensor is in proximity to the instrumentation amplifier.
traces.CapacitorC formsafiltertoreduceanyunwanted
XD
signalthatwouldappearacrosstheinputtraces. Anadded
“Roll Your Own”—Discrete vs Monolithic LT1167
Error Budget Analysis
benefit to using C is that the circuit’s AC common mode
XD
rejection is not degraded due to common mode capacitive
The LT1167 offers performance superior to that of “roll
your own” three op amp discrete designs. A typical ap-
plication that amplifies and buffers a bridge transducer’s
differential output is shown in Figure 6. The amplifier, with
itsgainsetto100, amplifiesadifferential, full-scaleoutput
voltage of 20mV over the industrial temperature range. To
make the comparison challenging, the low cost version of
the LT1167 will be compared to a discrete instrumentation
amp made with the A grade of one of the best precision
quad op amps, the LT1114A. The LT1167C outperforms
+
V
C
R
XCM1
S1
0.001μF
1.6k
+
–
+
–
IN
IN
C
XD
R
LT1167
V
G
OUT
0.1μF
R
S2
1.6k
C
XCM2
–
0.001μF
V
f
≈ 500Hz
1167 F05
–3dB
the discrete amplifier that has lower V , lower I and
OS
B
EXTERNAL RFI
FILTER
comparable V drift. The error budget comparison in
OS
Table 1 shows how various errors are calculated and how
each error affects the total error budget. The table shows
the greatest differences between the discrete solution and
Figure 5. Adding a Simple RC Filter at the Inputs to an
Instrumentation Amplifier Is Effective in Reducing Rectification
of High Frequency Out-of-Band Signals
1167fc
15
LT1167
APPLICATIONS INFORMATION
+
10k*
10k*
1/4
LT1114A
10V
+
–
10k**
10k**
–
350Ω
350Ω
1/4
LT1114A
R
G
LT1167C
REF
202Ω**
499Ω
+
350Ω
350Ω
–
–
10k*
10k*
1/4
LT1114A
+
LT1167 MONOLITHIC
PRECISION BRIDGE TRANSDUCER
INSTRUMENTATION AMPLIFIER
“ROLL YOUR OWN” INST AMP, G = 100
* 0.02% RESISTOR MATCH, 3ppm/°C TRACKING
** DISCRETE 1% RESISTOR, 100ppm/°C TC
100ppm TRACKING
G = 100, R
= 10ppm TC
G
SUPPLY CURRENT = 1.3mA MAX
SUPPLY CURRENT = 1.35mA FOR 3 AMPLIFIERS
1167 F06
Figure 6. “Roll Your Own” vs LT1167
Table 1. “Roll Your Own” vs LT1167 Error Budget
ERROR SOURCE LT1167C CIRCUIT CALCULATION
ERROR, ppm OF FULL SCALE
LT1167C “ROLL YOUR OWN”
“ROLL YOUR OWN”’ CIRCUIT
CALCULATION
Absolute Accuracy at T = 25°C
A
Input Offset Voltage, μV
Output Offset Voltage, μV
Input Offset Current, nA
CMR, dB
60μV/20mV
100μV/20mV
3000
150
4
5000
60
(300μV/100)/20mV
[(60μV)(2)/100]/20mV
[(450pA)(350Ω)/2]/20mV
[(0.02% Match)(5V)]/20mV
[(450pA)(350/2)Ω]/20mV
110dB→[(3.16ppm)(5V)]/20mV
4
790
500
Total Absolute Error
3944
5564
Drift to 85°C
Gain Drift, ppm/°C
(50ppm + 10ppm)(60°C)
[(0.4μV/°C)(60°C)]/20mV
[(6μV/°C)(60°C)]/100/20mV
(100ppm/°C Track)(60°C)
[(1.6μV/°C)(60°C)]/20mV
[(1.1μV/°C)(2)(60°C)]/100/20mV
3600
1200
180
6000
4800
66
Input Offset Voltage Drift, μV/°C
Output Offset Voltage Drift, μV/°C
Total Drift Error
4980
10866
Resolution
Gain Nonlinearity, ppm of Full Scale
Typ 0.1Hz to 10Hz Voltage Noise, μV
15ppm
10ppm
15
14
10
21
0.28μV /20mV
(0.3μV )(√2)/20mV
P-P
P-P
P-P
Total Resolution Error
Grand Total Error
29
8953
31
16461
G = 100, VS = 15V
All errors are min/max and referred to input.
total error. The LT1167 has additional advantages over
the discrete design, including lower component cost and
smaller size.
the LT1167 are input offset voltage and CMRR. Note that
for the discrete solution, the noise voltage specification is
multiplied by √2 which is the RMS sum of the uncorelated
noise of the two input amplifiers. Each of the amplifier er-
rors is referenced to a full-scale bridge differential voltage
of 20mV. The common mode range of the bridge is 5V. The
LT1114 data sheet provides offset voltage, offset voltage
drift and offset current specifications for the matched op
amp pairs used in the error-budget table. Even with an
excellent matched op amp like the LT1114, the discrete
solution’stotalerrorissignificantlyhigherthantheLT1167’s
Current Source
Figure 7 shows a simple, accurate, low power program-
mable current source. The differential voltage across
Pins 2 and 3 is mirrored across R . The voltage across
G
R is amplified and applied across R , defining the out-
G
X
put current. The 50μA bias current flowing from Pin 5 is
buffered by the LT1464 JFET operational amplifier. This
1167fc
16
LT1167
APPLICATIONS INFORMATION
V
S
high CMRR ensures that the desired differential signal
is amplified and unwanted common mode signals are
attenuated. Since the DC portion of the signal is not
important, R6 and C2 make up a 0.3Hz highpass filter.
The AC signal at LT1112’s Pin 5 is amplified by a gain of
101 set by (R7/R8) +1. The parallel combination of C3
and R7 form a lowpass filter that decreases this gain at
frequencies above 1kHz. The ability to operate at 3V
on 0.9mA of supply current makes the LT1167 ideal for
battery-powered applications. Total supply current for
this application is 1.7mA. Proper safeguards, such as
isolation, must be added to this circuit to protect the
patient from possible harm.
3
8
+
+IN
7
R
X
6
R
LT1167
4
G
REF
5
V
–
+
X
1
2
–IN
–
I
L
2
3
–V
S
1
1/2
LT1464
V
[(+IN) – (–IN)]G
X
I
L
=
=
R
R
X
X
LOAD
49.4kΩ
R
G
G =
+ 1
1167 F07
Figure 7. Precision Voltage-to-Current Converter
Low I Favors High Impedance Bridges,
B
Lowers Dissipation
has the effect of improving the resolution of the current
source to 3pA, which is the maximum I of the LT1464A.
B
The LT1167’s low supply current, low supply voltage
operation and low input bias currents optimize it for
battery-powered applications. Low overall power dis-
sipation necessitates using higher impedance bridges.
Thesinglesupplypressuremonitorapplication(Figure9)
shows the LT1167 connected to the differential output of
a 3.5k bridge. The bridge’s impedance is almost an order
of magnitude higher than that of the bridge used in the
error-budget table. The picoampere input bias currents
keep the error caused by offset current to a negligible
level. The LT1112 level shifts the LT1167’s reference pin
and the ADC’s analog ground pins above ground. The
LT1167’s and LT1112’s combined power dissipation
is still less than the bridge’s. This circuit’s total supply
current is just 2.8mA.
Replacing R with a programmable resistor greatly
G
increases the range of available output currents.
Nerve Impulse Amplifier
The LT1167’s low current noise makes it ideal for high
source impedance EMG monitors. Demonstrating the
LT1167’s ability to amplify low level signals, the circuit in
Figure 8 takes advantage of the amplifier’s high gain and
low noise operation. This circuit amplifies the low level
nerve impulse signals received from a patient at Pins 2
and 3. R and the parallel combination of R3 and R4 set
G
a gain of ten. The potential on LT1112’s Pin 1 creates a
ground for the common mode signal. C1 was chosen to
maintain the stability of the patient ground. The LT1167’s
3V
PATIENT/CIRCUIT
PROTECTION/ISOLATION
3
8
0.3Hz
HIGHPASS
7
+IN
+
3V
C1
0.01μF
C2
0.47μF
R3
R1
12k
30k
6
5
6
8
R
LT1167
G = 10
G
+
–
6k
R2
1M
7
1/2
OUTPUT
1V/mV
R4
30k
R6
1M
LT1112
1
2
5
4
–
4
R7
10k
–
+
2
3
–3V
1/2
LT1112
1
–3V
PATIENT
GROUND
R8
100Ω
A
= 101
C3
15nF
V
POLE AT 1kHz
–IN
1167 F08
Figure 8. Nerve Impulse Amplifier
1167fc
17
LT1167
APPLICATIONS INFORMATION
BI TECHNOLOGIES
67-8-3 R40KQ
(0.02% RATIO MATCH)
5V
1
3
8
40k
+
–
7
3.5k
3.5k
3.5k
3.5k
REF
IN
G = 200
249Ω
6
LT1167
4
DIGITAL
DATA
OUTPUT
ADC
20k
3
LTC®1286
1
2
5
+
1
1/2
AGND
40k
LT1112
2
–
1167 F09
Figure 9. Single Supply Bridge Amplifier
AC Coupled Instrumentation Amplifier
TYPICAL APPLICATION
2
1
–IN
–
6
R
LT1167
REF
OUTPUT
G
R1
500k
8
3
C1
0.3μF
5
+IN
+
–
+
2
1
1/2
LT1112
1
f
=
–3dB
3
(2π)(R1)(C1)
= 1.06Hz
1167 TA04
1167fc
18
LT1167
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
.400*
(10.160)
MAX
8
7
6
5
4
.255 t .015*
(6.477 t 0.381)
1
2
3
.130 t .005
.300 – .325
.045 – .065
(3.302 t 0.127)
(1.143 – 1.651)
(7.620 – 8.255)
.065
(1.651)
TYP
.008 – .015
(0.203 – 0.381)
.120
.020
(0.508)
MIN
(3.048)
MIN
+.035
.325
–.015
.018 t .003
(0.457 t 0.076)
.100
(2.54)
BSC
+0.889
8.255
N8 REV I 0711
ꢀ
ꢁ
–0.381
NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
1167fc
19
LT1167
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 p.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.160 p.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 p.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
s 45o
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0o– 8o TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
1167fc
20
LT1167
REVISION HISTORY (Revision history begins at Rev B)
REV
DATE
DESCRIPTION
PAGE NUMBER
B
01/11 Added LT1167-1 to Description, Absolute Maximum Ratings, Order Information, Electrical Characteristics and
Applications Information Section
1-6, 15
C
08/11 Correction to TYP specification for SR from 12 to 1.2
Columns shifted to left in CMRR specification
4
4, 5
1167fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
21
LT1167
TYPICAL APPLICATION
4-Digit Pressure Sensor
9V
R8
LUCAS NOVA SENOR
392k
9V
NPC-1220-015A-3L
3
2
4
+
2
1
1
3
–
–
1
4
1/4
LT1114
1
2
7
5k
5k
LT1634CCZ-1.25
R1
–
11
825Ω
6
LT1167
G = 60
R9
1k
R2
12Ω
5k
2
6
5k
8
3
5
TO
+
4-DIGIT
DVM
+
4
R
SET
10
9
+
8
1/4
LT1114
5
–
12
13
+
14
1/4
CALIBRATION
ADJUST
0.2% ACCURACY AT ROOM TEMP
1.2% ACCURACY AT 0°C TO 60°C
LT1114
–
R7
180k
R6
50k
VOLTS INCHES Hg
R5
100k
R4
100k
2.800
3.000
3.200
28.00
30.00
32.00
R3
51k
C1
1μF
1167 TA03
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
Best DC Accuracy
LTC1100
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LTC1418
Precision Chopper-Stabilized Instrumentation Amplifier
Precision, Micropower, Single Supply Instrumentation Amplifier
High Speed, JFET Instrumentation Amplifier
Fixed Gain of 10 or 100, I < 105μA
S
Fixed Gain of 10 or 100, 30V/μs Slew Rate
Low Power, Single Resistor Programmable Instrumentation Amplifier
14-Bit, Low Power, 200ksps ADC with Serial and Parallel I/O
I
= 530μA Max
SUPPLY
Single Supply 5V or 5V Operation, 1.5LSB INL
and 1LSB DNL Max
LT1460
LT1468
Precision Series Reference
Micropower; 2.5V, 5V, 10V Versions; High Precision
16-Bit Accurate Op Amp, Low Noise Fast Settling
16-Bit Accuracy at Low and High Frequencies, 90MHz GBW,
22V/μs, 900ns Settling
LTC1562
LTC1605
Active RC Filter
Lowpass, Bandpass, Highpass Responses; Low Noise,
Low Distortion, Four 2nd Order Filter Sections
16-Bit, 100ksps, Sampling ADC
Single 5V Supply, Bipolar Input Range: 10V,
Power Dissipation: 55mW Typ
1167fc
LT 0811 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
22
●
●
© LINEAR TECHNOLOGY CORPORATION 1998
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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