LT1168_06 [Linear]
Low Power, Single Resistor Gain Programmable, Precision Instrumentation Amplifier; 低功耗,单电阻增益可编程精密仪表放大器型号: | LT1168_06 |
厂家: | Linear |
描述: | Low Power, Single Resistor Gain Programmable, Precision Instrumentation Amplifier |
文件: | 总20页 (文件大小:359K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1168
Low Power, Single
Resistor Gain Programmable,
Precision Instrumentation Amplifier
U
FEATURES
DESCRIPTIO
TheLT®1168isamicropower,precisioninstrumentationam-
■
Supply Current: 530µA Max
■
Meets IEC 1000-4-2 Level 4 (±15kV) ESD Tests
with Two External 5k Resistors
Single Gain Set Resistor: G = 1 to 10,000
Gain Error: G = 10, 0.4% Max
Input Offset Voltage Drift: 0.3µV/°C Max
Gain Nonlinearity: G = 10, 20ppm Max
Input Offset Voltage: 40µV Max
Input Bias Current: 250pA Max
PSRR at AV =1: 103dB Min
plifier that requires only one external resistor to set gains of
1 to 10,000. The low voltage noise of 10nV/√Hz (at 1kHz) is
notcompromisedbylowpowerdissipation(350µAtypicalfor
±15Vsupplies).Thewidesupplyrangeof±2.3Vto±18Vallows
the LT1168 to fit into a wide variety of industrial as well as
battery-powered applications.
■
■
■
■
■
■
■
■
■
■
■
■
ThehighaccuracyoftheLT1168isduetoa20ppmmaximum
nonlinearityand0.4%maxgainerror(G=10).Previousmono-
lithic instrumentation amps cannot handle a 2k load resistor
whereas the nonlinearity of the LT1168 is specified for loads
as low as 2k. The LT1168 is laser trimmed for very low input
offsetvoltage(40µVmax),drift(0.3µV/°C),highCMRR(90dB,
G = 1) and PSRR (103dB, G = 1). Low input bias currents of
250pA max are achieved with the use of superbeta process-
ing. The output can handle capacitive loads up to 1000pF in
any gain configuration while the inputs are ESD protected up
to 13kV (human body). The LT1168 with two external 5k
resistors passes the IEC 1000-4-2 level 4 specification.
CMRR at AV = 1: 90dB Min
Wide Supply Range: ±2.3V to ±18V
1kHz Voltage Noise: 10nV/√Hz
0.1Hz to 10Hz Noise: 0.28µVP-P
Available in 8-Pin PDIP and SO Packages
U
APPLICATIO S
■
Bridge Amplifiers
■
Strain Gauge Amplifiers
■
TheLT1168isapin-for-pinimprovedsecondsourceforthe
AD620andINA118.TheLT1168,offeredin8-pinPDIPand
SOpackages,requiressignificantlylessPCboardareathan
discrete op amp resistor designs. These advantages make
the LT1168 the most cost effective solution for precision
instrumentation amplifier applications.
Thermocouple Amplifiers
Differential to Single-Ended Converters
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Differential Voltage to Current Converters
■
Data Acquisition
■
Battery-Powered and Portable Equipment
■
Medical Instrumentation
Scales
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
■
U
TYPICAL APPLICATIO
Single Supply* Pressure Monitor
Gain Nonlinearity
BI TECHNOLOGIES
67-8-3 R40KQ, (0.02% RATIO MATCH)
5V
1
3
8
40k
+
–
7
3.5k
3.5k
3.5k
3.5k
REF
IN
R1
G = 200
249Ω
6
LT1168
4
DIGITAL
ADC
20k
DATA
LTC®1286
1
2
5
OUTPUT
3
+
1
1/2
AGND
40k
LT1112
2
–
G = 1000
OUTPUT VOLTAGE (2V/DIV)
1168 TA01a
R
OUT
= 2k
L
1168 TA01
V
= ± 10V
*See Theory of Operation section
1168fa
1
LT1168
W W
U W
U W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
ORDER PART
NUMBER
Supply Voltage ...................................................... ±20V
Differential Input Voltage (Within the
TOP VIEW
Supply Voltage) ..................................................... ±40V
Input Voltage (Equal to Supply Voltage) ................ ±20V
Input Current (Note 2) ....................................... ±20mA
Output Short-Circuit Duration (Note 3)............ Indefinite
Operating Temperature Range (Note 4) .. –40°C to 85°C
Specified Temperature Range
LT1168AC/LT1168C (Note 5) ............. –40°C to 85°C
LT1168AI/LT1168I ............................. –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
LT1168ACN8
LT1168ACS8
LT1168AIN8
LT1168AIS8
LT1168CN8
LT1168CS8
LT1168IN8
LT1168IS8
R
1
2
3
4
R
G
8
7
6
5
G
–
+
–IN
+IN
+V
S
OUTPUT
REF
–V
S
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 150°C/ W (N8)
TJMAX = 150°C, θJA = 190°C/ W (S8)
S8 PART MARKING
1168
1168AI 1168I
1168A
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature
ranges.
ELECTRICAL CHARACTERISTICS
T = 25°C. V = ±15V, V = 0V, R = 10k unless otherwise noted.
A
S
CM
L
LT1168AC/LT1168AI
LT1168C/LT1168I
SYMBOL
PARAMETER
Gain Range
Gain Error
CONDITIONS (Note 6)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
G
G = 1 + (49.4k/R )
1
10k
1
10k
G
G = 1
0.008
0.04
0.04
0.08
0.02
0.4
0.5
0.5
0.015
0.05
0.05
0.08
0.03
0.5
%
%
%
%
G = 10 (Note 7)
G = 100 (Note 7)
G = 1000 (Note 7)
0.6
0.6
Gain Nonlinearity (Notes 7, 8)
V = ±10V, G = 1
2
10
20
6
20
40
3
15
25
10
25
60
ppm
ppm
ppm
O
V = ±10V,G = 10 and 100
O
V = ±10V, G = 1000
O
V = ±10V, G = 1, R = 2k
4
20
40
15
40
75
5
30
50
20
60
90
ppm
ppm
ppm
O
L
V = ±10V,G = 10 and 100, R = 2k
O
L
V = ±10V, G = 1000, R = 2k
O
L
V
V
V
Total Input Referred Offset Voltage V
= V + V /G
OST OSI OSO
OST
OSI
Input Offset Voltage
Output Offset Voltage
Input Offset Current
Input Bias Current
G = 1000, V = ± 5V to ±15V
G = 1, V = ±5V to ±15V
15
40
50
40
40
20
50
60
80
60
µV
µV
pA
pA
S
200
300
250
300
450
500
OSO
S
I
I
OS
B
e
Input Noise Voltage, RTI
0.1Hz to 10Hz, G = 1
0.1Hz to 10Hz, G = 1000
2.00
0.28
2.00
0.28
µV
P-P
µV
P-P
n
Input Noise Voltage Density, RTI
f = 1kHz
10
165
5
15
10
165
5
15
nV/√Hz
nV/√Hz
O
Output Noise Voltage Density, RTI f = 1kHz (Note 9)
220
220
O
i
Input Noise Current
Input Noise Current Density
Input Resistance
f = 0.1Hz to 10Hz
O
pA
P-P
n
f = 10Hz
O
74
74
fA/√Hz
GΩ
R
IN
V
= ±10V
IN
300
1250
200
1250
1168fa
2
LT1168
ELECTRICAL CHARACTERISTICS
T = 25°C. V = ±15V, V = 0V, R = 10k unless otherwise noted.
A
S
CM
L
LT1168AC/LT1168AI
LT1168C/LT1168I
SYMBOL PARAMETER
CONDITIONS (Note 6)
f = 100kHz
MIN
TYP
1.6
1.6
MAX
MIN
TYP
1.6
1.6
MAX
UNITS
pF
C
C
Differential Input Capacitance
IN(DIFF)
IN(CM)
O
Common Mode Input
Capacitance
f = 100kHz
O
pF
V
Input Voltage Range
G = 1, Other Input Grounded
CM
V = ±2.3V to ±5V
–V + 1.9
–V + 1.9
S
+V – 1.2
+V – 1.4
S
–V + 1.9
–V + 1.9
S
+V – 1.2
+V – 1.4
S
V
V
S
S
S
S
S
V = ±5V to ±18V
S
CMRR
PSRR
Common Mode
Rejection Ratio
1k Source Imbalance,
V
= 0V to ±10V
CM
G = 1
90
95
85
95
dB
dB
dB
dB
G = 10
G = 100
G = 1000
106
120
126
115
135
140
100
110
120
115
135
140
Power Supply
Rejection Ratio
V = ±2.3V to ±18V
S
G = 1
103
122
131
135
108
128
145
150
100
118
126
130
108
128
145
150
dB
dB
dB
dB
G = 10
G = 100
G = 1000
I
Supply Current
V = ±2.3V to ±18V
S
350
530
350
530
µA
S
V
Output Voltage Swing
R = 10k
L
OUT
V = ±2.3V to ±5V
–V + 1.1
–V + 1.2
S
+V – 1.2
+V – 1.3
S
–V + 1.1
–V + 1.2
S
+V – 1.2
+V – 1.3
S
V
V
S
S
S
S
S
V = ±5V to ±18V
S
I
Output Current
Bandwidth
20
32
20
32
mA
OUT
BW
G = 1
G = 10
G = 100
G = 1000
400
200
13
400
200
13
kHz
kHz
kHz
kHz
1
1
SR
Slew Rate
G = 1, V
= ±10V
0.3
0.5
0.3
0.5
V/µs
OUT
Settling Time to 0.01%
10V Step
G = 1 to 100
G = 1000
30
200
30
200
µs
µs
REFIN
Reference Input Resistance
Reference Input Current
Reference Voltage Range
Reference Gain to Output
60
18
60
18
kΩ
µA
V
I
V
= 0V
REF
REFIN
V
A
–V + 1.6
S
+V – 1.6
S
–V + 1.6
S
+V – 1.6
S
REF
1 ± 0.0001
1 ± 0.0001
VREF
The
●
denotes the specifications which apply over the 0°C ≤ T ≤ 70°C temperature range. V = ±15V, V = 0V, R = 10k unless
A
S
CM
L
otherwise noted.
LT1168AC
TYP
LT1168C
TYP
SYMBOL PARAMETER
CONDITIONS (Note 6)
MIN
MAX
MIN
MAX
UNITS
Gain Error
G = 1
●
●
●
●
0.01
0.40
0.45
0.50
0.03
1.5
1.6
1.7
0.012
0.500
0.550
0.600
0.04
1.6
1.7
1.8
%
%
%
%
G = 10 (Note 7)
G = 100 (Note 7)
G = 1000 (Note 7)
Gain Nonlinearity
(Notes 7, 8)
V
V
V
= ±10V, G = 1
= ±10V, G = 10 and 100
= ±10V, G = 1000
●
●
●
2
7
25
15
30
60
3
10
30
20
35
80
ppm
ppm
ppm
OUT
OUT
OUT
∆G/∆T
Gain vs Temperature
G < 1000 (Note 7)
●
100
200
100
200
ppm/°C
1168fa
3
LT1168
ELECTRICAL CHARACTERISTICS
The
●
denotes the specifications which apply over the 0°C ≤ T ≤ 70°C
A
temperature range. V = ±15V, V = 0V, R = 10k unless otherwise noted.
S
CM
L
LT1168AC
TYP
LT1168C
TYP
SYMBOL PARAMETER
CONDITIONS (Note 6)
MIN
MAX
60
MIN
MAX
80
UNITS
V
V
V
V
V
V
V
Total Input Referred Offset Voltage
Input Offset Voltage
V
= V + V /G
OST OSI OSO
OST
V = ±5V to ±15V
S
●
●
●
●
●
●
●
●
●
●
18
3.0
60
23
3.0
70
µV
µV
OSI
Input Offset Voltage Hysteresis (Notes 7, 10)
Output Offset Voltage V = ±5V to ±15V
Output Offset Voltage Hysteresis (Notes 7, 10)
OSIH
OSO
OSOH
380
500
µV
S
30
30
µV
/T
OSI
Input Offset Drift (RTI)
Output Offset Drift
(Note 9)
(Note 9)
0.05
0.7
100
0.3
65
0.3
3
0.06
0.8
120
0.4
105
1.4
0.4
4
µV/°C
µV/°C
pA
/T
OSO
I
I
I
Input Offset Current
Input Offset Current Drift
Input Bias Current
400
550
OS
/T
pA/°C
pA
OS
B
350
600
I /T
Input Bias Current Drift
Input Voltage Range
1.4
pA/°C
B
V
G = 1, Other Input Grounded
CM
V = ±2.3V to ±5V
S
●
●
–V + 2.1
–V + 2.1
S
+V – 1.3 –V + 2.1
+V – 1.3
+V – 1.4
S
V
V
S
S
S
S
S
V = ±5V to ±18V
+V – 1.4 –V + 2.1
S
S
CMRR
PSRR
Common Mode
Rejection Ratio
1k Source Imbalance,
V
= 0V to ±10V
CM
G = 1
●
●
●
●
88
92
83
97
113
114
92
dB
dB
dB
dB
G = 10
G = 100
G = 1000
100
115
117
110
120
135
110
120
135
Power Supply
Rejection Ratio
V = ±2.3V to ±18V
S
G = 1
●
●
●
●
102
123
127
129
115
130
135
145
98
115
130
135
145
dB
dB
dB
dB
G = 10
G = 100
G = 1000
118
124
126
I
Supply Current
V = ±2.3V to ±18V
S
●
390
615
390
615
µA
S
V
Output Voltage Swing
R = 10k
L
OUT
V = ±2.3V to ±5V
●
●
–V + 1.4
–V + 1.6
S
+V – 1.3 –V + 1.4
+V – 1.3
+V – 1.5
S
V
V
S
S
S
S
S
V = ±5V to ±18V
+V – 1.5 –V + 1.6
S
S
S
I
Output Current
Slew Rate
●
●
●
16
25
16
0.25
+V – 1.6 –V + 1.6
25
mA
V/µs
V
OUT
SR
G = 1, V
= ±10V
0.25
0.48
0.48
OUT
V
Voltage Range
(Note 9)
–V + 1.6
S
+V – 1.6
S
REF
S
S
The
●
denotes the specifications which apply over the –40°C ≤ T ≤ 85°C temperature range. V = ±15V, V = 0V, R = 10k unless
A
S
CM
L
otherwise noted. (Note 8)
LT1168AI
TYP
LT1168I
TYP
SYMBOL PARAMETER
CONDITIONS (Note 6)
MIN
MAX
MIN
MAX
UNITS
Gain Error
G = 1
●
●
●
●
0.014
0.600
0.600
0.600
0.04
1.9
2.0
2.1
0.015
0.700
0.700
0.700
0.05
2.0
2.1
2.2
%
%
%
%
G = 10 (Note 7)
G = 100 (Note 7)
G = 1000 (Note 7)
G
Gain Nonlinearity
(Notes 7, 8)
V = ±10V, G = 1
O
VO = ±10V, G = 1000
●
●
●
3
10
30
20
35
70
5
15
35
25
40
100
ppm
ppm
ppm
N
O
V = ±10V, G = 10 and 100
∆G/∆T
Gain vs Temperature
G < 1000 (Note 7)
●
100
200
100
200
ppm/°C
1168fa
4
LT1168
ELECTRICAL CHARACTERISTICS
The
●
denotes the specifications which apply over the –40°C ≤ T ≤ 85°C
A
temperature range. V = ±15V, V = 0V, R = 10k unless otherwise noted. (Note 5)
S
CM
L
LT1168AI
TYP
LT1168I
TYP
SYMBOL PARAMETER
CONDITIONS (Note 6)
MIN
MAX
75
MIN
MAX
100
600
UNITS
V
V
V
V
V
V
V
Total Input Referred Offset Voltage
Input Offset Voltage
V
= V + V /G
OST OSI OSO
OST
●
●
●
●
●
●
●
●
●
●
20
3.0
180
30
25
3.0
200
30
µV
µV
OSI
Input Offset Voltage Hysteresis (Notes 7, 10)
Output Offset Voltage
OSIH
OSO
OSOH
500
µV
Output Offset Voltage Hysteresis (Notes 7, 10)
µV
/T
OSI
Input Offset Drift (RTI)
Output Offset Drift
(Note 9)
(Note 9)
0.05
0.8
110
0.3
120
1.4
0.3
5
0.06
1
0.4
6
µV/°C
µV/°C
pA
/T
OSO
I
I
I
Input Offset Current
Input Offset Current Drift
Input Bias Current
550
120
0.3
220
1.4
700
OS
/T
pA/°C
pA
OS
B
500
800
I /T
Input Bias Current Drift
Input Voltage Range
pA/°C
B
V
V = ±2.3V to ±5V
●
●
–V + 2.1
+V – 1.3 –V + 2.1
+V – 1.3
V
V
CM
S
S
S
S
S
V = ±5V to ±18V
–V + 2.1
S
+V – 1.4 –V + 2.1
S
+V – 1.4
S
S
S
CMRR
PSRR
Common Mode
Rejection Ratio
1k Source Imbalance,
V
= 0V to ±10V
CM
G = 1
●
●
●
●
86
98
114
116
90
81
95
112
112
90
dB
dB
dB
dB
G = 10
G = 100
G = 1000
105
118
133
105
118
133
Power Supply
Rejection Ratio
V = ±2.3V to ±18V
S
G = 1
●
●
●
●
100
120
125
128
112
125
132
140
95
112
125
132
140
dB
dB
dB
dB
G = 10
G = 100
G = 1000
115
120
125
I
Supply Current
●
420
650
420
650
µA
S
V
Output Voltage Swing
V = ±2.3V to ±5V
S
●
●
–V + 1.4
–V + 1.6
S
+V – 1.3 –V + 1.4
+V – 1.3
+V – 1.5
S
V
V
OUT
S
S
S
S
S
V = ±5V to ±18V
+V – 1.5 –V + 1.6
S
S
I
Output Current
Slew Rate
●
●
●
15
22
15
0.22
+V – 1.6 –V + 1.6
22
mA
V/µs
V
OUT
SR
0.22
0.41
0.42
V
Voltage Range
(Note 9)
–V + 1.6
S
+V – 1.6
S
REF
S
S
Note 6: Typical parameters are defined as the 60% of the yield parameter
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: If the input voltage exceeds the supplies, the input current should
be limited to less than 20mA.
distribution.
Note 7: Does not include the tolerance of the external gain resistor R .
G
Note 8: This parameter is measured in a high speed automatic tester that
does not measure the thermal effects with longer time constants. The
magnitude of these thermal effects are dependent on the package used,
heat sinking and air flow conditions.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum.
Note 9: This parameter is not 100% tested.
Note 4: The LT1168AC/LT1168C are guaranteed functional over the
operating temperature range of –40°C and 85°C.
Note 10: Hysteresis in offset voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Offset voltage hysteresis is always measured at 25°C, but
the IC is cycled to 85°C I-grade (or 70°C C-grade) or –40°C I-grade
(0°C C-grade) before successive measurement. 60% of the parts will
pass the typical limit on the data sheet.
Note 5: The LT1168AC/LT1168C are guaranteed to meet specified
performance from 0°C to 70°C. The LT1168AC/LT1168C are designed,
characterized and expected to meet specified performance from –40°C
to 85°C but are not tested or QA sampled at these temperatures. The
LT1168AI/LT1168I are guaranteed to meet specified performance from
–40°C to 85°C.
1168fa
5
LT1168
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Distribution of Output Offset
Voltage
Distribution of Input Offset
Voltage
Distribution of Output Offset
Voltage Drift
60
55
50
45
40
35
30
25
20
15
10
5
60
55
50
45
40
35
30
25
20
15
10
5
35
30
V
T
= ±15V
S
97 N8 (2 LOTS)
49 S0-8 (1 LOT)
146 TOTAL PARTS
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
299 N8 (2 LOTS)
337 S0-8 (2 LOTS)
636 TOTAL PARTS
S
A
G = 1
299 N8 (2 LOTS)
337 S0-8 (2 LOTS)
636 TOTAL PARTS
S
A
= –40°C TO 85°C
A
G = 1
G = 1000
25
20
15
10
5
0
0
0
–150
–50
0
50
100
150
0.2
OUTPUT OFFSET VOLTAGE DRIFT (µV/°C)
–100
–60
–20
0
20
40
60
–1.8
–0.6
–0.2
–40
–1.4
–1.0
OUTPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
1168 G01
1168 G02
1168 G03
Distribution of Input Offset
Voltage Drift
Output Offset Voltage
Long-Term Drift
Input Offset Voltage
Long-Term Drift
50
40
5
4
35
30
V
T
= ±15V
= 30°C
V
T
= ±15V
= 30°C
V
T
= ±15V
S
A
G = 1
S
A
S
A
= –40°C TO 85°C
G = 1000
G = 1000
30
3
4 PARTS FROM 4 LOTS
WARMED UP
4 PARTS FROM 4 LOTS
WARMED UP
97 N8 (2 LOTS)
49 S0-8 (1 LOT)
146 TOTAL PARTS
25
20
2
10
1
20
15
10
5
0
0
–10
–20
–30
–40
–50
–1
–2
–3
–4
–5
0
–0.35 –0.25
–0.15 –0.05 0.05
INPUT OFFSET VOLTAGE DRIFT (µV/°C)
1
1
–0.45
0
2
3
0
2
3
TIME (MONTHS)
TIME (MONTHS)
1168 G04
1168 G05
1168 G05
Voltage Noise Density
vs Frequency
Warm-Up Drift
Gain vs Frequency
60
50
1000
100
10
35
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
S
A
S
A
S
A
G = 1
G = 1000
30
25
20
15
10
5
1/f CORNER = 2Hz
GAIN = 1
40
G = 100
G = 10
G = 1
SO-8
N-8
30
1/f CORNER = 7Hz
GAIN = 10
20
GAIN = 100, 1000
10
1/f CORNER = 3Hz
0
BW LIMIT
GAIN = 100
–10
BW LIMIT
GAIN = 1000
–20
1
0
0.01
0.1
1
10
100
1000
1
10
100
1k
10k
100k
0
1
2
3
4
5
FREQUENCY (kHz)
FREQUENCY (Hz)
TIME AFTER POWER-ON (MINUTES)
1168 G08
1168 G09
1168 G07
1168fa
6
LT1168
U W
TYPICAL PERFOR A CE CHARACTERISTICS
0.1Hz to 10Hz Noise Voltage,
G = 1
0.1Hz to 10Hz Noise Voltage,
RTI G = 1000
Current Noise Density
vs Frequency
1000
100
10
V
= ±15V
= 25°C
S
A
V
= ±15V
= 25°C
V
= ±15V
= 25°C
S
A
S
A
T
T
T
RS
1/f CORNER = 55Hz
1
10
100
1000
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (Hz)
TIME (SEC)
TIME (SEC)
1168 G12
1168 G10
1168 G11
0.1Hz to 10Hz Current Noise
Short-Circuit Current vs Time
Output Impedance vs Frequency
50
40
1k
V
= ±15V
V
= ± 15V
= 25°C
S
S
A
V
S
T
= ±15V
= 25°C
T
T
= –40°C
= 25°C
A
A
G = 1 TO 1000
30
T
100
A
20
10
T
= 85°C
A
0
10
1
–10
–20
–30
–40
–50
T
= 85°C
= 25°C
A
A
T
T
= –40°C
A
0.1
0
1
2
3
0
1
2
3
4
5
6
7
8
9
10
1k
10k
100k
1M
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
FREQUENCY (Hz)
TIME (SEC)
1168 G14
1168 G13
1168 G15
Overshoot vs Capacitive Load
Input Bias Current
Input Offset Current
100
90
50
40
30
20
10
0
50
40
30
20
10
0
V
T
= ±15V
= 25°C
302 N8 (2 LOTS)
313 SO-8 (2 LOTS)
615 TOTAL PARTS
302 N8 (2 LOTS)
313 SO-8 (2 LOTS)
615 TOTAL PARTS
V
T
±15V
= 25°C
S
A
V
V
= ±15V
S
A
S
= ± 50mV
OUT
R
=
∞
L
80
70
60
50
G = 1
40
30
20
10
0
+I
+I
B
B
G = 10
–I
B
G = 100, 1000
100
10
1000
10000
–200
–120
40
120
–120 –80
–40
0
40
80
120
–40
200
CAPACITIVE LOAD (pF)
INPUT BIAS CURRENT (pA)
INPUT OFFSET CURRENT (pA)
1168 G16
1168 G18
1168 G17
1168fa
7
LT1168
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Change in Input Bias Current for
CM
V
= 20V
Settling Time vs Step Size
Settling Time vs Gain
1000
100
10
10
8
20
18
16
14
12
10
8
V
T
= ± 15V
= 25°C
OUT
V
= ±15V
302 N8 (2 LOTS)
313 SO-8 (2 LOTS)
615 TOTAL PARTS
V
= ±15
S
A
∆V
S
TO 0.1%
S
V
= ±10V
G = 1
CM
A
TO 0.01%
= 10V TO 0.01%
T
= 25°C
T
= 25°C
= 30pF
= 1k
L
A
6
C
L
R
4
V
OUT
2
0V
0V
R
= 5TΩ
R
INCM
= 700GΩ
INCM
0
–2
–4
–6
–8
–10
V
OUT
6
4
TO 0.01%
2
TO 0.1%
1
0
1
10
100
1000
8
10 12 14 16 18 20 22 24 26 28 30 32
0
4
8
12 16 20 24 28 32 34
GAIN
CHANGE IN INPUT BIAS CURRENT (pA)
SETTLING TIME (µs)
1168 G21
1168 G20
1168 G19
Falling Edge Settling Time
(0.10%)
Settling Time (0.1%)
vs Load Capacitance
Input Bias and Offset Current
vs Temperature
34
32
30
28
26
24
22
20
18
16
500
400
V
V
= ±15V
CM
S
0
–5
= 0V
G = 1, FALLING EDGE
0.10
0.05
0
G = 1, RISING EDGE
300
–10
200
G = 100, FALLING EDGE
I
I
OS
B
100
0
0.05
0.10
0
G = 100,
RISING EDGE
G = 10,
FALLING EDGE
–5
–100
–200
–300
–400
–500
–10
G = 10,
RISING EDGE
V
T
= ± 15V
= 25°C
= 1k
S
5µs/DIV
1168 G24
A
R
L
t = 0
STEP SIZE = 10V
TA = 25°C
VS = ±15V
RL = 2k
10
30
100
300
1000
–75 –50 –25
0
25 50 75 100 125
LOAD CAPACITANCE (pF)
TEMPERATURE
C
L = 15pF
1168 G22
1168 G23
Rising Edge Settling Time
(0.10%)
Settling Time (0.01%)
vs Load Capacitance
Undistorted Output Swing
vs Frequency
35
30
25
20
15
10
5
36
34
32
30
28
26
24
22
20
18
G = 100,
RISING EDGE
V
= ±15V
= 25°C
G = 100,
FALLING EDGE
S
A
10
G = 10, 100, 1000
G = 1
T
5
0
0.10
G = 1, RISING EDGE
0.05
0
10
5
0.05
0.10
G = 10, FALLING EDGE
G = 10, RISING EDGE
G = 1,
FALLING
EDGE
0
V
= ± 15V
= 25°C
= 1k
S
A
L
T
5µs/DIV
1168 G25
R
t = 0
STEP SIZE = 10V
0
TA = 25°C
VS = ±15V
RL = 2k
1
10
100
1000
10
30
100
300
1000
FREQUENCY (kHz)
LOAD CAPACITANCE (pF)
C
L = 15pF
1168 G27
1168 G26
1168fa
8
LT1168
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Voltage Range vs Output
Voltage for Various Gains
Output Voltage Swing vs
Load Current
+V
+V – 0.5
15
14
13
12
11
10
9
8
7
6
5
0
–1
–2
–3
–4
–5
–6
–7
S
85°C
+V = +V – 1.4V
V
= ± 15V
CM
S
S
S
25°C
G = 1
V
A
= ±15V
= 25°C
S
–40°C
+V – 1.0
S
T
+V – 1.5
S
G = 2
+V – 2.0
S
G = 10
V
OUT
= –V + 1.2V
S
+V – 2.5
S
G = 100
G = 100
–8
–9
G = 10
G = 2
–V + 2.5
S
–V + 2.0
S
–10
–11
–12
–13
–14
–15
V
= +V – 1.3V
S
4
3
2
1
–V + 1.5
S
OUT
–V + 1.0
S
G = 1
–V + 0.5
S
–V = –V + 1.9V
CM
S
–V
S
0
0.01
0.1
1
10
100
3
–15 –11 –7
–3
7
11
15
OUTPUT CURRENT (mA)
V
OUT
(V)
1168 G28
1168 G43
Output Short-Circuit Current
vs Temperature
Slew Rate vs Temperature
60
1.0
0.8
0.6
0.4
0.2
0
V
V
= ±15V
OUT
G = 1
V
S
= ±15V
S
= ±10V
50
40
30
20
10
SINKING CURRENT
+SLEW
–SLEW
SOURCING CURRENT
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
1168 G29
1168 G30
Small-Signal Transient Response
Large-Signal Transient Response
Large-Signal Transient Response
1168 G31
1168 G32
1168 G33
G = 10
50µs/DIV
50µs/DIV
G = 1
10µs/DIV
G = 1
VS = ±15V
RL = 2k
VS = ±15V
RL = 2k
V
S = ±15V
RL = 2k
CL = 60pF
CL = 60pF
C
L = 60pF
1168fa
9
LT1168
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Small-Signal Transient Response
Large-Signal Transient Response
Small-Signal Transient Response
1168 G36
1168 G34
1168 G35
10µs/DIV
10µs/DIV
50µs/DIV
G = 100
G = 10
G = 100
VS = ±15V
RL = 2k
V
S = ±15V
VS = ± 15V
RL = 2k
RL = 2k
CL = 60pF
C
L = 60pF
C
L = 60pF
Negative Power Supply Rejection
Ratio vs Frequency
Small-Signal Transient Response
Large-Signal Transient Response
160
140
120
100
80
G = 1000
G = 100
G = 10
G = 1
60
40
1168 G38
1168 G37
200µs/DIV
G = 1000
VS = ±15V
RL = 2k
200µs/DIV
G = 1000
VS = ±15V
RL = 2k
20
V
= ±15V
= 25°C
S
A
T
0
C
L = 60pF
0.1
1
10
100
1k
10k 100k
CL = 60pF
FREQUENCY (Hz)
1168 G39
Positive Power Supply Rejection
Ratio vs Frequency
Common Mode Rejection Ratio vs
Frequency (1k Source Imbalance)
Supply Current vs Temperature
0.6
160
140
120
100
80
160
140
120
100
80
V
S
= ±15V
G = 1000
G = 100
G = 1000
G = 100
0.5
0.4
0.3
0.2
0.1
G = 10
G = 1
G = 10
G = 1
60
60
40
40
V
= ±15V
= 25°C
S
A
20
20
V
= ±15V
= 25°C
S
A
T
T
1k SOURCE IMBALANCE
0
0
0.1
1
10
100
1k
10k 100k
0.1
1
10
100
1k
10k 100k
–50 –25
0
25
50
75 100 125
FREQUENCY (Hz)
FREQUENCY (Hz)
TEMPERATURE (°C)
1168 G40
1168 G41
1168 G42
1168fa
10
LT1168
W
BLOCK DIAGRA
+V
S
VB
R5
30k
R6
30k
+
–
OUTPUT
6
A1
R3
C1
400Ω
–IN
2
Q1
R1
24.7k
–
+
–V
S
A3
1
8
R
R
G
–V
–V
S
S
VB
G
+V
S
R7
30k
R8
30k
+
–
REF
A2
5
R4
400Ω
C2
+IN
3
Q2
R2
24.7k
+V
S
7
4
–V
S
–V
S
1168 F01
PREAMP STAGE
DIFFERENCE AMPLIFIER STAGE
Figure 1. Block Diagram
U
THEORY OF OPERATIO
The LT1168 is a modified version of the three op amp
instrumentation amplifier. Laser trimming and monolithic
construction allow tight matching and tracking of circuit
parameters over the specified temperature range. Refer to
the block diagram (Figure 1) to understand the following
circuitdescription. ThecollectorcurrentsinQ1andQ2are
trimmed to minimize offset voltage drift, thus assuring a
high level of performance. R1 and R2 are trimmed to an
absolute value of 24.7k to assure that the gain can be set
accurately (0.6% at G = 100) with only one external
resistor RG. The value of RG in parallel with R1 (R2)
determines the transconductance of the preamp stage. As
RG is reduced for larger programmed gains, the transcon-
ductanceoftheinputpreampstageincreasestothatofthe
input transistors Q1 and Q2. This increases the open-loop
gain when the programmed gain is increased, reducing
the input referred gain related errors and noise. The input
voltage noise at gains greater than 50 is determined only
by Q1 and Q2. At lower gains the noise of the difference
amplifier and preamp gain setting resistors increase the
noise. The gain bandwidth product is determined by C1,
C2 and the preamp transconductance which increases
withprogrammedgain.Therefore,thebandwidthdoesnot
drop proportionally with gain.
The input transistors Q1 and Q2 offer excellent matching,
which is inherent in NPN bipolar transistors, as well as
picoampere input bias current due to superbeta process-
ing. The collector currents in Q1 and Q2 are held constant
due to the feedback through the Q1-A1-R1 loop and
Q2-A2-R2 loop which in turn impresses the differential
input voltage across the external gain set resistor RG.
SincethecurrentthatflowsthroughRG alsoflowsthrough
R1 and R2, the ratios provide a gained-up differential
1168fa
11
LT1168
U
THEORY OF OPERATIO
voltage, G = (R1 + R2)/RG, to the unity-gain difference
amplifier A3. The common mode voltage is removed by
A3, resulting in a single-ended output voltage referenced
to the voltage on the REF pin. The resulting gain equation
is:
voltage of the LT1168 (Pin 6) is referenced to the voltage
on the reference terminal (Pin 5). Resistance in series
with the REF pin must be minimized for best common
mode rejection. For example, a 6Ω resistance from the
REF pin to ground will not only increase the gain error by
0.02% but will lower the CMRR to 80dB.
G = (49.4kΩ/RG) + 1
solving for the gain set resistor gives:
RG = 49.4kΩ/(G – 1)
Input Voltage Range
The input voltage range for the LT1168 is specified in the
data sheet at 1.4V below the positive supply to 1.9V
above the negative supply for a gain of one. As the gain
increases the input voltage range decreases. This is due
to the IR drop across the internal gain resistors R1 and
R2 in Figure 1. For the unity gain condition there is no IR
drop across the gain resistors R1 and R2, the output of
the GM amplifiers is just the differential input voltage at
Pin 2 and Pin 3 (level shifted by one VBE from Q1 and Q2).
When a gain resistor is connected across Pins 1 and 8,
the output swing of the GM cells is now the differential
input voltage (level shifted by VBE) plus the differential
voltage times the gain (ratio of the internal gain resistors
to the external gain resistor across Pins 1 and 8). To
calculate how close to the positive rail the input (VIN) can
swing for a gain of 2 and a maximum expected output
swing of 10V, use the following equation:
Table 1 shows appropriate 1% resistor values for a variety
of gains.
Table 1
DESIRED GAIN
R
G
CLOSEST 1% VALUE RESULTANT GAIN
1
Open
49400Ω
12350Ω
5488.89Ω
2600Ω
Open
49900Ω
12400Ω
5490Ω
2610Ω
1000Ω
499Ω
1
2
1.99
5
4.984
9.998
19.93
50.4
10
20
50
1008.16Ω
498.99Ω
248.24Ω
99Ω
100
200
500
1000
99.998
199.4
495
249Ω
100Ω
49.95Ω
49.4Ω
1001
+VS – VIN = –0.5 – (VOUT/G) • (G – 1)/2
Substituting yields:
Input and Output Offset Voltage
The offset voltage of the LT1168 has two components: the
output offset and the input offset. The total offset voltage
referred to the input (RTI) is found by dividing the output
offset by the programmed gain (G) and adding it to the
input offset. At high gains the input offset voltage domi-
nates, whereas at low gains the output offset voltage
dominates. The total offset voltage is:
–0.5 – (10/2) • (1/2) = –3V
below the positive supply or 12V for a 15V supply. To
calculate how far above the negative supply the input can
swing for a gain of 10 with a maximum expected output
swing of –10V, the equation for the negative case is:
–VS + VIN = 1.5 – (VOUT/G) • (G – 1)/2
Substituting yields:
Total input offset voltage (RTI)
= input offset + (output offset/G)
Total output offset voltage (RTO)
= (input offset • G) + output offset
1.5 – (–10/10) • 9/2 = 6V
above the negative supply or –9V for a negative supply
voltage of –15V. Figures 2 and 3 are for the positive
common mode and negative common mode cases
respectively.
Reference Terminal
The reference terminal is one end of one of the four 30k
resistors around the difference amplifier. The output
1168fa
12
LT1168
U
THEORY OF OPERATIO
+V
S
potential, the voltage on the REF pin can be further level
shifted. The application in the front of this data sheet,
SingleSupplyPressureMonitor,isanexample.Anopamp
isusedtobufferthevoltageontheREFpinsinceaparasitic
series resistance will degrade the CMRR.
G = 1
AREA OF OPERATION
–1
–2
G = 2
AREA OF
OPERATION
–3
–4
–5
–6
–7
G = 100
AREA OF
OPERATION
G = 10
AREA OF
OPERATION
Output Offset Trimming
T
= 25°C
A
The LT1168 is laser trimmed for low offset voltage so that
no external offset trimming is required for most applica-
tions. In the event that the offset needs to be adjusted, the
circuitinFigure4isanexampleofanoptionaloffsetadjust
circuit. Theopampbufferprovidesalowimpedancetothe
REF pin where resistance must be kept to minimum for
best CMRR and lowest gain error.
INPUT COMMON
MODE RANGE IS
BELOW THE CURVE
–8
2
4
8
10
12
14
0
6
V
(V)
OUT
1168 F02
Figure 2. Positive Input Range vs
Output Voltage for Different Gains
9
8
7
6
5
4
3
2
1
G = 10
T = 25°C
A
–
2
AREA OF
INPUT COMMON
–IN
OPERATION MODE RANGE IS
ABOVE THE CURVE
1
6
R
LT1168
REF
OUTPUT
G
+V
G = 100
AREA OF
OPERATION
S
8
3
5
+
G = 2
+IN
–
10mV
AREA OF
OPERATION
100Ω
1/2 LT1112
G = 1
AREA OF OPERATION
+
±10mV
10k
ADJUSTMENT RANGE
–V
100Ω
S
–14 –12 –10 –8
0
–6
(V)
–4
–2
V
–10mV
OUT
1168 F03
Figure 3. Negative Input Voltage Range
vs Output Voltage for Various Gains
–V
1168 F04
S
Figure 4. Optional Trimming of Output Offset Voltage
Single Supply Operation
For best results under single supply operation, the REF pin
shouldberaisedabovethenegativesupply(Pin4)and one
of the inputs should be at least 2.5V above ground. The
barometerapplicationlaterinthisdatasheetisanexample
that satisfies these conditions. The resistance RSET from
the bridge transducer to ground sets the operating current
forthebridge,andwithR6,alsohastheeffectofraisingthe
input common mode voltage. The output of the LT1168 is
always inside the specified range since the barometric
pressurerarelygoeslowenoughtocausetheoutputtoclip
(30.00 inches of Hg corresponds to 3.000V). For applica-
tions that require the output to swing at or below the REF
Input Bias Current Return Path
The low input bias current of the LT1168 (250pA) and the
high input impedance (200GΩ) allow the use of high
impedance sources without introducing additional offset
voltage errors, even when the full common mode range is
required. However, a path must be provided for the input
bias currents of both inputs when a purely differential
signal is being amplified. Without this path the inputs will
float to either rail and exceed the input common mode
range of the LT1168, resulting in a saturated input stage.
Figure 5 shows three examples of an input bias current
1168fa
13
LT1168
U
THEORY OF OPERATIO
path. The first example is of a purely differential signal
sourcewitha10kΩinputcurrentpathtoground.Sincethe
impedance of the signal source is low, only one resistor is
needed. Two matching resistors are needed for higher
impedance signal sources as shown in the second
example. Balancing the input impedance improves both
common mode rejection and DC offset.
–
–
+
–
MICROPHONE,
HYDROPHONE,
ETC
LT1168
THERMOCOUPLE
LT1168
LT1168
+
+
200k
200k
10k
CENTER-TAP PROVIDES
BIAS CURRENT RETURN
1168 F05
Figure 5. Providing an Input Common Mode Current Path
W U U
U
APPLICATIO S I FOR ATIO
The LT1168 is a low power precision instrumentation
amplifier that requires only one external resistor to accu-
rately set the gain anywhere from 1 to 1000. The LT1168
is trimmed for critical DC parameters such as gain error
(0.04%, G = 10), input offset voltage (40µV, RTI), CMRR
(90dB min, G = 1) and PSRR (103dB min, G = 1). These
trimsallowtheamplifiertoachieveveryhighDCaccuracy.
The LT1168 achieves low input bias current of just 250pA
(max) through the use of superbeta processing. The
output can handle capacitive loads up to 1000pF in any
gain configuration and the inputs are protected against
ESD strikes up to ±13kV (human body).
specification to level 4 for both air and contact discharge.
A2N4393drain/sourcetogateisagoodlowleakagediode
for use with resistors between 1k and 20k, see Figure 6.
The input resistors should be carbon and not metal film or
carbon film in order to withstand the fault conditions.
OPTIONAL FOR
R
IN
< 20k
J1
2N4393
J2
2N4393
+V
S
R
IN
+
OUT
R
G
LT1168
REF
R
IN
–
Input Protection
1168 F06
–V
S
The LT1168 can safely handle up to ±20mA of input
current in an overload condition. Adding an external 5k
input resistor in series with each input allows DC input
fault voltage up to ±100V and improves the ESD immunity
to ±8kV (contact) and ±15kV (air discharge), which is the
IEC 1000-4-2 level 4 specification. If lower value input
resistors must be used, a clamp diode from the positive
supply to each input will maintain the IEC 1000-4-2
Figure 6. Input Protection
RFI Reduction
In many industrial and data acquisition applications,
instrumentation amplifiers are used to accurately amplify
small signals in the presence of large common mode
1168fa
14
LT1168
W U U
APPLICATIO S I FOR ATIO
U
voltages or high levels of noise. Typically, the sources of
these very small signals (on the order of microvolts or
millivolts) are sensors that can be a significant distance
from the signal conditioning circuit. Although these sen-
sors may be connected to signal conditioning circuitry,
using shielded or unshielded twisted-pair cabling, the ca-
bling may act as antennae, conveying very high frequency
interference directly into the input stage of the LT1168.
frequency is known, the common mode time constants
can be set followed by the differential mode time constant.
To avoid any possibility of inadvertently affecting the
signal to be processed, set the common mode time
constantanorderofmagnitude(ormore)smallerthanthe
differential mode time constant. Set the common mode
time constants such that they do not degrade the LT1168
inherent AC CMR. Then the differential mode time con-
stant can be set for the bandwidth required for the appli-
cation. Settingthedifferentialmodetimeconstantcloseto
the sensor’s BW also minimizes any noise pickup along
the leads. To avoid any possibility of common mode to
differential mode signal conversion, match the common
mode time constants to 1% or better. If the sensor is an
RTD or a resistive strain gauge and is in proximity to the
instrumentation amplifier, then the series resistors RS1, 2
can be omitted.
The amplitude and frequency of the interference can have
an adverse effect on an instrumentation amplifier’s input
stage by causing an unwanted DC shift in the amplifier’s
input offset voltage. This well known effect is called RFI
rectification and is produced when out-of-band interfer-
ence is coupled (inductively, capacitively or via radiation)
and rectified by the instrumentation amplifier’s input tran-
sistors. These transistors act as high frequency signal
detectors, in the same way diodes were used as RF
envelope detectors in early radio designs. Regardless of
the type of interference or the method by which it is
coupled into the circuit, an out-of-band error signal ap-
pearsinserieswiththeinstrumentationamplifier’sinputs.
+V
S
C
R
XCM1
S1
0.001µF
1.6k
+
–
+
IN
IN
C
XD
To significantly reduce the effect of these out-of-band
signals on the input offset voltage of instrumentation
amplifiers, simple lowpass filters can be used at the
inputs. This filter should be located very close to the input
pins of the circuit. An effective filter configuration is
illustrated in Figure 7, where three capacitors have been
added to the inputs of the LT1168. Capacitors CXCM1 and
CXCM2 form lowpass filters with the external series resis-
tors RS1, 2 to any out-of-band signal appearing on each of
the input traces. Capacitor CXD forms a filter to reduce any
unwantedsignalthatwouldappearacrosstheinputtraces.
An added benefit to using CXD is that the circuit’s AC
common mode rejection is not degraded due to common
mode capacitive imbalance. The differential mode and
commonmodetimeconstantsassociatedwiththecapaci-
tors are:
R
LT1168
V
G
OUT
0.1µF
R
1.6k
S2
–
C
XCM2
0.001µF
–V
S
f
≈ 500Hz
1168 F07
–3dB
EXTERNAL RFI
FILTER
Figure 7. Adding a Simple RC Filter at the Inputs to an
Instrumentation Amplifier is Effective in Reducing Rectification
of High Frequency Out-of-Band Signals
Nerve Impulse Amplifier
The LT1168’s low current noise makes it ideal for EMG
monitors that have high source impedances. Demonstrat-
ing the LT1168’s ability to amplify low level signals, the
circuit in Figure 8 takes advantage of the amplifier’s high
gainandlownoiseoperation. Thiscircuitamplifiesthelow
level nerve impulse signals received from a patient at
Pins 2and3. RG andtheparallelcombinationofR3andR4
set a gain of ten. The potential on LT1112’s Pin 1 creates
tDM(LPF) = (RS1 + RS2)(CXD + CXCM1 + CXCM2)
||
tCM(LPF) = (RS1 RS2)(CXCM1+ CXCM2
)
Setting the time constants requires a knowledge of the
frequency, or frequencies of the interference. Once this
1168fa
15
LT1168
W U U
U
APPLICATIO S I FOR ATIO
a ground for the common mode signal. C1 was chosen to
maintain the stability of the patient ground. The LT1168’s
high CMRR ensures that the desired differential signal is
amplified and unwanted common mode signals are at-
tenuated. Since the DC portion of the signal is not impor-
tant, R6 and C2 make up a 0.3Hz highpass filter. The AC
signal at LT1112’s Pin 5 is amplified by a gain of 101 set
by R7/R8 +1. The parallel combination of C3 and R7 form
a lowpass filter that decreases this gain at frequencies
above 1kHz. The ability to operate at ± 3V on 350µA of
supply current makes the LT1168 ideal for battery-pow-
ered applications. Total supply current for this application
is 1.05mA. Proper safeguards, such as isolation, must be
added to this circuit to protect the patient from possible
harm.
Low IB Favors High Impedance Bridges, Lowers
Dissipation
The LT1168’s low supply current, low supply voltage
operation and low input bias currents allow it to fit nicely
into battery-powered applications. Low overall power
dissipation necessitates using higher impedance bridges.
The single supply pressure monitor application on the
front of this data sheet, shows the LT1168 connected to
the differential output of a 3.5k bridge. The picoampere
input bias currents keep the error caused by offset current
to a negligible level. The LT1112 level shifts the LT1168’s
reference pin and the ADC’s analog ground pins above
ground. The LT1168’s and LT1112’s combined power
dissipation is still less than the bridge’s. This circuit’s total
supply current is just 2.2mA.
3V
PATIENT/CIRCUIT
PROTECTION/ISOLATION
3
8
0.3Hz
HIGHPASS
7
+IN
+
–
3V
C1
0.01µF
C2
0.47µF
R3
R1
12k
30k
6
5
6
8
R
LT1168
G = 10
G
+
–
6k
R2
1M
7
1/2
OUTPUT
1V/mV
R4
30k
R6
1M
LT1112
1
2
5
4
4
R7
10k
–
+
2
3
–3V
1/2
LT1112
1
–3V
PATIENT
GND
R8
100Ω
A
= 101
C3
15nF
V
POLE AT 1kHz
–IN
1168 F08
Figure 8. Nerve Impulse Amplifier
14
12
THERMOMETRICS
DC95F103W
THERMO
METRICS
15V
3
8
+
–
7
LT1168
4
DC95G104Z
10
6
PRECISION
THERMISTOR
49.4kΩ
R
V
OUT
= 1.25 •
T
8
6
4
2
R
T
REF
1
2
5
YSI #44006
–15V
YSI #44011
1168 F09
LT1634-1.25
22k
0
–20
0
20 40 60
120
–40
80 100
TEMPERATURE (°C)
–15V
1168 F10
Figure 9. Precision Temperature Without Precision Resistors
Figure 10. Response of Figure 9 for Various Thermistors
1168fa
16
LT1168
U
TYPICAL APPLICATIO S
Single Supply Barometer
V
S
R5
LUCAS NOVA SENOR
NPC-1220-015-A-3L
V
S
200k
3
2
8
+
–
1
–
+
2
1
–
1
7
1/2
LT1490
4
2
1
5k
5k
LT1634CCZ-1.25
R1
4
6
825Ω
LT1168
G = 60
R6
1k
R2
12Ω
5k
2
6
5k
5
8
3
TO
3
+
4-DIGIT
DVM
R
4
R4
50k
SET
5
6
5
+
–
R3
50k
7
1/2
LT1490
R7
50k
R8
100k
VOLTS INCHES Hg
0.6% ACCURACY AT 25°C
1.7% ACCURACY AT 0°C TO 60°C
= 8V TO 30V
2.800
3.000
3.200
28.00
30.00
32.00
V
S
1168 TA03
AC Coupled Instrumentation Amplifier
2
–IN
+IN
–
1
6
R
LT1168
REF
OUTPUT
G
R1
1M
8
3
C1
0.1µF
5
+
–
+
2
6
1
LT1677
f
=
–3dB
3
(2π)(R1)(C1)
= 1.59Hz
1168 TA02
1168fa
17
LT1168
U
TYPICAL APPLICATIO S
4-Digit Pressure Sensor
9V
R8
LUCAS NOVA SENOR
392k
9V
NPC-1220-015A-3L
3
2
4
+
2
1
1
3
–
–
1
4
1/4
LT1114
2
1
7
5k
5k
LT1634CCZ-1.25
R1
–
11
825Ω
6
LT1168
G = 60
R9
1k
R2
12Ω
5k
2
6
5k
8
3
5
TO
+
4-DIGIT
DVM
+
4
R
SET
10
9
+
8
1/4
LT1114
5
–
12
13
+
14
1/4
0.6% ACCURACY AT ROOM TEMP
LT1114
–
1.7% ACCURACY AT 0°C TO 60°C
R7
180k
R6
50k
R5
100k
R4
100k
VOLTS INCHES Hg
2.800
3.000
3.200
28.00
30.00
32.00
C1
1µF
1168 TA04
R3
51k
1168fa
18
LT1168
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.400*
(10.160)
MAX
8
7
6
5
4
.255 ± .015*
(6.477 ± 0.381)
1
2
3
.130 ± .005
.300 – .325
.045 – .065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.255)
.065
(1.651)
TYP
.008 – .015
(0.203 – 0.381)
.120
.020
(0.508)
MIN
(3.048)
MIN
+.035
.325
–.015
.018 ± .003
(0.457 ± 0.076)
.100
(2.54)
BSC
+0.889
8.255
(
)
N8 1002
–0.381
NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
7
5
8
6
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
2
3
4
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
1168fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1168
U
TYPICAL APPLICATIO
Low Power Programmable Audio HPF/LPF with “Pop-Less” Switching
+15V
7
3
8
+
6
7
R3
8k
R2
4k
R1
4k
GAIN SET
1
2
LT1168
HPF
LPF
5
–
P
P
2
4
1
C1
100µF
–15V
3
2
14
1
16
8
9
5
6
7
11
LTC®201
5
6
+
+15V
8
1/2 LT1462
15 12 13
4
10
2
3
–
–
NC +15V –15V
1
1/2 LT1462
V
IN
+
1168 TA05
4
P
1
P
2
—
0
0
1
1
1
0 < 0.8V
1 > 2.4V
–15V
TOTAL SUPPLY CURRENT < 400µA
POLE 100 200 400
Hz
RELATED PARTS
PART NUMBER
LTC1043
LTC1100
LT1101
DESCRIPTION
Dual Precision Instrumentation Building Block
COMMENTS
Switched Capacitor, Rail-to-Rail Input, 120dB CMRR
G = 10 or 100, V = 10µV, I = 50pA
Precision Chopper-Stabilized Instrumentation Amplifier
Precision, Micropower, Single Supply Instrumentation Amplifier
High Speed, JFET Instrumentation Amplifier
OS
B
G = 10 or 100, I = 105µA
S
LT1102
G = 10 or 100, Slew Rate = 30V/µs
Lower Noise than LT1168, e = 7.5nV/√Hz
LT1167
Single Resistor Programmable Precision Instrumentation Amplifier
N
1168fa
LT/LWI 0906 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
© LINEAR TECHNOLOGY CORPORATION 2000
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